xref: /csrg-svn/sys/hp/dev/hilreg.h (revision 63148)
141480Smckusick /*
241480Smckusick  * Copyright (c) 1988 University of Utah.
3*63148Sbostic  * Copyright (c) 1990, 1993
4*63148Sbostic  *	The Regents of the University of California.  All rights reserved.
541480Smckusick  *
641480Smckusick  * This code is derived from software contributed to Berkeley by
741480Smckusick  * the Systems Programming Group of the University of Utah Computer
841480Smckusick  * Science Department.
941480Smckusick  *
1041480Smckusick  * %sccs.include.redist.c%
1141480Smckusick  *
1253923Shibler  * from: Utah $Hdr: hilreg.h 1.10 92/01/21$
1341480Smckusick  *
14*63148Sbostic  *	@(#)hilreg.h	8.1 (Berkeley) 06/10/93
1541480Smckusick  */
1641480Smckusick 
1756504Sbostic #include <hp/dev/iotypes.h>		/* XXX */
1853923Shibler 
1953923Shibler #ifdef hp300
2041480Smckusick struct	hil_dev {
2141480Smckusick 	char	hil_pad0;
2253923Shibler 	vu_char	hil_data;
2341480Smckusick 	char	hil_pad1;
2453923Shibler 	vu_char	hil_cmd;
2541480Smckusick };
2641480Smckusick 
2749311Shibler #define	HILADDR			((struct hil_dev *)IIOV(0x428000))
2853923Shibler #define	BBCADDR			((struct hil_dev *)IIOV(0x420000))
2953923Shibler #endif
3041480Smckusick 
3153923Shibler #ifdef hp800
3253923Shibler #ifdef hp700
3353923Shibler struct hil_dev {
3453923Shibler 	vu_char	hil_rsthold;	/* (WO) reset hold (and Serial #3) */
3553923Shibler 	vu_char	hil_resv1[2047];
3653923Shibler 	vu_char	hil_data;	/* send/receive data to/from 8042 */
3753923Shibler 	vu_char	hil_cmd;	/* status/control to/from 8042 */
3853923Shibler 	vu_char	hil_resv2[1022];
3953923Shibler 	vu_char	hil_rstrel;	/* (WO) reset release (and Serial #3) */
4041480Smckusick 
4153923Shibler };
4253923Shibler #else
4353923Shibler struct	hil_dev {
4453923Shibler 	vu_int hil_data;
4553923Shibler 	vu_int hil_pad;
4653923Shibler 	vu_int hil_cmd;
4753923Shibler };
4853923Shibler #endif
4953923Shibler #endif
5053923Shibler #define hil_stat hil_cmd
5153923Shibler 
5253923Shibler #if defined(hp300) || defined(hp700)
5353923Shibler #define READHILDATA(x)		((x)->hil_data)
5453923Shibler #define READHILSTAT(x)		((x)->hil_stat)
5553923Shibler #define READHILCMD(x)		((x)->hil_cmd)
5653923Shibler #define WRITEHILDATA(x, y)	((x)->hil_data = (y))
5753923Shibler #define WRITEHILSTAT(x, y)	((x)->hil_stat = (y))
5853923Shibler #define WRITEHILCMD(x, y)	((x)->hil_cmd  = (y))
5953923Shibler #else
6053923Shibler #define READHILDATA(x)		((x)->hil_data >> 24)
6153923Shibler #define READHILSTAT(x)		((x)->hil_stat >> 24)
6253923Shibler #define READHILCMD(x)		((x)->hil_cmd  >> 24)
6353923Shibler #define WRITEHILDATA(x, y)	((x)->hil_data = ((y) << 24))
6453923Shibler #define WRITEHILSTAT(x, y)	((x)->hil_stat = ((y) << 24))
6553923Shibler #define WRITEHILCMD(x, y)	((x)->hil_cmd  = ((y) << 24))
6653923Shibler #endif
6753923Shibler 
6853923Shibler #ifdef hp300
6953923Shibler #define splhil()		spl1()
7053923Shibler #else
7153923Shibler extern int hilspl;
7253923Shibler #define splhil()		splx(hilspl)
7353923Shibler #endif
7453923Shibler 
7541480Smckusick #define	HIL_BUSY		0x02
7653923Shibler #define	HIL_DATA_RDY		0x01
7741480Smckusick 
7853923Shibler #define HILWAIT(hil_dev)	while ((READHILSTAT(hil_dev) & HIL_BUSY))
7953923Shibler #define HILDATAWAIT(hil_dev)	while (!(READHILSTAT(hil_dev) & HIL_DATA_RDY))
8041480Smckusick 
8141480Smckusick /* HIL status bits */
8241480Smckusick #define	HIL_POLLDATA	0x10		/* HIL poll data follows */
8353923Shibler #define	HIL_COMMAND	0x08		/* Start of original command */
8453923Shibler #define	HIL_ERROR	0x080		/* HIL error */
8553923Shibler #define	HIL_RECONFIG	0x080		/* HIL has reconfigured */
8641480Smckusick #define	HIL_STATMASK	(HIL_DATA | HIL_COMMAND)
8741480Smckusick 
8853923Shibler #define	HIL_SSHIFT	4		/* Bits to shift status over */
8953923Shibler #define	HIL_SMASK	0xF		/* Service request status mask */
9053923Shibler #define	HIL_DEVMASK	0x07
9141480Smckusick 
9241480Smckusick /* HIL status types */
9341480Smckusick #define	HIL_STATUS	0x5		/* HIL status in data register */
9441480Smckusick #define	HIL_DATA	0x6		/* HIL data in data register */
9541480Smckusick #define	HIL_CTRLSHIFT	0x8		/* key + CTRL + SHIFT */
9641480Smckusick #define	HIL_CTRL	0x9		/* key + CTRL */
9741480Smckusick #define	HIL_SHIFT	0xA		/* key + SHIFT */
9841480Smckusick #define	HIL_KEY		0xB		/* key only */
9953923Shibler #define	HIL_68K		0x4		/* Data from the 68k is ready */
10041480Smckusick 
10141480Smckusick /* HIL commands */
10241480Smckusick #define	HIL_SETARD	0xA0		/* set auto-repeat delay */
10341480Smckusick #define	HIL_SETARR	0xA2		/* set auto-repeat rate */
10441480Smckusick #define	HIL_SETTONE	0xA3		/* set tone generator */
10553923Shibler #define	HIL_CNMT	0xB2		/* clear nmi */
10653923Shibler #define	HIL_INTON	0x5C		/* Turn on interrupts. */
10753923Shibler #define	HIL_INTOFF	0x5D		/* Turn off interrupts. */
10853923Shibler #define	HIL_TRIGGER	0xC5		/* trigger command */
10953923Shibler #define	HIL_STARTCMD	0xE0		/* start loop command */
11053923Shibler #define	HIL_TIMEOUT	0xFE		/* timeout */
11153923Shibler #define	HIL_READTIME	0x13		/* Read real time register */
11241480Smckusick 
11341480Smckusick /* Read/write various registers on the 8042. */
11441480Smckusick #define	HIL_READBUSY		0x02	/* internal "busy" register */
11553923Shibler #define	HIL_READKBDLANG		0x12	/* read keyboard language code */
11641480Smckusick #define	HIL_READKBDSADR	 	0xF9
11741480Smckusick #define	HIL_WRITEKBDSADR 	0xE9
11853923Shibler #define	HIL_READLPSTAT  	0xFA
11953923Shibler #define	HIL_WRITELPSTAT 	0xEA
12053923Shibler #define	HIL_READLPCTRL  	0xFB
12153923Shibler #define	HIL_WRITELPCTRL 	0xEB
12241480Smckusick 
12341480Smckusick /* BUSY bits */
12453923Shibler #define	BSY_LOOPBUSY	0x04
12541480Smckusick 
12641480Smckusick /* LPCTRL bits */
12753923Shibler #define	LPC_AUTOPOLL	0x01	/* enable auto-polling */
12853923Shibler #define	LPC_NOERROR	0x02	/* don't report errors */
12953923Shibler #define	LPC_NORECONF	0x04	/* don't report reconfigure */
13053923Shibler #define	LPC_KBDCOOK	0x10	/* cook all keyboards */
13153923Shibler #define	LPC_RECONF	0x80	/* reconfigure the loop */
13241480Smckusick 
13341480Smckusick /* LPSTAT bits */
13453923Shibler #define	LPS_DEVMASK	0x07	/* number of loop devices */
13553923Shibler #define	LPS_CONFGOOD	0x08	/* reconfiguration worked */
13653923Shibler #define	LPS_CONFFAIL	0x80	/* reconfiguration failed */
13741480Smckusick 
13841480Smckusick /* HIL packet headers */
13953923Shibler #define	HIL_MOUSEDATA   0x2
14053923Shibler #define	HIL_KBDDATA     0x40
14141480Smckusick 
14253923Shibler #define	HIL_MOUSEMOTION	0x02	/* mouse movement event */
14353923Shibler #define	HIL_KBDBUTTON	0x40	/* keyboard button event */
14453923Shibler #define	HIL_MOUSEBUTTON 0x40	/* mouse button event */
14553923Shibler #define	HIL_BUTTONBOX   0x60	/* button box event */
14653923Shibler #define	HIL_TABLET      0x02	/* tablet motion event */
14753923Shibler #define	HIL_KNOBBOX     0x03	/* knob box motion data */
14841480Smckusick 
14953923Shibler /* For setting auto repeat on the keyboard */
15053923Shibler #define	ar_format(x)	~((x - 10) / 10)
15153923Shibler #define	KBD_ARD		400	/* initial delay in msec (10 - 2560) */
15253923Shibler #define	KBD_ARR		60	/* rate (10 - 2550 msec, 2551 == off) */
15353923Shibler 
15453923Shibler #ifdef hp300
15541480Smckusick /* Magic */
15653923Shibler #define	KBDNMISTAT	((volatile char *)IIOV(0x478005))
15753923Shibler #define	KBDNMI		0x04
15853923Shibler #endif
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