1*44026SbosticThe pattern looks like this: 2*44026Sbostic 3*44026Sbostic movl P,rA 4*44026Sbostic xxxl3 Q,rA,rB 5*44026Sbostic yyyl2 R,rB 6*44026Sbostic 7*44026Sbosticxxx and yyy may be any of several binary operators like 'add', 8*44026Sbostic'mul', 'and'. rA and rB must both be temporary registers. 9*44026Sbostic 10*44026SbosticHere's how it happens... We work backwards from the last instruction: 11*44026Sbostic 12*44026Sbostic movl P,rA 13*44026Sbostic xxxl3 Q,rA,rB 14*44026Sbostic=> yyyl2 R,rB 15*44026Sbostic 16*44026SbosticHere we note that rB is a 'modify' operand and mark rB alive. 17*44026Sbostic 18*44026Sbostic movl P,rA 19*44026Sbostic=> xxxl3 Q,rA,rB 20*44026Sbostic yyyl2 R,rB 21*44026Sbostic 22*44026SbosticWe see that this instruction writes into rB and kills it, but since 23*44026SbosticrB is previously alive, the store is not redundant and we leave it 24*44026Sbosticalone. 25*44026Sbostic 26*44026Sbostic=> movl P,rA 27*44026Sbostic xxxl3 Q,rA,rB 28*44026Sbostic yyyl2 R,rB 29*44026Sbostic 30*44026SbosticWe notice that this is a useless store into rA, since we can replace 31*44026SbosticrA with P in the following instruction. We delete this instruction 32*44026Sbosticand modify the following one. 33*44026Sbostic 34*44026Sbostic=> xxxl3 Q,P,rB 35*44026Sbostic yyyl2 R,rB 36*44026Sbostic 37*44026SbosticUnfortunately rB is no longer alive because we killed it evaluating 38*44026Sbosticthe earlier form of this very instruction. The optimizer assumes that 39*44026Sbosticwe have a redundant store and deletes the instruction. Bleah. 40