1*d19a5360Sjmatthew /* $OpenBSD: umct.h,v 1.5 2015/04/26 06:38:04 jmatthew Exp $ */ 2cbe53efcSnate /* $NetBSD: umct.h,v 1.1 2001/03/28 18:42:13 ichiro Exp $ */ 3cbe53efcSnate /* 4cbe53efcSnate * Copyright (c) 2001 The NetBSD Foundation, Inc. 5cbe53efcSnate * All rights reserved. 6cbe53efcSnate * 7cbe53efcSnate * This code is derived from software contributed to The NetBSD Foundation 8cbe53efcSnate * by Ichiro FUKUHARA (ichiro@ichiro.org). 9cbe53efcSnate * 10cbe53efcSnate * Redistribution and use in source and binary forms, with or without 11cbe53efcSnate * modification, are permitted provided that the following conditions 12cbe53efcSnate * are met: 13cbe53efcSnate * 1. Redistributions of source code must retain the above copyright 14cbe53efcSnate * notice, this list of conditions and the following disclaimer. 15cbe53efcSnate * 2. Redistributions in binary form must reproduce the above copyright 16cbe53efcSnate * notice, this list of conditions and the following disclaimer in the 17cbe53efcSnate * documentation and/or other materials provided with the distribution. 18cbe53efcSnate * 19cbe53efcSnate * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20cbe53efcSnate * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21cbe53efcSnate * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22cbe53efcSnate * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23cbe53efcSnate * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24cbe53efcSnate * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25cbe53efcSnate * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26cbe53efcSnate * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27cbe53efcSnate * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28cbe53efcSnate * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29cbe53efcSnate * POSSIBILITY OF SUCH DAMAGE. 30cbe53efcSnate */ 31cbe53efcSnate 32cbe53efcSnate /* 33cbe53efcSnate * Vendor Request Interface 34cbe53efcSnate */ 35cbe53efcSnate #define UMCT_SET_REQUEST 0x40 36cbe53efcSnate #define UMCT_GET_REQUEST 0xc0 37cbe53efcSnate 38cbe53efcSnate #define REQ_SET_BAUD_RATE 5 /* Set Baud Rate Divisor */ 39cbe53efcSnate #define LENGTH_BAUD_RATE 4 40cbe53efcSnate 41cbe53efcSnate #define REQ_GET_MSR 2 /* Get Modem Status Register (MSR) */ 42cbe53efcSnate #define LENGTH_GET_MSR 1 43cbe53efcSnate 44cbe53efcSnate #define REQ_GET_LCR 6 /* Get Line Control Register (LCR) */ 45cbe53efcSnate #define LENGTH_GET_LCR 1 46cbe53efcSnate 47cbe53efcSnate #define REQ_SET_LCR 7 /* Set Line Control Register (LCR) */ 48cbe53efcSnate #define LENGTH_SET_LCR 1 49cbe53efcSnate 50cbe53efcSnate #define REQ_SET_MCR 10 /* Set Modem Control Register (MCR) */ 51cbe53efcSnate #define LENGTH_SET_MCR 1 52cbe53efcSnate 53*d19a5360Sjmatthew #define REQ_UNKNOWN1 11 /* Unknown functionality */ 54*d19a5360Sjmatthew #define LENGTH_UNKNOWN1 1 55*d19a5360Sjmatthew 56*d19a5360Sjmatthew #define REQ_SET_CTS 12 /* Apparently controls CTS */ 57*d19a5360Sjmatthew #define LENGTH_SET_CTS 1 58*d19a5360Sjmatthew 59cbe53efcSnate /* 60cbe53efcSnate * Baud rate (divisor) 61cbe53efcSnate */ 62cbe53efcSnate #define UMCT_BAUD_RATE(b) (115200/b) 63cbe53efcSnate 64cbe53efcSnate /* 65cbe53efcSnate * Line Control Register (LCR) 66cbe53efcSnate */ 67cbe53efcSnate #define LCR_SET_BREAK 0x40 68cbe53efcSnate #define LCR_PARITY_EVEN 0x18 69cbe53efcSnate #define LCR_PARITY_ODD 0x08 70cbe53efcSnate #define LCR_PARITY_NONE 0x00 71cbe53efcSnate #define LCR_DATA_BITS_5 0x00 72cbe53efcSnate #define LCR_DATA_BITS_6 0x01 73cbe53efcSnate #define LCR_DATA_BITS_7 0x02 74cbe53efcSnate #define LCR_DATA_BITS_8 0x03 75cbe53efcSnate #define LCR_STOP_BITS_2 0x04 76cbe53efcSnate #define LCR_STOP_BITS_1 0x00 77cbe53efcSnate 78cbe53efcSnate /* 79cbe53efcSnate * Modem Control Register (MCR) 80cbe53efcSnate */ 81cbe53efcSnate #define MCR_NONE 0x8 82cbe53efcSnate #define MCR_RTS 0xa 83cbe53efcSnate #define MCR_DTR 0x9 84cbe53efcSnate 85cbe53efcSnate /* 86cbe53efcSnate * Modem Status Register (MSR) 87cbe53efcSnate */ 88cbe53efcSnate #define MSR_CD 0x80 /* Current CD */ 89cbe53efcSnate #define MSR_RI 0x40 /* Current RI */ 90cbe53efcSnate #define MSR_DSR 0x20 /* Current DSR */ 91cbe53efcSnate #define MSR_CTS 0x10 /* Current CTS */ 92cbe53efcSnate #define MSR_DCD 0x08 /* Delta CD */ 93cbe53efcSnate #define MSR_DRI 0x04 /* Delta RI */ 94cbe53efcSnate #define MSR_DDSR 0x02 /* Delta DSR */ 95cbe53efcSnate #define MSR_DCTS 0x01 /* Delta CTS */ 96cbe53efcSnate 97cbe53efcSnate /* 98cbe53efcSnate * Line Status Register (LSR) 99cbe53efcSnate */ 100cbe53efcSnate #define LSR_ERR 0x80 /* OE | PE | FE | BI */ 101cbe53efcSnate #define LSR_TEMT 0x40 /* transmit register empty */ 102cbe53efcSnate #define LSR_THRE 0x20 /* transmit holding register empty */ 103cbe53efcSnate #define LSR_BI 0x10 /* break indicator */ 104cbe53efcSnate #define LSR_FE 0x08 /* framing error */ 105cbe53efcSnate #define LSR_OE 0x02 /* overrun error */ 106cbe53efcSnate #define LSR_PE 0x04 /* parity error */ 107cbe53efcSnate #define LSR_OE 0x02 /* overrun error */ 108cbe53efcSnate #define LSR_DR 0x01 /* receive data ready */ 109