xref: /openbsd-src/sys/dev/usb/if_rum.c (revision 81508fe356eb7772a68118f65f91723ce5261d7d)
1*81508fe3Sjsg /*	$OpenBSD: if_rum.c,v 1.129 2024/05/23 03:21:08 jsg Exp $	*/
214761d2dSdamien 
3b9520dbfSniallo /*-
48f59dc49Sdamien  * Copyright (c) 2005-2007 Damien Bergamini <damien.bergamini@free.fr>
5b9520dbfSniallo  * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org>
6b9520dbfSniallo  *
7b9520dbfSniallo  * Permission to use, copy, modify, and distribute this software for any
8b9520dbfSniallo  * purpose with or without fee is hereby granted, provided that the above
9b9520dbfSniallo  * copyright notice and this permission notice appear in all copies.
10b9520dbfSniallo  *
11b9520dbfSniallo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12b9520dbfSniallo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13b9520dbfSniallo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14b9520dbfSniallo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15b9520dbfSniallo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16b9520dbfSniallo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17b9520dbfSniallo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18b9520dbfSniallo  */
19b9520dbfSniallo 
2014761d2dSdamien /*-
21fc0d81f2Sdamien  * Ralink Technology RT2501USB/RT2601USB chipset driver
2284c5366eSdamien  * http://www.ralinktech.com.tw/
23b9520dbfSniallo  */
24b9520dbfSniallo 
25b9520dbfSniallo #include "bpfilter.h"
26b9520dbfSniallo 
27b9520dbfSniallo #include <sys/param.h>
28b9520dbfSniallo #include <sys/sockio.h>
29b9520dbfSniallo #include <sys/mbuf.h>
30b9520dbfSniallo #include <sys/systm.h>
31b9520dbfSniallo #include <sys/timeout.h>
32b9520dbfSniallo #include <sys/device.h>
339b18ffb8Sguenther #include <sys/endian.h>
34b9520dbfSniallo 
35b9520dbfSniallo #include <machine/intr.h>
36b9520dbfSniallo 
37b9520dbfSniallo #if NBPFILTER > 0
38b9520dbfSniallo #include <net/bpf.h>
39b9520dbfSniallo #endif
40b9520dbfSniallo #include <net/if.h>
41b9520dbfSniallo #include <net/if_dl.h>
42b9520dbfSniallo #include <net/if_media.h>
43b9520dbfSniallo 
44b9520dbfSniallo #include <netinet/in.h>
45b9520dbfSniallo #include <netinet/if_ether.h>
46b9520dbfSniallo 
47b9520dbfSniallo #include <net80211/ieee80211_var.h>
4814761d2dSdamien #include <net80211/ieee80211_amrr.h>
49b9520dbfSniallo #include <net80211/ieee80211_radiotap.h>
50b9520dbfSniallo 
51b9520dbfSniallo #include <dev/usb/usb.h>
52b9520dbfSniallo #include <dev/usb/usbdi.h>
53b9520dbfSniallo #include <dev/usb/usbdevs.h>
54b9520dbfSniallo 
55b9520dbfSniallo #include <dev/usb/if_rumreg.h>
56b9520dbfSniallo #include <dev/usb/if_rumvar.h>
57b9520dbfSniallo 
58b9520dbfSniallo #ifdef RUM_DEBUG
59695146ceSjsg #define DPRINTF(x)	do { if (rum_debug) printf x; } while (0)
60695146ceSjsg #define DPRINTFN(n, x)	do { if (rum_debug >= (n)) printf x; } while (0)
6168a8f278Sjsg int rum_debug = 0;
62b9520dbfSniallo #else
63b9520dbfSniallo #define DPRINTF(x)
64b9520dbfSniallo #define DPRINTFN(n, x)
65b9520dbfSniallo #endif
66b9520dbfSniallo 
67b9520dbfSniallo /* various supported device vendors/products */
68b9520dbfSniallo static const struct usb_devno rum_devs[] = {
69efd02d40Sjsg 	{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_HWU54DM },
70efd02d40Sjsg 	{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_RT2573_2 },
71efd02d40Sjsg 	{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_RT2573_3 },
72efd02d40Sjsg 	{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_RT2573_4 },
73efd02d40Sjsg 	{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_WUG2700 },
74efd02d40Sjsg 	{ USB_VENDOR_AMIT,		USB_PRODUCT_AMIT_CGWLUSB2GO },
75efd02d40Sjsg 	{ USB_VENDOR_ASUS,		USB_PRODUCT_ASUS_RT2573_1 },
76efd02d40Sjsg 	{ USB_VENDOR_ASUS,		USB_PRODUCT_ASUS_RT2573_2 },
77d66ace29Sjsg 	{ USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_F5D7050A },
78372fbb40Sjsg 	{ USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_F5D9050V3 },
795811628bSderaadt 	{ USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_F5D9050C },
807117f35aSjsg 	{ USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_WUSB200 },
81d66ace29Sjsg 	{ USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_WUSB54GC },
82c8c5f553Sjsg 	{ USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_WUSB54GR },
83d66ace29Sjsg 	{ USB_VENDOR_CONCEPTRONIC2,	USB_PRODUCT_CONCEPTRONIC2_C54RU2 },
842a4cd6faSderaadt 	{ USB_VENDOR_CONCEPTRONIC2,	USB_PRODUCT_CONCEPTRONIC2_RT2573 },
85ecf81798Sjsg 	{ USB_VENDOR_COREGA,		USB_PRODUCT_COREGA_CGWLUSB2GL },
865202e4edSjsg 	{ USB_VENDOR_COREGA,		USB_PRODUCT_COREGA_CGWLUSB2GPX },
87d66ace29Sjsg 	{ USB_VENDOR_DICKSMITH,		USB_PRODUCT_DICKSMITH_CWD854F },
88f0451b8eSjsg 	{ USB_VENDOR_DICKSMITH,		USB_PRODUCT_DICKSMITH_RT2573 },
896cb2966cSjsg 	{ USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWA111 },
90318069b7Sderaadt 	{ USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWA110 },
91d66ace29Sjsg 	{ USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWLG122C1 },
92d66ace29Sjsg 	{ USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_WUA1340 },
935ecd424eSjsg 	{ USB_VENDOR_EDIMAX,		USB_PRODUCT_EDIMAX_EW7318 },
945ecd424eSjsg 	{ USB_VENDOR_EDIMAX,		USB_PRODUCT_EDIMAX_EW7618 },
95d66ace29Sjsg 	{ USB_VENDOR_GIGABYTE,		USB_PRODUCT_GIGABYTE_GNWB01GS },
968f59dc49Sdamien 	{ USB_VENDOR_GIGABYTE,		USB_PRODUCT_GIGABYTE_GNWI05GS },
97f0451b8eSjsg 	{ USB_VENDOR_GIGASET,		USB_PRODUCT_GIGASET_RT2573 },
98f0451b8eSjsg 	{ USB_VENDOR_GOODWAY,		USB_PRODUCT_GOODWAY_RT2573 },
99c8c5f553Sjsg 	{ USB_VENDOR_GUILLEMOT,		USB_PRODUCT_GUILLEMOT_HWGUSB254LB },
100c8c5f553Sjsg 	{ USB_VENDOR_GUILLEMOT,		USB_PRODUCT_GUILLEMOT_HWGUSB254V2AP },
101efd02d40Sjsg 	{ USB_VENDOR_HUAWEI3COM,	USB_PRODUCT_HUAWEI3COM_WUB320G },
102c8c5f553Sjsg 	{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_G54HP },
10349fe224aSitojun 	{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_SG54HP },
104503f35a5Skevlo 	{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_SG54HG },
105efd02d40Sjsg 	{ USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_1 },
106f0451b8eSjsg 	{ USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_2 },
107f0451b8eSjsg 	{ USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_3 },
108efd02d40Sjsg 	{ USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_4 },
109efd02d40Sjsg 	{ USB_VENDOR_NOVATECH,		USB_PRODUCT_NOVATECH_RT2573 },
110efd02d40Sjsg 	{ USB_VENDOR_PLANEX2,		USB_PRODUCT_PLANEX2_GWUS54HP },
111efd02d40Sjsg 	{ USB_VENDOR_PLANEX2,		USB_PRODUCT_PLANEX2_GWUS54MINI2 },
112f0451b8eSjsg 	{ USB_VENDOR_PLANEX2,		USB_PRODUCT_PLANEX2_GWUSMM },
113f0451b8eSjsg 	{ USB_VENDOR_QCOM,		USB_PRODUCT_QCOM_RT2573 },
114f0451b8eSjsg 	{ USB_VENDOR_QCOM,		USB_PRODUCT_QCOM_RT2573_2 },
115dbabc634Sjsg 	{ USB_VENDOR_QCOM,		USB_PRODUCT_QCOM_RT2573_3 },
116f0451b8eSjsg 	{ USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2573 },
117c8c5f553Sjsg 	{ USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2573_2 },
118f0451b8eSjsg 	{ USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2671 },
119f0451b8eSjsg 	{ USB_VENDOR_SITECOMEU,		USB_PRODUCT_SITECOMEU_WL113R2 },
120f0451b8eSjsg 	{ USB_VENDOR_SITECOMEU,		USB_PRODUCT_SITECOMEU_WL172 },
1215bf8f910Sderaadt 	{ USB_VENDOR_SURECOM,		USB_PRODUCT_SURECOM_RT2573 },
122dbabc634Sjsg 	{ USB_VENDOR_SPARKLAN,		USB_PRODUCT_SPARKLAN_RT2573 },
123dbabc634Sjsg 	{ USB_VENDOR_ZYXEL,		USB_PRODUCT_ZYXEL_RT2573 }
124b9520dbfSniallo };
125b9520dbfSniallo 
126ef89f9e6Smpi void		rum_attachhook(struct device *);
12778315254Smbalmer int		rum_alloc_tx_list(struct rum_softc *);
12878315254Smbalmer void		rum_free_tx_list(struct rum_softc *);
12978315254Smbalmer int		rum_alloc_rx_list(struct rum_softc *);
13078315254Smbalmer void		rum_free_rx_list(struct rum_softc *);
13178315254Smbalmer int		rum_media_change(struct ifnet *);
13278315254Smbalmer void		rum_next_scan(void *);
13378315254Smbalmer void		rum_task(void *);
13445eff2ebSdamien int		rum_newstate(struct ieee80211com *, enum ieee80211_state, int);
135ab0b1be7Smglocker void		rum_txeof(struct usbd_xfer *, void *, usbd_status);
136ab0b1be7Smglocker void		rum_rxeof(struct usbd_xfer *, void *, usbd_status);
137b9520dbfSniallo #if NBPFILTER > 0
13878315254Smbalmer uint8_t		rum_rxrate(const struct rum_rx_desc *);
139b9520dbfSniallo #endif
14078315254Smbalmer int		rum_ack_rate(struct ieee80211com *, int);
14178315254Smbalmer uint16_t	rum_txtime(int, int, uint32_t);
14278315254Smbalmer uint8_t		rum_plcp_signal(int);
14345eff2ebSdamien void		rum_setup_tx_desc(struct rum_softc *, struct rum_tx_desc *,
14445eff2ebSdamien 		    uint32_t, uint16_t, int, int);
14578315254Smbalmer int		rum_tx_data(struct rum_softc *, struct mbuf *,
14614761d2dSdamien 		    struct ieee80211_node *);
14778315254Smbalmer void		rum_start(struct ifnet *);
14878315254Smbalmer void		rum_watchdog(struct ifnet *);
14978315254Smbalmer int		rum_ioctl(struct ifnet *, u_long, caddr_t);
15045eff2ebSdamien void		rum_eeprom_read(struct rum_softc *, uint16_t, void *, int);
15178315254Smbalmer uint32_t	rum_read(struct rum_softc *, uint16_t);
15245eff2ebSdamien void		rum_read_multi(struct rum_softc *, uint16_t, void *, int);
15378315254Smbalmer void		rum_write(struct rum_softc *, uint16_t, uint32_t);
15445eff2ebSdamien void		rum_write_multi(struct rum_softc *, uint16_t, void *, size_t);
15578315254Smbalmer void		rum_bbp_write(struct rum_softc *, uint8_t, uint8_t);
15678315254Smbalmer uint8_t		rum_bbp_read(struct rum_softc *, uint8_t);
15778315254Smbalmer void		rum_rf_write(struct rum_softc *, uint8_t, uint32_t);
15878315254Smbalmer void		rum_select_antenna(struct rum_softc *);
15978315254Smbalmer void		rum_enable_mrr(struct rum_softc *);
16078315254Smbalmer void		rum_set_txpreamble(struct rum_softc *);
16178315254Smbalmer void		rum_set_basicrates(struct rum_softc *);
16278315254Smbalmer void		rum_select_band(struct rum_softc *,
163b9520dbfSniallo 		    struct ieee80211_channel *);
16445eff2ebSdamien void		rum_set_chan(struct rum_softc *, struct ieee80211_channel *);
16578315254Smbalmer void		rum_enable_tsf_sync(struct rum_softc *);
16678315254Smbalmer void		rum_update_slot(struct rum_softc *);
16778315254Smbalmer void		rum_set_bssid(struct rum_softc *, const uint8_t *);
16878315254Smbalmer void		rum_set_macaddr(struct rum_softc *, const uint8_t *);
16978315254Smbalmer void		rum_update_promisc(struct rum_softc *);
17078315254Smbalmer const char	*rum_get_rf(int);
17178315254Smbalmer void		rum_read_eeprom(struct rum_softc *);
17278315254Smbalmer int		rum_bbp_init(struct rum_softc *);
17378315254Smbalmer int		rum_init(struct ifnet *);
17478315254Smbalmer void		rum_stop(struct ifnet *, int);
17545eff2ebSdamien int		rum_load_microcode(struct rum_softc *, const u_char *, size_t);
176171ac09aSdamien #ifndef IEEE80211_STA_ONLY
17778315254Smbalmer int		rum_prepare_beacon(struct rum_softc *);
178171ac09aSdamien #endif
17945eff2ebSdamien void		rum_newassoc(struct ieee80211com *, struct ieee80211_node *,
18045eff2ebSdamien 		    int);
18145eff2ebSdamien void		rum_amrr_start(struct rum_softc *, struct ieee80211_node *);
18278315254Smbalmer void		rum_amrr_timeout(void *);
183ab0b1be7Smglocker void		rum_amrr_update(struct usbd_xfer *, void *,
18414761d2dSdamien 		    usbd_status status);
185b9520dbfSniallo 
186b9520dbfSniallo static const struct {
187b9520dbfSniallo 	uint32_t	reg;
188b9520dbfSniallo 	uint32_t	val;
189b9520dbfSniallo } rum_def_mac[] = {
190ae33bb09Sdamien 	RT2573_DEF_MAC
191b9520dbfSniallo };
192b9520dbfSniallo 
193b9520dbfSniallo static const struct {
194b9520dbfSniallo 	uint8_t	reg;
195b9520dbfSniallo 	uint8_t	val;
196b9520dbfSniallo } rum_def_bbp[] = {
197ae33bb09Sdamien 	RT2573_DEF_BBP
198b9520dbfSniallo };
199b9520dbfSniallo 
200b9520dbfSniallo static const struct rfprog {
201b9520dbfSniallo 	uint8_t		chan;
202ae33bb09Sdamien 	uint32_t	r1, r2, r3, r4;
20314761d2dSdamien }  rum_rf5226[] = {
20414761d2dSdamien 	RT2573_RF5226
20514761d2dSdamien }, rum_rf5225[] = {
20614761d2dSdamien 	RT2573_RF5225
207b9520dbfSniallo };
208b9520dbfSniallo 
2099f5f6d50Smbalmer int rum_match(struct device *, void *, void *);
2109f5f6d50Smbalmer void rum_attach(struct device *, struct device *, void *);
2119f5f6d50Smbalmer int rum_detach(struct device *, int);
2129f5f6d50Smbalmer 
2139f5f6d50Smbalmer struct cfdriver rum_cd = {
2149f5f6d50Smbalmer 	NULL, "rum", DV_IFNET
2159f5f6d50Smbalmer };
2169f5f6d50Smbalmer 
2179f5f6d50Smbalmer const struct cfattach rum_ca = {
21853c6612dSmpi 	sizeof(struct rum_softc), rum_match, rum_attach, rum_detach
2199f5f6d50Smbalmer };
220b9520dbfSniallo 
221de5d9ff0Sjsg int
rum_match(struct device * parent,void * match,void * aux)222de5d9ff0Sjsg rum_match(struct device *parent, void *match, void *aux)
22374a1cafeSdamien {
224de5d9ff0Sjsg 	struct usb_attach_arg *uaa = aux;
22574a1cafeSdamien 
2267ebc5b51Smpi 	if (uaa->iface == NULL || uaa->configno != 1)
22774a1cafeSdamien 		return UMATCH_NONE;
22874a1cafeSdamien 
22974a1cafeSdamien 	return (usb_lookup(rum_devs, uaa->vendor, uaa->product) != NULL) ?
2307ebc5b51Smpi 	    UMATCH_VENDOR_PRODUCT_CONF_IFACE : UMATCH_NONE;
23174a1cafeSdamien }
23274a1cafeSdamien 
23378315254Smbalmer void
rum_attachhook(struct device * self)234ef89f9e6Smpi rum_attachhook(struct device *self)
235b9520dbfSniallo {
236ef89f9e6Smpi 	struct rum_softc *sc = (struct rum_softc *)self;
237fc0d81f2Sdamien 	const char *name = "rum-rt2573";
238b9520dbfSniallo 	u_char *ucode;
239b9520dbfSniallo 	size_t size;
2402d857b29Sdamien 	int error;
241b9520dbfSniallo 
2422d857b29Sdamien 	if ((error = loadfirmware(name, &ucode, &size)) != 0) {
2432d857b29Sdamien 		printf("%s: failed loadfirmware of file %s (error %d)\n",
2444ab2b9feSmbalmer 		    sc->sc_dev.dv_xname, name, error);
2452d857b29Sdamien 		return;
246b9520dbfSniallo 	}
247b9520dbfSniallo 
248b9520dbfSniallo 	if (rum_load_microcode(sc, ucode, size) != 0) {
249b9520dbfSniallo 		printf("%s: could not load 8051 microcode\n",
2504ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
251b9520dbfSniallo 	}
2522d857b29Sdamien 
253c9ee9455Sderaadt 	free(ucode, M_DEVBUF, size);
254b9520dbfSniallo }
255b9520dbfSniallo 
256de5d9ff0Sjsg void
rum_attach(struct device * parent,struct device * self,void * aux)257de5d9ff0Sjsg rum_attach(struct device *parent, struct device *self, void *aux)
258b9520dbfSniallo {
259de5d9ff0Sjsg 	struct rum_softc *sc = (struct rum_softc *)self;
260de5d9ff0Sjsg 	struct usb_attach_arg *uaa = aux;
261b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
262b9520dbfSniallo 	struct ifnet *ifp = &ic->ic_if;
263b9520dbfSniallo 	usb_interface_descriptor_t *id;
264b9520dbfSniallo 	usb_endpoint_descriptor_t *ed;
265b9520dbfSniallo 	int i, ntries;
266b9520dbfSniallo 	uint32_t tmp;
267b9520dbfSniallo 
268b9520dbfSniallo 	sc->sc_udev = uaa->device;
2697ebc5b51Smpi 	sc->sc_iface = uaa->iface;
270b9520dbfSniallo 
271b9520dbfSniallo 	/*
272b9520dbfSniallo 	 * Find endpoints.
273b9520dbfSniallo 	 */
274b9520dbfSniallo 	id = usbd_get_interface_descriptor(sc->sc_iface);
275b9520dbfSniallo 
276b9520dbfSniallo 	sc->sc_rx_no = sc->sc_tx_no = -1;
277b9520dbfSniallo 	for (i = 0; i < id->bNumEndpoints; i++) {
278b9520dbfSniallo 		ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
279b9520dbfSniallo 		if (ed == NULL) {
280b9520dbfSniallo 			printf("%s: no endpoint descriptor for iface %d\n",
2814ab2b9feSmbalmer 			    sc->sc_dev.dv_xname, i);
282de5d9ff0Sjsg 			return;
283b9520dbfSniallo 		}
284b9520dbfSniallo 
285b9520dbfSniallo 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
286b9520dbfSniallo 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
287b9520dbfSniallo 			sc->sc_rx_no = ed->bEndpointAddress;
288b9520dbfSniallo 		else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
289b9520dbfSniallo 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
290b9520dbfSniallo 			sc->sc_tx_no = ed->bEndpointAddress;
291b9520dbfSniallo 	}
292b9520dbfSniallo 	if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
2934ab2b9feSmbalmer 		printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
294de5d9ff0Sjsg 		return;
295b9520dbfSniallo 	}
296b9520dbfSniallo 
297c33449aaSjakemsr 	usb_init_task(&sc->sc_task, rum_task, sc, USB_TASK_TYPE_GENERIC);
298bc303e9bSdamien 	timeout_set(&sc->scan_to, rum_next_scan, sc);
299b9520dbfSniallo 
30014761d2dSdamien 	sc->amrr.amrr_min_success_threshold =  1;
30114761d2dSdamien 	sc->amrr.amrr_max_success_threshold = 10;
302bc303e9bSdamien 	timeout_set(&sc->amrr_to, rum_amrr_timeout, sc);
30314761d2dSdamien 
30414761d2dSdamien 	/* retrieve RT2573 rev. no */
305b9520dbfSniallo 	for (ntries = 0; ntries < 1000; ntries++) {
306e0d596c4Sdamien 		if ((tmp = rum_read(sc, RT2573_MAC_CSR0)) != 0)
307b9520dbfSniallo 			break;
308b9520dbfSniallo 		DELAY(1000);
309b9520dbfSniallo 	}
310b9520dbfSniallo 	if (ntries == 1000) {
311b9520dbfSniallo 		printf("%s: timeout waiting for chip to settle\n",
3124ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
313de5d9ff0Sjsg 		return;
314b9520dbfSniallo 	}
315b9520dbfSniallo 
316e0d596c4Sdamien 	/* retrieve MAC address and various other things from EEPROM */
317e0d596c4Sdamien 	rum_read_eeprom(sc);
318e0d596c4Sdamien 
319a5c83531Sdamien 	printf("%s: MAC/BBP RT%04x (rev 0x%05x), RF %s, address %s\n",
3204ab2b9feSmbalmer 	    sc->sc_dev.dv_xname, sc->macbbp_rev, tmp,
321e0d596c4Sdamien 	    rum_get_rf(sc->rf_rev), ether_sprintf(ic->ic_myaddr));
322e0d596c4Sdamien 
323ef89f9e6Smpi 	config_mountroot(self, rum_attachhook);
324b9520dbfSniallo 
325b9520dbfSniallo 	ic->ic_phytype = IEEE80211_T_OFDM;	/* not only, but not used */
326b9520dbfSniallo 	ic->ic_opmode = IEEE80211_M_STA;	/* default to BSS mode */
327b9520dbfSniallo 	ic->ic_state = IEEE80211_S_INIT;
328b9520dbfSniallo 
329b9520dbfSniallo 	/* set device capabilities */
330b9520dbfSniallo 	ic->ic_caps =
331b9520dbfSniallo 	    IEEE80211_C_MONITOR |	/* monitor mode supported */
332171ac09aSdamien #ifndef IEEE80211_STA_ONLY
333171ac09aSdamien 	    IEEE80211_C_IBSS |		/* IBSS mode supported */
334b9520dbfSniallo 	    IEEE80211_C_HOSTAP |	/* HostAp mode supported */
335171ac09aSdamien #endif
336b9520dbfSniallo 	    IEEE80211_C_TXPMGT |	/* tx power management */
337b9520dbfSniallo 	    IEEE80211_C_SHPREAMBLE |	/* short preamble supported */
338b9520dbfSniallo 	    IEEE80211_C_SHSLOT |	/* short slot time supported */
339e03e709cSdamien 	    IEEE80211_C_WEP |		/* s/w WEP */
340e03e709cSdamien 	    IEEE80211_C_RSN;		/* WPA/RSN */
341b9520dbfSniallo 
34274a1cafeSdamien 	if (sc->rf_rev == RT2573_RF_5225 || sc->rf_rev == RT2573_RF_5226) {
34314761d2dSdamien 		/* set supported .11a rates */
344ed3bbfa7Sdamien 		ic->ic_sup_rates[IEEE80211_MODE_11A] =
345ed3bbfa7Sdamien 		    ieee80211_std_rateset_11a;
34614761d2dSdamien 
34714761d2dSdamien 		/* set supported .11a channels */
34814761d2dSdamien 		for (i = 34; i <= 46; i += 4) {
34914761d2dSdamien 			ic->ic_channels[i].ic_freq =
35014761d2dSdamien 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
35114761d2dSdamien 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
35214761d2dSdamien 		}
35314761d2dSdamien 		for (i = 36; i <= 64; i += 4) {
35414761d2dSdamien 			ic->ic_channels[i].ic_freq =
35514761d2dSdamien 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
35614761d2dSdamien 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
35714761d2dSdamien 		}
35814761d2dSdamien 		for (i = 100; i <= 140; i += 4) {
35914761d2dSdamien 			ic->ic_channels[i].ic_freq =
36014761d2dSdamien 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
36114761d2dSdamien 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
36214761d2dSdamien 		}
36314761d2dSdamien 		for (i = 149; i <= 165; i += 4) {
36414761d2dSdamien 			ic->ic_channels[i].ic_freq =
36514761d2dSdamien 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
36614761d2dSdamien 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
36714761d2dSdamien 		}
36814761d2dSdamien 	}
36914761d2dSdamien 
370b9520dbfSniallo 	/* set supported .11b and .11g rates */
371f2cd5b67Sderaadt 	ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
372f2cd5b67Sderaadt 	ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
373b9520dbfSniallo 
374b9520dbfSniallo 	/* set supported .11b and .11g channels (1 through 14) */
375b9520dbfSniallo 	for (i = 1; i <= 14; i++) {
376b9520dbfSniallo 		ic->ic_channels[i].ic_freq =
377b9520dbfSniallo 		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
378b9520dbfSniallo 		ic->ic_channels[i].ic_flags =
379b9520dbfSniallo 		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
380b9520dbfSniallo 		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
381b9520dbfSniallo 	}
382b9520dbfSniallo 
383b9520dbfSniallo 	ifp->if_softc = sc;
384b9520dbfSniallo 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
385b9520dbfSniallo 	ifp->if_ioctl = rum_ioctl;
386b9520dbfSniallo 	ifp->if_start = rum_start;
387b9520dbfSniallo 	ifp->if_watchdog = rum_watchdog;
3884ab2b9feSmbalmer 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
389b9520dbfSniallo 
390b9520dbfSniallo 	if_attach(ifp);
391b9520dbfSniallo 	ieee80211_ifattach(ifp);
3920db83ec9Sdamien 	ic->ic_newassoc = rum_newassoc;
393b9520dbfSniallo 
394b9520dbfSniallo 	/* override state transition machine */
395b9520dbfSniallo 	sc->sc_newstate = ic->ic_newstate;
396b9520dbfSniallo 	ic->ic_newstate = rum_newstate;
397b9520dbfSniallo 	ieee80211_media_init(ifp, rum_media_change, ieee80211_media_status);
398b9520dbfSniallo 
399b9520dbfSniallo #if NBPFILTER > 0
400b9520dbfSniallo 	bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
40174a1cafeSdamien 	    sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN);
402b9520dbfSniallo 
403b9520dbfSniallo 	sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
404b9520dbfSniallo 	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
405b9520dbfSniallo 	sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2573_RX_RADIOTAP_PRESENT);
406b9520dbfSniallo 
407b9520dbfSniallo 	sc->sc_txtap_len = sizeof sc->sc_txtapu;
408b9520dbfSniallo 	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
409b9520dbfSniallo 	sc->sc_txtap.wt_ihdr.it_present = htole32(RT2573_TX_RADIOTAP_PRESENT);
410b9520dbfSniallo #endif
411b9520dbfSniallo }
412b9520dbfSniallo 
413de5d9ff0Sjsg int
rum_detach(struct device * self,int flags)414de5d9ff0Sjsg rum_detach(struct device *self, int flags)
415b9520dbfSniallo {
416de5d9ff0Sjsg 	struct rum_softc *sc = (struct rum_softc *)self;
417b9520dbfSniallo 	struct ifnet *ifp = &sc->sc_ic.ic_if;
418b9520dbfSniallo 	int s;
419b9520dbfSniallo 
420b9520dbfSniallo 	s = splusb();
421b9520dbfSniallo 
422c7438bddSjakemsr 	if (timeout_initialized(&sc->scan_to))
423bc303e9bSdamien 		timeout_del(&sc->scan_to);
424c7438bddSjakemsr 	if (timeout_initialized(&sc->amrr_to))
425bc303e9bSdamien 		timeout_del(&sc->amrr_to);
42614761d2dSdamien 
42712136ef5Sjakemsr 	usb_rem_wait_task(sc->sc_udev, &sc->sc_task);
42812136ef5Sjakemsr 
42912136ef5Sjakemsr 	usbd_ref_wait(sc->sc_udev);
43012136ef5Sjakemsr 
43112136ef5Sjakemsr 	if (ifp->if_softc != NULL) {
43212136ef5Sjakemsr 		ieee80211_ifdetach(ifp);	/* free all nodes */
43312136ef5Sjakemsr 		if_detach(ifp);
43412136ef5Sjakemsr 	}
43512136ef5Sjakemsr 
43614761d2dSdamien 	if (sc->amrr_xfer != NULL) {
43714761d2dSdamien 		usbd_free_xfer(sc->amrr_xfer);
43814761d2dSdamien 		sc->amrr_xfer = NULL;
43914761d2dSdamien 	}
440f88cb03eSmglocker 	if (sc->sc_rx_pipeh != NULL)
441b9520dbfSniallo 		usbd_close_pipe(sc->sc_rx_pipeh);
442f88cb03eSmglocker 	if (sc->sc_tx_pipeh != NULL)
443b9520dbfSniallo 		usbd_close_pipe(sc->sc_tx_pipeh);
444b9520dbfSniallo 
445b9520dbfSniallo 	rum_free_rx_list(sc);
446b9520dbfSniallo 	rum_free_tx_list(sc);
447b9520dbfSniallo 
448b9520dbfSniallo 	splx(s);
449b9520dbfSniallo 
450b9520dbfSniallo 	return 0;
451b9520dbfSniallo }
452b9520dbfSniallo 
45378315254Smbalmer int
rum_alloc_tx_list(struct rum_softc * sc)454b9520dbfSniallo rum_alloc_tx_list(struct rum_softc *sc)
455b9520dbfSniallo {
456b9520dbfSniallo 	int i, error;
457b9520dbfSniallo 
458bc303e9bSdamien 	sc->tx_cur = sc->tx_queued = 0;
459b9520dbfSniallo 
460bc303e9bSdamien 	for (i = 0; i < RUM_TX_LIST_COUNT; i++) {
461bc303e9bSdamien 		struct rum_tx_data *data = &sc->tx_data[i];
462b9520dbfSniallo 
463b9520dbfSniallo 		data->sc = sc;
464b9520dbfSniallo 
465b9520dbfSniallo 		data->xfer = usbd_alloc_xfer(sc->sc_udev);
466b9520dbfSniallo 		if (data->xfer == NULL) {
467b9520dbfSniallo 			printf("%s: could not allocate tx xfer\n",
4684ab2b9feSmbalmer 			    sc->sc_dev.dv_xname);
469b9520dbfSniallo 			error = ENOMEM;
470b9520dbfSniallo 			goto fail;
471b9520dbfSniallo 		}
472b9520dbfSniallo 		data->buf = usbd_alloc_buffer(data->xfer,
47303aad8b8Sdamien 		    RT2573_TX_DESC_SIZE + IEEE80211_MAX_LEN);
474b9520dbfSniallo 		if (data->buf == NULL) {
475b9520dbfSniallo 			printf("%s: could not allocate tx buffer\n",
4764ab2b9feSmbalmer 			    sc->sc_dev.dv_xname);
477b9520dbfSniallo 			error = ENOMEM;
478b9520dbfSniallo 			goto fail;
479b9520dbfSniallo 		}
48014761d2dSdamien 		/* clean Tx descriptor */
48114761d2dSdamien 		bzero(data->buf, RT2573_TX_DESC_SIZE);
482b9520dbfSniallo 	}
483b9520dbfSniallo 
484b9520dbfSniallo 	return 0;
485b9520dbfSniallo 
486b9520dbfSniallo fail:	rum_free_tx_list(sc);
487b9520dbfSniallo 	return error;
488b9520dbfSniallo }
489b9520dbfSniallo 
49078315254Smbalmer void
rum_free_tx_list(struct rum_softc * sc)491b9520dbfSniallo rum_free_tx_list(struct rum_softc *sc)
492b9520dbfSniallo {
493b9520dbfSniallo 	int i;
494b9520dbfSniallo 
495bc303e9bSdamien 	for (i = 0; i < RUM_TX_LIST_COUNT; i++) {
496bc303e9bSdamien 		struct rum_tx_data *data = &sc->tx_data[i];
497b9520dbfSniallo 
498b9520dbfSniallo 		if (data->xfer != NULL) {
499b9520dbfSniallo 			usbd_free_xfer(data->xfer);
500b9520dbfSniallo 			data->xfer = NULL;
501b9520dbfSniallo 		}
502b9520dbfSniallo 		/*
503b9520dbfSniallo 		 * The node has already been freed at that point so don't call
504b9520dbfSniallo 		 * ieee80211_release_node() here.
505b9520dbfSniallo 		 */
506b9520dbfSniallo 		data->ni = NULL;
507b9520dbfSniallo 	}
508b9520dbfSniallo }
509b9520dbfSniallo 
51078315254Smbalmer int
rum_alloc_rx_list(struct rum_softc * sc)511b9520dbfSniallo rum_alloc_rx_list(struct rum_softc *sc)
512b9520dbfSniallo {
513b9520dbfSniallo 	int i, error;
514b9520dbfSniallo 
515bc303e9bSdamien 	for (i = 0; i < RUM_RX_LIST_COUNT; i++) {
516bc303e9bSdamien 		struct rum_rx_data *data = &sc->rx_data[i];
517b9520dbfSniallo 
518b9520dbfSniallo 		data->sc = sc;
519b9520dbfSniallo 
520b9520dbfSniallo 		data->xfer = usbd_alloc_xfer(sc->sc_udev);
521b9520dbfSniallo 		if (data->xfer == NULL) {
522b9520dbfSniallo 			printf("%s: could not allocate rx xfer\n",
5234ab2b9feSmbalmer 			    sc->sc_dev.dv_xname);
524b9520dbfSniallo 			error = ENOMEM;
525b9520dbfSniallo 			goto fail;
526b9520dbfSniallo 		}
527b9520dbfSniallo 		if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
528b9520dbfSniallo 			printf("%s: could not allocate rx buffer\n",
5294ab2b9feSmbalmer 			    sc->sc_dev.dv_xname);
530b9520dbfSniallo 			error = ENOMEM;
531b9520dbfSniallo 			goto fail;
532b9520dbfSniallo 		}
533b9520dbfSniallo 
534b9520dbfSniallo 		MGETHDR(data->m, M_DONTWAIT, MT_DATA);
535b9520dbfSniallo 		if (data->m == NULL) {
536b9520dbfSniallo 			printf("%s: could not allocate rx mbuf\n",
5374ab2b9feSmbalmer 			    sc->sc_dev.dv_xname);
538b9520dbfSniallo 			error = ENOMEM;
539b9520dbfSniallo 			goto fail;
540b9520dbfSniallo 		}
541b9520dbfSniallo 		MCLGET(data->m, M_DONTWAIT);
542b9520dbfSniallo 		if (!(data->m->m_flags & M_EXT)) {
543b9520dbfSniallo 			printf("%s: could not allocate rx mbuf cluster\n",
5444ab2b9feSmbalmer 			    sc->sc_dev.dv_xname);
545b9520dbfSniallo 			error = ENOMEM;
546b9520dbfSniallo 			goto fail;
547b9520dbfSniallo 		}
548b9520dbfSniallo 		data->buf = mtod(data->m, uint8_t *);
549b9520dbfSniallo 	}
550b9520dbfSniallo 
551b9520dbfSniallo 	return 0;
552b9520dbfSniallo 
55362ca8315Sdamien fail:	rum_free_rx_list(sc);
554b9520dbfSniallo 	return error;
555b9520dbfSniallo }
556b9520dbfSniallo 
55778315254Smbalmer void
rum_free_rx_list(struct rum_softc * sc)558b9520dbfSniallo rum_free_rx_list(struct rum_softc *sc)
559b9520dbfSniallo {
560b9520dbfSniallo 	int i;
561b9520dbfSniallo 
562bc303e9bSdamien 	for (i = 0; i < RUM_RX_LIST_COUNT; i++) {
563bc303e9bSdamien 		struct rum_rx_data *data = &sc->rx_data[i];
564b9520dbfSniallo 
565b9520dbfSniallo 		if (data->xfer != NULL) {
566b9520dbfSniallo 			usbd_free_xfer(data->xfer);
567b9520dbfSniallo 			data->xfer = NULL;
568b9520dbfSniallo 		}
569b9520dbfSniallo 		if (data->m != NULL) {
570b9520dbfSniallo 			m_freem(data->m);
571b9520dbfSniallo 			data->m = NULL;
572b9520dbfSniallo 		}
573b9520dbfSniallo 	}
574b9520dbfSniallo }
575b9520dbfSniallo 
57678315254Smbalmer int
rum_media_change(struct ifnet * ifp)577b9520dbfSniallo rum_media_change(struct ifnet *ifp)
578b9520dbfSniallo {
579b9520dbfSniallo 	int error;
580b9520dbfSniallo 
581b9520dbfSniallo 	error = ieee80211_media_change(ifp);
582b9520dbfSniallo 	if (error != ENETRESET)
583b9520dbfSniallo 		return error;
584b9520dbfSniallo 
585b9520dbfSniallo 	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
5862e342c84Skevlo 		error = rum_init(ifp);
587b9520dbfSniallo 
5882e342c84Skevlo 	return error;
589b9520dbfSniallo }
590b9520dbfSniallo 
591b9520dbfSniallo /*
592b9520dbfSniallo  * This function is called periodically (every 200ms) during scanning to
593b9520dbfSniallo  * switch from one channel to another.
594b9520dbfSniallo  */
59578315254Smbalmer void
rum_next_scan(void * arg)596b9520dbfSniallo rum_next_scan(void *arg)
597b9520dbfSniallo {
598b9520dbfSniallo 	struct rum_softc *sc = arg;
599b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
600b9520dbfSniallo 	struct ifnet *ifp = &ic->ic_if;
601b9520dbfSniallo 
6027b043b62Sjakemsr 	if (usbd_is_dying(sc->sc_udev))
6037b043b62Sjakemsr 		return;
6047b043b62Sjakemsr 
60512136ef5Sjakemsr 	usbd_ref_incr(sc->sc_udev);
60612136ef5Sjakemsr 
607b9520dbfSniallo 	if (ic->ic_state == IEEE80211_S_SCAN)
608b9520dbfSniallo 		ieee80211_next_scan(ifp);
60912136ef5Sjakemsr 
61012136ef5Sjakemsr 	usbd_ref_decr(sc->sc_udev);
611b9520dbfSniallo }
612b9520dbfSniallo 
61378315254Smbalmer void
rum_task(void * arg)614b9520dbfSniallo rum_task(void *arg)
615b9520dbfSniallo {
616b9520dbfSniallo 	struct rum_softc *sc = arg;
617b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
618b9520dbfSniallo 	enum ieee80211_state ostate;
619b9520dbfSniallo 	struct ieee80211_node *ni;
620b9520dbfSniallo 	uint32_t tmp;
621b9520dbfSniallo 
6227b043b62Sjakemsr 	if (usbd_is_dying(sc->sc_udev))
6237b043b62Sjakemsr 		return;
6247b043b62Sjakemsr 
625b9520dbfSniallo 	ostate = ic->ic_state;
626b9520dbfSniallo 
627b9520dbfSniallo 	switch (sc->sc_state) {
628b9520dbfSniallo 	case IEEE80211_S_INIT:
629b9520dbfSniallo 		if (ostate == IEEE80211_S_RUN) {
630b9520dbfSniallo 			/* abort TSF synchronization */
631b9520dbfSniallo 			tmp = rum_read(sc, RT2573_TXRX_CSR9);
632b9520dbfSniallo 			rum_write(sc, RT2573_TXRX_CSR9, tmp & ~0x00ffffff);
633b9520dbfSniallo 		}
634b9520dbfSniallo 		break;
635b9520dbfSniallo 
636b9520dbfSniallo 	case IEEE80211_S_SCAN:
637b9520dbfSniallo 		rum_set_chan(sc, ic->ic_bss->ni_chan);
63812136ef5Sjakemsr 		if (!usbd_is_dying(sc->sc_udev))
6390d2a4083Sblambert 			timeout_add_msec(&sc->scan_to, 200);
640b9520dbfSniallo 		break;
641b9520dbfSniallo 
642b9520dbfSniallo 	case IEEE80211_S_AUTH:
643b9520dbfSniallo 		rum_set_chan(sc, ic->ic_bss->ni_chan);
644b9520dbfSniallo 		break;
645b9520dbfSniallo 
646b9520dbfSniallo 	case IEEE80211_S_ASSOC:
647b9520dbfSniallo 		rum_set_chan(sc, ic->ic_bss->ni_chan);
648b9520dbfSniallo 		break;
649b9520dbfSniallo 
650b9520dbfSniallo 	case IEEE80211_S_RUN:
651b9520dbfSniallo 		rum_set_chan(sc, ic->ic_bss->ni_chan);
652b9520dbfSniallo 
653b9520dbfSniallo 		ni = ic->ic_bss;
654b9520dbfSniallo 
655b9520dbfSniallo 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
656b9520dbfSniallo 			rum_update_slot(sc);
65714761d2dSdamien 			rum_enable_mrr(sc);
658b9520dbfSniallo 			rum_set_txpreamble(sc);
659b9520dbfSniallo 			rum_set_basicrates(sc);
660b9520dbfSniallo 			rum_set_bssid(sc, ni->ni_bssid);
661b9520dbfSniallo 		}
662b9520dbfSniallo 
663171ac09aSdamien #ifndef IEEE80211_STA_ONLY
664b9520dbfSniallo 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
665b9520dbfSniallo 		    ic->ic_opmode == IEEE80211_M_IBSS)
666b9520dbfSniallo 			rum_prepare_beacon(sc);
667171ac09aSdamien #endif
668b9520dbfSniallo 
66959b5f8f4Sdamien 		if (ic->ic_opmode != IEEE80211_M_MONITOR)
670b9520dbfSniallo 			rum_enable_tsf_sync(sc);
67114761d2dSdamien 
6720db83ec9Sdamien 		if (ic->ic_opmode == IEEE80211_M_STA) {
6730db83ec9Sdamien 			/* fake a join to init the tx rate */
6740db83ec9Sdamien 			rum_newassoc(ic, ic->ic_bss, 1);
67514761d2dSdamien 
6760db83ec9Sdamien 			/* enable automatic rate control in STA mode */
6770db83ec9Sdamien 			if (ic->ic_fixed_rate == -1)
6780db83ec9Sdamien 				rum_amrr_start(sc, ni);
6790db83ec9Sdamien 		}
680b9520dbfSniallo 		break;
681b9520dbfSniallo 	}
682b9520dbfSniallo 
68374a1cafeSdamien 	sc->sc_newstate(ic, sc->sc_state, sc->sc_arg);
684b9520dbfSniallo }
685b9520dbfSniallo 
68678315254Smbalmer int
rum_newstate(struct ieee80211com * ic,enum ieee80211_state nstate,int arg)687b9520dbfSniallo rum_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
688b9520dbfSniallo {
689b9520dbfSniallo 	struct rum_softc *sc = ic->ic_if.if_softc;
690b9520dbfSniallo 
691b9520dbfSniallo 	usb_rem_task(sc->sc_udev, &sc->sc_task);
692bc303e9bSdamien 	timeout_del(&sc->scan_to);
693bc303e9bSdamien 	timeout_del(&sc->amrr_to);
694b9520dbfSniallo 
695d267521fSderaadt 	/* do it in a process context */
696b9520dbfSniallo 	sc->sc_state = nstate;
69774a1cafeSdamien 	sc->sc_arg = arg;
698b9520dbfSniallo 	usb_add_task(sc->sc_udev, &sc->sc_task);
699b9520dbfSniallo 	return 0;
700b9520dbfSniallo }
701b9520dbfSniallo 
702b9520dbfSniallo /* quickly determine if a given rate is CCK or OFDM */
70314761d2dSdamien #define RUM_RATE_IS_OFDM(rate)	((rate) >= 12 && (rate) != 22)
704b9520dbfSniallo 
70514761d2dSdamien #define RUM_ACK_SIZE	14	/* 10 + 4(FCS) */
70614761d2dSdamien #define RUM_CTS_SIZE	14	/* 10 + 4(FCS) */
707b9520dbfSniallo 
70878315254Smbalmer void
rum_txeof(struct usbd_xfer * xfer,void * priv,usbd_status status)709ab0b1be7Smglocker rum_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
710b9520dbfSniallo {
711b9520dbfSniallo 	struct rum_tx_data *data = priv;
712b9520dbfSniallo 	struct rum_softc *sc = data->sc;
713b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
714b9520dbfSniallo 	struct ifnet *ifp = &ic->ic_if;
715b9520dbfSniallo 	int s;
716b9520dbfSniallo 
717b9520dbfSniallo 	if (status != USBD_NORMAL_COMPLETION) {
718b9520dbfSniallo 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
719b9520dbfSniallo 			return;
720b9520dbfSniallo 
721b9520dbfSniallo 		printf("%s: could not transmit buffer: %s\n",
7224ab2b9feSmbalmer 		    sc->sc_dev.dv_xname, usbd_errstr(status));
723b9520dbfSniallo 
724b9520dbfSniallo 		if (status == USBD_STALLED)
725b9520dbfSniallo 			usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
726b9520dbfSniallo 
727b9520dbfSniallo 		ifp->if_oerrors++;
728b9520dbfSniallo 		return;
729b9520dbfSniallo 	}
730b9520dbfSniallo 
731b9520dbfSniallo 	s = splnet();
732b9520dbfSniallo 
733b9520dbfSniallo 	ieee80211_release_node(ic, data->ni);
734b9520dbfSniallo 	data->ni = NULL;
735b9520dbfSniallo 
736b9520dbfSniallo 	sc->tx_queued--;
737b9520dbfSniallo 
73814761d2dSdamien 	DPRINTFN(10, ("tx done\n"));
739b9520dbfSniallo 
740b9520dbfSniallo 	sc->sc_tx_timer = 0;
741de6cd8fbSdlg 	ifq_clr_oactive(&ifp->if_snd);
742b9520dbfSniallo 	rum_start(ifp);
743b9520dbfSniallo 
744b9520dbfSniallo 	splx(s);
745b9520dbfSniallo }
746b9520dbfSniallo 
74778315254Smbalmer void
rum_rxeof(struct usbd_xfer * xfer,void * priv,usbd_status status)748ab0b1be7Smglocker rum_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
749b9520dbfSniallo {
750b9520dbfSniallo 	struct rum_rx_data *data = priv;
751b9520dbfSniallo 	struct rum_softc *sc = data->sc;
752b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
753b9520dbfSniallo 	struct ifnet *ifp = &ic->ic_if;
754bc303e9bSdamien 	const struct rum_rx_desc *desc;
755b9520dbfSniallo 	struct ieee80211_frame *wh;
75630d05aacSdamien 	struct ieee80211_rxinfo rxi;
757b9520dbfSniallo 	struct ieee80211_node *ni;
758b9520dbfSniallo 	struct mbuf *mnew, *m;
759b9520dbfSniallo 	int s, len;
760b9520dbfSniallo 
761b9520dbfSniallo 	if (status != USBD_NORMAL_COMPLETION) {
762b9520dbfSniallo 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
763b9520dbfSniallo 			return;
764b9520dbfSniallo 
765b9520dbfSniallo 		if (status == USBD_STALLED)
766b9520dbfSniallo 			usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
767b9520dbfSniallo 		goto skip;
768b9520dbfSniallo 	}
769b9520dbfSniallo 
770b9520dbfSniallo 	usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
771b9520dbfSniallo 
77288fa525eSdamien 	if (len < RT2573_RX_DESC_SIZE + sizeof (struct ieee80211_frame_min)) {
7734ab2b9feSmbalmer 		DPRINTF(("%s: xfer too short %d\n", sc->sc_dev.dv_xname,
774b9520dbfSniallo 		    len));
775b9520dbfSniallo 		ifp->if_ierrors++;
776b9520dbfSniallo 		goto skip;
777b9520dbfSniallo 	}
778b9520dbfSniallo 
779bc303e9bSdamien 	desc = (const struct rum_rx_desc *)data->buf;
780b9520dbfSniallo 
78114761d2dSdamien 	if (letoh32(desc->flags) & RT2573_RX_CRC_ERROR) {
782b9520dbfSniallo 		/*
783b9520dbfSniallo 		 * This should not happen since we did not request to receive
78414761d2dSdamien 		 * those frames when we filled RT2573_TXRX_CSR0.
785b9520dbfSniallo 		 */
786fc0d81f2Sdamien 		DPRINTFN(5, ("CRC error\n"));
787b9520dbfSniallo 		ifp->if_ierrors++;
788b9520dbfSniallo 		goto skip;
789b9520dbfSniallo 	}
790b9520dbfSniallo 
791b9520dbfSniallo 	MGETHDR(mnew, M_DONTWAIT, MT_DATA);
792b9520dbfSniallo 	if (mnew == NULL) {
793b9520dbfSniallo 		printf("%s: could not allocate rx mbuf\n",
7944ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
795b9520dbfSniallo 		ifp->if_ierrors++;
796b9520dbfSniallo 		goto skip;
797b9520dbfSniallo 	}
798b9520dbfSniallo 	MCLGET(mnew, M_DONTWAIT);
799b9520dbfSniallo 	if (!(mnew->m_flags & M_EXT)) {
800b9520dbfSniallo 		printf("%s: could not allocate rx mbuf cluster\n",
8014ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
802b9520dbfSniallo 		m_freem(mnew);
803b9520dbfSniallo 		ifp->if_ierrors++;
804b9520dbfSniallo 		goto skip;
805b9520dbfSniallo 	}
806b9520dbfSniallo 	m = data->m;
807b9520dbfSniallo 	data->m = mnew;
808b9520dbfSniallo 	data->buf = mtod(data->m, uint8_t *);
809b9520dbfSniallo 
810b9520dbfSniallo 	/* finalize mbuf */
8112507ca19Sdamien 	m->m_data = (caddr_t)(desc + 1);
812b9520dbfSniallo 	m->m_pkthdr.len = m->m_len = (letoh32(desc->flags) >> 16) & 0xfff;
813b9520dbfSniallo 
814b9520dbfSniallo 	s = splnet();
815b9520dbfSniallo 
816b9520dbfSniallo #if NBPFILTER > 0
817b9520dbfSniallo 	if (sc->sc_drvbpf != NULL) {
818b9520dbfSniallo 		struct mbuf mb;
819b9520dbfSniallo 		struct rum_rx_radiotap_header *tap = &sc->sc_rxtap;
820b9520dbfSniallo 
821b9520dbfSniallo 		tap->wr_flags = 0;
822b9520dbfSniallo 		tap->wr_rate = rum_rxrate(desc);
823ab55d896Sjsg 		tap->wr_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
824ab55d896Sjsg 		tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
825b9520dbfSniallo 		tap->wr_antenna = sc->rx_ant;
826b9520dbfSniallo 		tap->wr_antsignal = desc->rssi;
827b9520dbfSniallo 
828b9520dbfSniallo 		mb.m_data = (caddr_t)tap;
829b9520dbfSniallo 		mb.m_len = sc->sc_rxtap_len;
830b9520dbfSniallo 		mb.m_next = m;
831f43e6f73Sclaudio 		mb.m_nextpkt = NULL;
832f43e6f73Sclaudio 		mb.m_type = 0;
833f43e6f73Sclaudio 		mb.m_flags = 0;
834b9520dbfSniallo 		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
835b9520dbfSniallo 	}
836b9520dbfSniallo #endif
837b9520dbfSniallo 
838b9520dbfSniallo 	wh = mtod(m, struct ieee80211_frame *);
839b9520dbfSniallo 	ni = ieee80211_find_rxnode(ic, wh);
840b9520dbfSniallo 
841b9520dbfSniallo 	/* send the frame to the 802.11 layer */
84252a13037Sstsp 	memset(&rxi, 0, sizeof(rxi));
84330d05aacSdamien 	rxi.rxi_rssi = desc->rssi;
84430d05aacSdamien 	ieee80211_input(ifp, m, ni, &rxi);
845b9520dbfSniallo 
846b9520dbfSniallo 	/* node is no longer needed */
847b9520dbfSniallo 	ieee80211_release_node(ic, ni);
848b9520dbfSniallo 
849b9520dbfSniallo 	splx(s);
850b9520dbfSniallo 
85114761d2dSdamien 	DPRINTFN(15, ("rx done\n"));
852b9520dbfSniallo 
853b9520dbfSniallo skip:	/* setup a new transfer */
854b9520dbfSniallo 	usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
855b9520dbfSniallo 	    USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, rum_rxeof);
856bc303e9bSdamien 	(void)usbd_transfer(xfer);
857b9520dbfSniallo }
858b9520dbfSniallo 
859b9520dbfSniallo /*
860b9520dbfSniallo  * This function is only used by the Rx radiotap code. It returns the rate at
861b9520dbfSniallo  * which a given frame was received.
862b9520dbfSniallo  */
863b9520dbfSniallo #if NBPFILTER > 0
86478315254Smbalmer uint8_t
rum_rxrate(const struct rum_rx_desc * desc)865bc303e9bSdamien rum_rxrate(const struct rum_rx_desc *desc)
866b9520dbfSniallo {
867b9520dbfSniallo 	if (letoh32(desc->flags) & RT2573_RX_OFDM) {
868b9520dbfSniallo 		/* reverse function of rum_plcp_signal */
869b9520dbfSniallo 		switch (desc->rate) {
870b9520dbfSniallo 		case 0xb:	return 12;
871b9520dbfSniallo 		case 0xf:	return 18;
872b9520dbfSniallo 		case 0xa:	return 24;
873b9520dbfSniallo 		case 0xe:	return 36;
874b9520dbfSniallo 		case 0x9:	return 48;
875b9520dbfSniallo 		case 0xd:	return 72;
876b9520dbfSniallo 		case 0x8:	return 96;
877b9520dbfSniallo 		case 0xc:	return 108;
878b9520dbfSniallo 		}
879b9520dbfSniallo 	} else {
880b9520dbfSniallo 		if (desc->rate == 10)
881b9520dbfSniallo 			return 2;
882b9520dbfSniallo 		if (desc->rate == 20)
883b9520dbfSniallo 			return 4;
884b9520dbfSniallo 		if (desc->rate == 55)
885b9520dbfSniallo 			return 11;
886b9520dbfSniallo 		if (desc->rate == 110)
887b9520dbfSniallo 			return 22;
888b9520dbfSniallo 	}
889b9520dbfSniallo 	return 2;	/* should not get there */
890b9520dbfSniallo }
891b9520dbfSniallo #endif
892b9520dbfSniallo 
893b9520dbfSniallo /*
894b9520dbfSniallo  * Return the expected ack rate for a frame transmitted at rate `rate'.
895b9520dbfSniallo  */
89678315254Smbalmer int
rum_ack_rate(struct ieee80211com * ic,int rate)897b9520dbfSniallo rum_ack_rate(struct ieee80211com *ic, int rate)
898b9520dbfSniallo {
899b9520dbfSniallo 	switch (rate) {
900b9520dbfSniallo 	/* CCK rates */
901b9520dbfSniallo 	case 2:
902b9520dbfSniallo 		return 2;
903b9520dbfSniallo 	case 4:
904b9520dbfSniallo 	case 11:
905b9520dbfSniallo 	case 22:
906b9520dbfSniallo 		return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
907b9520dbfSniallo 
908b9520dbfSniallo 	/* OFDM rates */
909b9520dbfSniallo 	case 12:
910b9520dbfSniallo 	case 18:
911b9520dbfSniallo 		return 12;
912b9520dbfSniallo 	case 24:
913b9520dbfSniallo 	case 36:
914b9520dbfSniallo 		return 24;
915b9520dbfSniallo 	case 48:
916b9520dbfSniallo 	case 72:
917b9520dbfSniallo 	case 96:
918b9520dbfSniallo 	case 108:
919b9520dbfSniallo 		return 48;
920b9520dbfSniallo 	}
921b9520dbfSniallo 
922b9520dbfSniallo 	/* default to 1Mbps */
923b9520dbfSniallo 	return 2;
924b9520dbfSniallo }
925b9520dbfSniallo 
926b9520dbfSniallo /*
927b9520dbfSniallo  * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
928b9520dbfSniallo  * The function automatically determines the operating mode depending on the
929b9520dbfSniallo  * given rate. `flags' indicates whether short preamble is in use or not.
930b9520dbfSniallo  */
93178315254Smbalmer uint16_t
rum_txtime(int len,int rate,uint32_t flags)932b9520dbfSniallo rum_txtime(int len, int rate, uint32_t flags)
933b9520dbfSniallo {
934b9520dbfSniallo 	uint16_t txtime;
935b9520dbfSniallo 
93614761d2dSdamien 	if (RUM_RATE_IS_OFDM(rate)) {
937b9520dbfSniallo 		/* IEEE Std 802.11a-1999, pp. 37 */
938b9520dbfSniallo 		txtime = (8 + 4 * len + 3 + rate - 1) / rate;
939b9520dbfSniallo 		txtime = 16 + 4 + 4 * txtime + 6;
940b9520dbfSniallo 	} else {
941b9520dbfSniallo 		/* IEEE Std 802.11b-1999, pp. 28 */
942b9520dbfSniallo 		txtime = (16 * len + rate - 1) / rate;
943b9520dbfSniallo 		if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
944b9520dbfSniallo 			txtime +=  72 + 24;
945b9520dbfSniallo 		else
946b9520dbfSniallo 			txtime += 144 + 48;
947b9520dbfSniallo 	}
948b9520dbfSniallo 	return txtime;
949b9520dbfSniallo }
950b9520dbfSniallo 
95178315254Smbalmer uint8_t
rum_plcp_signal(int rate)952b9520dbfSniallo rum_plcp_signal(int rate)
953b9520dbfSniallo {
954b9520dbfSniallo 	switch (rate) {
955b9520dbfSniallo 	/* CCK rates (returned values are device-dependent) */
956b9520dbfSniallo 	case 2:		return 0x0;
957b9520dbfSniallo 	case 4:		return 0x1;
958b9520dbfSniallo 	case 11:	return 0x2;
959b9520dbfSniallo 	case 22:	return 0x3;
960b9520dbfSniallo 
961b9520dbfSniallo 	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
962b9520dbfSniallo 	case 12:	return 0xb;
963b9520dbfSniallo 	case 18:	return 0xf;
964b9520dbfSniallo 	case 24:	return 0xa;
965b9520dbfSniallo 	case 36:	return 0xe;
966b9520dbfSniallo 	case 48:	return 0x9;
967b9520dbfSniallo 	case 72:	return 0xd;
968b9520dbfSniallo 	case 96:	return 0x8;
969b9520dbfSniallo 	case 108:	return 0xc;
970b9520dbfSniallo 
971b9520dbfSniallo 	/* unsupported rates (should not get there) */
972b9520dbfSniallo 	default:	return 0xff;
973b9520dbfSniallo 	}
974b9520dbfSniallo }
975b9520dbfSniallo 
97678315254Smbalmer void
rum_setup_tx_desc(struct rum_softc * sc,struct rum_tx_desc * desc,uint32_t flags,uint16_t xflags,int len,int rate)977b9520dbfSniallo rum_setup_tx_desc(struct rum_softc *sc, struct rum_tx_desc *desc,
97814761d2dSdamien     uint32_t flags, uint16_t xflags, int len, int rate)
979b9520dbfSniallo {
980b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
981b9520dbfSniallo 	uint16_t plcp_length;
982b9520dbfSniallo 	int remainder;
983b9520dbfSniallo 
984b9520dbfSniallo 	desc->flags = htole32(flags);
98514761d2dSdamien 	desc->flags |= htole32(RT2573_TX_VALID);
986b9520dbfSniallo 	desc->flags |= htole32(len << 16);
987b9520dbfSniallo 
98814761d2dSdamien 	desc->xflags = htole16(xflags);
98914761d2dSdamien 
99014761d2dSdamien 	desc->wme = htole16(
99114761d2dSdamien 	    RT2573_QID(0) |
99214761d2dSdamien 	    RT2573_AIFSN(2) |
99314761d2dSdamien 	    RT2573_LOGCWMIN(4) |
99414761d2dSdamien 	    RT2573_LOGCWMAX(10));
995b9520dbfSniallo 
996b9520dbfSniallo 	/* setup PLCP fields */
997b9520dbfSniallo 	desc->plcp_signal  = rum_plcp_signal(rate);
998b9520dbfSniallo 	desc->plcp_service = 4;
999b9520dbfSniallo 
1000b9520dbfSniallo 	len += IEEE80211_CRC_LEN;
100114761d2dSdamien 	if (RUM_RATE_IS_OFDM(rate)) {
1002b9520dbfSniallo 		desc->flags |= htole32(RT2573_TX_OFDM);
1003b9520dbfSniallo 
1004b9520dbfSniallo 		plcp_length = len & 0xfff;
1005b9520dbfSniallo 		desc->plcp_length_hi = plcp_length >> 6;
1006b9520dbfSniallo 		desc->plcp_length_lo = plcp_length & 0x3f;
1007b9520dbfSniallo 	} else {
1008b9520dbfSniallo 		plcp_length = (16 * len + rate - 1) / rate;
1009b9520dbfSniallo 		if (rate == 22) {
1010b9520dbfSniallo 			remainder = (16 * len) % 22;
1011b9520dbfSniallo 			if (remainder != 0 && remainder < 7)
1012b9520dbfSniallo 				desc->plcp_service |= RT2573_PLCP_LENGEXT;
1013b9520dbfSniallo 		}
1014b9520dbfSniallo 		desc->plcp_length_hi = plcp_length >> 8;
1015b9520dbfSniallo 		desc->plcp_length_lo = plcp_length & 0xff;
1016b9520dbfSniallo 
1017b9520dbfSniallo 		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1018b9520dbfSniallo 			desc->plcp_signal |= 0x08;
1019b9520dbfSniallo 	}
1020b9520dbfSniallo }
1021b9520dbfSniallo 
102214761d2dSdamien #define RUM_TX_TIMEOUT	5000
1023b9520dbfSniallo 
102478315254Smbalmer int
rum_tx_data(struct rum_softc * sc,struct mbuf * m0,struct ieee80211_node * ni)1025b9520dbfSniallo rum_tx_data(struct rum_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1026b9520dbfSniallo {
1027b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
1028b9520dbfSniallo 	struct rum_tx_desc *desc;
1029b9520dbfSniallo 	struct rum_tx_data *data;
1030b9520dbfSniallo 	struct ieee80211_frame *wh;
1031e03e709cSdamien 	struct ieee80211_key *k;
1032b9520dbfSniallo 	uint32_t flags = 0;
1033b9520dbfSniallo 	uint16_t dur;
1034b9520dbfSniallo 	usbd_status error;
1035bc303e9bSdamien 	int rate, xferlen, pktlen, needrts = 0, needcts = 0;
1036b9520dbfSniallo 
103714761d2dSdamien 	wh = mtod(m0, struct ieee80211_frame *);
103814761d2dSdamien 
1039e03e709cSdamien 	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1040e03e709cSdamien 		k = ieee80211_get_txkey(ic, wh, ni);
1041e03e709cSdamien 
1042e03e709cSdamien 		if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL)
1043b9520dbfSniallo 			return ENOBUFS;
104414761d2dSdamien 
104514761d2dSdamien 		/* packet header may have moved, reset our local pointer */
104614761d2dSdamien 		wh = mtod(m0, struct ieee80211_frame *);
1047b9520dbfSniallo 	}
1048b9520dbfSniallo 
1049bc303e9bSdamien 	/* compute actual packet length (including CRC and crypto overhead) */
1050bc303e9bSdamien 	pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN;
1051bc303e9bSdamien 
105274a1cafeSdamien 	/* pickup a rate */
1053bc303e9bSdamien 	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
1054bc303e9bSdamien 	    ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1055bc303e9bSdamien 	     IEEE80211_FC0_TYPE_MGT)) {
1056bc303e9bSdamien 		/* mgmt/multicast frames are sent at the lowest avail. rate */
105774a1cafeSdamien 		rate = ni->ni_rates.rs_rates[0];
1058bc303e9bSdamien 	} else if (ic->ic_fixed_rate != -1) {
105974a1cafeSdamien 		rate = ic->ic_sup_rates[ic->ic_curmode].
106074a1cafeSdamien 		    rs_rates[ic->ic_fixed_rate];
106174a1cafeSdamien 	} else
106274a1cafeSdamien 		rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1063ed3b6fd7Sdamien 	if (rate == 0)
1064ed3b6fd7Sdamien 		rate = 2;	/* XXX should not happen */
106574a1cafeSdamien 	rate &= IEEE80211_RATE_VAL;
106674a1cafeSdamien 
1067bc303e9bSdamien 	/* check if RTS/CTS or CTS-to-self protection must be used */
1068bc303e9bSdamien 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1069bc303e9bSdamien 		/* multicast frames are not sent at OFDM rates in 802.11b/g */
1070bc303e9bSdamien 		if (pktlen > ic->ic_rtsthreshold) {
1071bc303e9bSdamien 			needrts = 1;	/* RTS/CTS based on frame length */
1072bc303e9bSdamien 		} else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1073bc303e9bSdamien 		    RUM_RATE_IS_OFDM(rate)) {
1074bc303e9bSdamien 			if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
1075bc303e9bSdamien 				needcts = 1;	/* CTS-to-self */
1076bc303e9bSdamien 			else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
1077bc303e9bSdamien 				needrts = 1;	/* RTS/CTS */
1078bc303e9bSdamien 		}
1079bc303e9bSdamien 	}
1080bc303e9bSdamien 	if (needrts || needcts) {
1081bc303e9bSdamien 		struct mbuf *mprot;
1082bc303e9bSdamien 		int protrate, ackrate;
1083bc303e9bSdamien 		uint16_t dur;
1084bc303e9bSdamien 
1085bc303e9bSdamien 		protrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1086bc303e9bSdamien 		ackrate  = rum_ack_rate(ic, rate);
1087bc303e9bSdamien 
1088bc303e9bSdamien 		dur = rum_txtime(pktlen, rate, ic->ic_flags) +
1089bc303e9bSdamien 		      rum_txtime(RUM_ACK_SIZE, ackrate, ic->ic_flags) +
1090bc303e9bSdamien 		      2 * sc->sifs;
1091bc303e9bSdamien 		if (needrts) {
1092bc303e9bSdamien 			dur += rum_txtime(RUM_CTS_SIZE, rum_ack_rate(ic,
1093bc303e9bSdamien 			    protrate), ic->ic_flags) + sc->sifs;
1094bc303e9bSdamien 			mprot = ieee80211_get_rts(ic, wh, dur);
1095bc303e9bSdamien 		} else {
1096bc303e9bSdamien 			mprot = ieee80211_get_cts_to_self(ic, dur);
1097bc303e9bSdamien 		}
1098bc303e9bSdamien 		if (mprot == NULL) {
1099bc303e9bSdamien 			printf("%s: could not allocate protection frame\n",
1100bc303e9bSdamien 			    sc->sc_dev.dv_xname);
1101bc303e9bSdamien 			m_freem(m0);
1102bc303e9bSdamien 			return ENOBUFS;
1103bc303e9bSdamien 		}
1104bc303e9bSdamien 
1105bc303e9bSdamien 		data = &sc->tx_data[sc->tx_cur];
1106b9520dbfSniallo 		desc = (struct rum_tx_desc *)data->buf;
1107b9520dbfSniallo 
1108bc303e9bSdamien 		/* avoid multiple free() of the same node for each fragment */
1109bc303e9bSdamien 		data->ni = ieee80211_ref_node(ni);
1110bc303e9bSdamien 
1111bc303e9bSdamien 		m_copydata(mprot, 0, mprot->m_pkthdr.len,
1112bc303e9bSdamien 		    data->buf + RT2573_TX_DESC_SIZE);
1113bc303e9bSdamien 		rum_setup_tx_desc(sc, desc,
1114bc303e9bSdamien 		    (needrts ? RT2573_TX_NEED_ACK : 0) | RT2573_TX_MORE_FRAG,
1115bc303e9bSdamien 		    0, mprot->m_pkthdr.len, protrate);
1116bc303e9bSdamien 
1117bc303e9bSdamien 		/* no roundup necessary here */
1118bc303e9bSdamien 		xferlen = RT2573_TX_DESC_SIZE + mprot->m_pkthdr.len;
1119bc303e9bSdamien 
1120bc303e9bSdamien 		/* XXX may want to pass the protection frame to BPF */
1121bc303e9bSdamien 
1122bc303e9bSdamien 		/* mbuf is no longer needed */
1123bc303e9bSdamien 		m_freem(mprot);
1124bc303e9bSdamien 
1125bc303e9bSdamien 		usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1126bc303e9bSdamien 		    xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY,
1127bc303e9bSdamien 		    RUM_TX_TIMEOUT, rum_txeof);
1128bc303e9bSdamien 		error = usbd_transfer(data->xfer);
1129bc303e9bSdamien 		if (error != 0 && error != USBD_IN_PROGRESS) {
1130bc303e9bSdamien 			m_freem(m0);
1131bc303e9bSdamien 			return error;
1132bc303e9bSdamien 		}
1133bc303e9bSdamien 
1134bc303e9bSdamien 		sc->tx_queued++;
1135bc303e9bSdamien 		sc->tx_cur = (sc->tx_cur + 1) % RUM_TX_LIST_COUNT;
1136bc303e9bSdamien 
1137bc303e9bSdamien 		flags |= RT2573_TX_LONG_RETRY | RT2573_TX_IFS_SIFS;
1138bc303e9bSdamien 	}
1139bc303e9bSdamien 
1140bc303e9bSdamien 	data = &sc->tx_data[sc->tx_cur];
1141bc303e9bSdamien 	desc = (struct rum_tx_desc *)data->buf;
1142bc303e9bSdamien 
1143b9520dbfSniallo 	data->ni = ni;
1144b9520dbfSniallo 
1145b9520dbfSniallo 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1146bc303e9bSdamien 		flags |= RT2573_TX_NEED_ACK;
1147b9520dbfSniallo 
114814761d2dSdamien 		dur = rum_txtime(RUM_ACK_SIZE, rum_ack_rate(ic, rate),
114914761d2dSdamien 		    ic->ic_flags) + sc->sifs;
1150b9520dbfSniallo 		*(uint16_t *)wh->i_dur = htole16(dur);
115174a1cafeSdamien 
1152171ac09aSdamien #ifndef IEEE80211_STA_ONLY
115374a1cafeSdamien 		/* tell hardware to set timestamp in probe responses */
115474a1cafeSdamien 		if ((wh->i_fc[0] &
115574a1cafeSdamien 		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
115674a1cafeSdamien 		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
115774a1cafeSdamien 			flags |= RT2573_TX_TIMESTAMP;
1158171ac09aSdamien #endif
1159b9520dbfSniallo 	}
1160b9520dbfSniallo 
1161b9520dbfSniallo #if NBPFILTER > 0
1162b9520dbfSniallo 	if (sc->sc_drvbpf != NULL) {
1163b9520dbfSniallo 		struct mbuf mb;
1164b9520dbfSniallo 		struct rum_tx_radiotap_header *tap = &sc->sc_txtap;
1165b9520dbfSniallo 
1166b9520dbfSniallo 		tap->wt_flags = 0;
1167b9520dbfSniallo 		tap->wt_rate = rate;
1168ab55d896Sjsg 		tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
1169ab55d896Sjsg 		tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
1170b9520dbfSniallo 		tap->wt_antenna = sc->tx_ant;
1171b9520dbfSniallo 
1172b9520dbfSniallo 		mb.m_data = (caddr_t)tap;
1173b9520dbfSniallo 		mb.m_len = sc->sc_txtap_len;
1174b9520dbfSniallo 		mb.m_next = m0;
1175f43e6f73Sclaudio 		mb.m_nextpkt = NULL;
1176f43e6f73Sclaudio 		mb.m_type = 0;
1177f43e6f73Sclaudio 		mb.m_flags = 0;
1178b9520dbfSniallo 		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
1179b9520dbfSniallo 	}
1180b9520dbfSniallo #endif
1181b9520dbfSniallo 
1182b9520dbfSniallo 	m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RT2573_TX_DESC_SIZE);
118314761d2dSdamien 	rum_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate);
1184b9520dbfSniallo 
1185524ea73bSdamien 	/* align end on a 4-bytes boundary */
1186e4409adcSdamien 	xferlen = (RT2573_TX_DESC_SIZE + m0->m_pkthdr.len + 3) & ~3;
1187b9520dbfSniallo 
1188b9520dbfSniallo 	/*
1189524ea73bSdamien 	 * No space left in the last URB to store the extra 4 bytes, force
1190b9520dbfSniallo 	 * sending of another URB.
1191b9520dbfSniallo 	 */
1192b9520dbfSniallo 	if ((xferlen % 64) == 0)
1193e4409adcSdamien 		xferlen += 4;
1194b9520dbfSniallo 
119574a1cafeSdamien 	DPRINTFN(10, ("sending frame len=%u rate=%u xfer len=%u\n",
119614761d2dSdamien 	    m0->m_pkthdr.len + RT2573_TX_DESC_SIZE, rate, xferlen));
1197b9520dbfSniallo 
1198bc303e9bSdamien 	/* mbuf is no longer needed */
1199bc303e9bSdamien 	m_freem(m0);
1200bc303e9bSdamien 
1201b9520dbfSniallo 	usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen,
120214761d2dSdamien 	    USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RUM_TX_TIMEOUT, rum_txeof);
1203b9520dbfSniallo 	error = usbd_transfer(data->xfer);
1204bc303e9bSdamien 	if (error != 0 && error != USBD_IN_PROGRESS)
1205b9520dbfSniallo 		return error;
1206b9520dbfSniallo 
1207b9520dbfSniallo 	sc->tx_queued++;
1208bc303e9bSdamien 	sc->tx_cur = (sc->tx_cur + 1) % RUM_TX_LIST_COUNT;
120914761d2dSdamien 
1210b9520dbfSniallo 	return 0;
1211b9520dbfSniallo }
1212b9520dbfSniallo 
121378315254Smbalmer void
rum_start(struct ifnet * ifp)1214b9520dbfSniallo rum_start(struct ifnet *ifp)
1215b9520dbfSniallo {
1216b9520dbfSniallo 	struct rum_softc *sc = ifp->if_softc;
1217b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
1218b9520dbfSniallo 	struct ieee80211_node *ni;
1219b9520dbfSniallo 	struct mbuf *m0;
1220b9520dbfSniallo 
1221b9520dbfSniallo 	/*
1222b9520dbfSniallo 	 * net80211 may still try to send management frames even if the
1223b9520dbfSniallo 	 * IFF_RUNNING flag is not set...
1224b9520dbfSniallo 	 */
1225de6cd8fbSdlg 	if (!(ifp->if_flags & IFF_RUNNING) || ifq_is_oactive(&ifp->if_snd))
1226b9520dbfSniallo 		return;
1227b9520dbfSniallo 
1228b9520dbfSniallo 	for (;;) {
1229bc303e9bSdamien 		if (sc->tx_queued >= RUM_TX_LIST_COUNT - 1) {
1230de6cd8fbSdlg 			ifq_set_oactive(&ifp->if_snd);
1231b9520dbfSniallo 			break;
1232b9520dbfSniallo 		}
1233b9520dbfSniallo 
123432a12f8bSmpi 		m0 = mq_dequeue(&ic->ic_mgtq);
123532a12f8bSmpi 		if (m0 != NULL) {
12366da4b19dSmpi 			ni = m0->m_pkthdr.ph_cookie;
1237b9520dbfSniallo #if NBPFILTER > 0
1238b9520dbfSniallo 			if (ic->ic_rawbpf != NULL)
1239b9520dbfSniallo 				bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1240b9520dbfSniallo #endif
124174a1cafeSdamien 			if (rum_tx_data(sc, m0, ni) != 0)
1242b9520dbfSniallo 				break;
1243b9520dbfSniallo 
1244b9520dbfSniallo 		} else {
1245b9520dbfSniallo 			if (ic->ic_state != IEEE80211_S_RUN)
1246b9520dbfSniallo 				break;
124732a12f8bSmpi 
124863bcfa73Spatrick 			m0 = ifq_dequeue(&ifp->if_snd);
1249b9520dbfSniallo 			if (m0 == NULL)
1250b9520dbfSniallo 				break;
1251b9520dbfSniallo #if NBPFILTER > 0
1252b9520dbfSniallo 			if (ifp->if_bpf != NULL)
1253b9520dbfSniallo 				bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
1254b9520dbfSniallo #endif
1255b9520dbfSniallo 			m0 = ieee80211_encap(ifp, m0, &ni);
1256b9520dbfSniallo 			if (m0 == NULL)
1257b9520dbfSniallo 				continue;
1258b9520dbfSniallo #if NBPFILTER > 0
1259b9520dbfSniallo 			if (ic->ic_rawbpf != NULL)
1260b9520dbfSniallo 				bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1261b9520dbfSniallo #endif
1262b9520dbfSniallo 			if (rum_tx_data(sc, m0, ni) != 0) {
1263b9520dbfSniallo 				if (ni != NULL)
1264b9520dbfSniallo 					ieee80211_release_node(ic, ni);
1265b9520dbfSniallo 				ifp->if_oerrors++;
1266b9520dbfSniallo 				break;
1267b9520dbfSniallo 			}
1268b9520dbfSniallo 		}
1269b9520dbfSniallo 
1270b9520dbfSniallo 		sc->sc_tx_timer = 5;
1271b9520dbfSniallo 		ifp->if_timer = 1;
1272b9520dbfSniallo 	}
1273b9520dbfSniallo }
1274b9520dbfSniallo 
127578315254Smbalmer void
rum_watchdog(struct ifnet * ifp)1276b9520dbfSniallo rum_watchdog(struct ifnet *ifp)
1277b9520dbfSniallo {
1278b9520dbfSniallo 	struct rum_softc *sc = ifp->if_softc;
1279b9520dbfSniallo 
1280b9520dbfSniallo 	ifp->if_timer = 0;
1281b9520dbfSniallo 
1282b9520dbfSniallo 	if (sc->sc_tx_timer > 0) {
1283b9520dbfSniallo 		if (--sc->sc_tx_timer == 0) {
12844ab2b9feSmbalmer 			printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1285b9520dbfSniallo 			/*rum_init(ifp); XXX needs a process context! */
1286b9520dbfSniallo 			ifp->if_oerrors++;
1287b9520dbfSniallo 			return;
1288b9520dbfSniallo 		}
1289b9520dbfSniallo 		ifp->if_timer = 1;
1290b9520dbfSniallo 	}
1291b9520dbfSniallo 
1292b9520dbfSniallo 	ieee80211_watchdog(ifp);
1293b9520dbfSniallo }
1294b9520dbfSniallo 
129578315254Smbalmer int
rum_ioctl(struct ifnet * ifp,u_long cmd,caddr_t data)1296b9520dbfSniallo rum_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1297b9520dbfSniallo {
1298b9520dbfSniallo 	struct rum_softc *sc = ifp->if_softc;
1299b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
1300b9520dbfSniallo 	int s, error = 0;
1301b9520dbfSniallo 
130212136ef5Sjakemsr 	if (usbd_is_dying(sc->sc_udev))
130312136ef5Sjakemsr 		return ENXIO;
130412136ef5Sjakemsr 
130512136ef5Sjakemsr 	usbd_ref_incr(sc->sc_udev);
130612136ef5Sjakemsr 
1307b9520dbfSniallo 	s = splnet();
1308b9520dbfSniallo 
1309b9520dbfSniallo 	switch (cmd) {
1310b9520dbfSniallo 	case SIOCSIFADDR:
1311b9520dbfSniallo 		ifp->if_flags |= IFF_UP;
1312b9520dbfSniallo 		/* FALLTHROUGH */
1313b9520dbfSniallo 	case SIOCSIFFLAGS:
1314b9520dbfSniallo 		if (ifp->if_flags & IFF_UP) {
1315b9520dbfSniallo 			if (ifp->if_flags & IFF_RUNNING)
1316b9520dbfSniallo 				rum_update_promisc(sc);
1317b9520dbfSniallo 			else
1318b9520dbfSniallo 				rum_init(ifp);
1319b9520dbfSniallo 		} else {
1320b9520dbfSniallo 			if (ifp->if_flags & IFF_RUNNING)
1321b9520dbfSniallo 				rum_stop(ifp, 1);
1322b9520dbfSniallo 		}
1323b9520dbfSniallo 		break;
1324b9520dbfSniallo 
1325b9520dbfSniallo 	case SIOCS80211CHANNEL:
1326b9520dbfSniallo 		/*
1327b9520dbfSniallo 		 * This allows for fast channel switching in monitor mode
1328b9520dbfSniallo 		 * (used by kismet). In IBSS mode, we must explicitly reset
1329b9520dbfSniallo 		 * the interface to generate a new beacon frame.
1330b9520dbfSniallo 		 */
1331b9520dbfSniallo 		error = ieee80211_ioctl(ifp, cmd, data);
1332b9520dbfSniallo 		if (error == ENETRESET &&
1333b9520dbfSniallo 		    ic->ic_opmode == IEEE80211_M_MONITOR) {
1334ed3bbfa7Sdamien 			if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1335ed3bbfa7Sdamien 			    (IFF_UP | IFF_RUNNING))
1336b9520dbfSniallo 				rum_set_chan(sc, ic->ic_ibss_chan);
133714761d2dSdamien 			error = 0;
1338b9520dbfSniallo 		}
1339b9520dbfSniallo 		break;
1340b9520dbfSniallo 
1341b9520dbfSniallo 	default:
1342b9520dbfSniallo 		error = ieee80211_ioctl(ifp, cmd, data);
1343b9520dbfSniallo 	}
1344b9520dbfSniallo 
1345b9520dbfSniallo 	if (error == ENETRESET) {
1346b9520dbfSniallo 		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1347b9520dbfSniallo 		    (IFF_UP | IFF_RUNNING))
1348b9520dbfSniallo 			rum_init(ifp);
1349b9520dbfSniallo 		error = 0;
1350b9520dbfSniallo 	}
1351b9520dbfSniallo 
1352b9520dbfSniallo 	splx(s);
1353b9520dbfSniallo 
135412136ef5Sjakemsr 	usbd_ref_decr(sc->sc_udev);
135512136ef5Sjakemsr 
1356b9520dbfSniallo 	return error;
1357b9520dbfSniallo }
1358b9520dbfSniallo 
135978315254Smbalmer void
rum_eeprom_read(struct rum_softc * sc,uint16_t addr,void * buf,int len)1360b9520dbfSniallo rum_eeprom_read(struct rum_softc *sc, uint16_t addr, void *buf, int len)
1361b9520dbfSniallo {
1362b9520dbfSniallo 	usb_device_request_t req;
1363b9520dbfSniallo 	usbd_status error;
1364b9520dbfSniallo 
1365b9520dbfSniallo 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1366b9520dbfSniallo 	req.bRequest = RT2573_READ_EEPROM;
1367b9520dbfSniallo 	USETW(req.wValue, 0);
1368b9520dbfSniallo 	USETW(req.wIndex, addr);
1369b9520dbfSniallo 	USETW(req.wLength, len);
1370b9520dbfSniallo 
1371b9520dbfSniallo 	error = usbd_do_request(sc->sc_udev, &req, buf);
1372b9520dbfSniallo 	if (error != 0) {
1373b9520dbfSniallo 		printf("%s: could not read EEPROM: %s\n",
13744ab2b9feSmbalmer 		    sc->sc_dev.dv_xname, usbd_errstr(error));
1375b9520dbfSniallo 	}
1376b9520dbfSniallo }
1377b9520dbfSniallo 
137878315254Smbalmer uint32_t
rum_read(struct rum_softc * sc,uint16_t reg)13796ce4a3b5Sdamien rum_read(struct rum_softc *sc, uint16_t reg)
1380b9520dbfSniallo {
1381b9520dbfSniallo 	uint32_t val;
1382b9520dbfSniallo 
13836ce4a3b5Sdamien 	rum_read_multi(sc, reg, &val, sizeof val);
1384b9520dbfSniallo 
138574a1cafeSdamien 	return letoh32(val);
1386b9520dbfSniallo }
1387b9520dbfSniallo 
138878315254Smbalmer void
rum_read_multi(struct rum_softc * sc,uint16_t reg,void * buf,int len)1389b9520dbfSniallo rum_read_multi(struct rum_softc *sc, uint16_t reg, void *buf, int len)
1390b9520dbfSniallo {
1391b9520dbfSniallo 	usb_device_request_t req;
1392b9520dbfSniallo 	usbd_status error;
1393b9520dbfSniallo 
1394b9520dbfSniallo 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1395308f6873Sdamien 	req.bRequest = RT2573_READ_MULTI_MAC;
1396b9520dbfSniallo 	USETW(req.wValue, 0);
1397308f6873Sdamien 	USETW(req.wIndex, reg);
1398b9520dbfSniallo 	USETW(req.wLength, len);
1399b9520dbfSniallo 
1400b9520dbfSniallo 	error = usbd_do_request(sc->sc_udev, &req, buf);
1401b9520dbfSniallo 	if (error != 0) {
1402b9520dbfSniallo 		printf("%s: could not multi read MAC register: %s\n",
14034ab2b9feSmbalmer 		    sc->sc_dev.dv_xname, usbd_errstr(error));
1404b9520dbfSniallo 	}
1405b9520dbfSniallo }
1406b9520dbfSniallo 
140778315254Smbalmer void
rum_write(struct rum_softc * sc,uint16_t reg,uint32_t val)1408b9520dbfSniallo rum_write(struct rum_softc *sc, uint16_t reg, uint32_t val)
1409b9520dbfSniallo {
14105cfb0993Sdamien 	uint32_t tmp = htole32(val);
1411b9520dbfSniallo 
14125cfb0993Sdamien 	rum_write_multi(sc, reg, &tmp, sizeof tmp);
1413b9520dbfSniallo }
1414b9520dbfSniallo 
141578315254Smbalmer void
rum_write_multi(struct rum_softc * sc,uint16_t reg,void * buf,size_t len)1416b9520dbfSniallo rum_write_multi(struct rum_softc *sc, uint16_t reg, void *buf, size_t len)
1417b9520dbfSniallo {
1418b9520dbfSniallo 	usb_device_request_t req;
1419b9520dbfSniallo 	usbd_status error;
1420d2305912Sjasper 	int offset;
1421b9520dbfSniallo 
1422b9520dbfSniallo 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1423b9520dbfSniallo 	req.bRequest = RT2573_WRITE_MULTI_MAC;
1424b9520dbfSniallo 	USETW(req.wValue, 0);
1425b9520dbfSniallo 
1426d2305912Sjasper 	/* write at most 64 bytes at a time */
1427d2305912Sjasper 	for (offset = 0; offset < len; offset += 64) {
1428d2305912Sjasper 		USETW(req.wIndex, reg + offset);
1429d2305912Sjasper 		USETW(req.wLength, MIN(len - offset, 64));
1430d2305912Sjasper 
1431d2305912Sjasper 		error = usbd_do_request(sc->sc_udev, &req, buf + offset);
1432b9520dbfSniallo 		if (error != 0) {
1433b9520dbfSniallo 			printf("%s: could not multi write MAC register: %s\n",
14344ab2b9feSmbalmer 			    sc->sc_dev.dv_xname, usbd_errstr(error));
1435b9520dbfSniallo 		}
1436b9520dbfSniallo 	}
1437d2305912Sjasper }
1438b9520dbfSniallo 
143978315254Smbalmer void
rum_bbp_write(struct rum_softc * sc,uint8_t reg,uint8_t val)1440b9520dbfSniallo rum_bbp_write(struct rum_softc *sc, uint8_t reg, uint8_t val)
1441b9520dbfSniallo {
144226819c62Sdamien 	uint32_t tmp;
1443b9520dbfSniallo 	int ntries;
1444b9520dbfSniallo 
1445b9520dbfSniallo 	for (ntries = 0; ntries < 5; ntries++) {
144641d1edf3Sdamien 		if (!(rum_read(sc, RT2573_PHY_CSR3) & RT2573_BBP_BUSY))
1447b9520dbfSniallo 			break;
1448b9520dbfSniallo 	}
1449b9520dbfSniallo 	if (ntries == 5) {
14504ab2b9feSmbalmer 		printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
1451b9520dbfSniallo 		return;
1452b9520dbfSniallo 	}
1453b9520dbfSniallo 
1454b9520dbfSniallo 	tmp = RT2573_BBP_BUSY | (reg & 0x7f) << 8 | val;
1455b9520dbfSniallo 	rum_write(sc, RT2573_PHY_CSR3, tmp);
1456b9520dbfSniallo }
1457b9520dbfSniallo 
145878315254Smbalmer uint8_t
rum_bbp_read(struct rum_softc * sc,uint8_t reg)1459b9520dbfSniallo rum_bbp_read(struct rum_softc *sc, uint8_t reg)
1460b9520dbfSniallo {
146126819c62Sdamien 	uint32_t val;
1462b9520dbfSniallo 	int ntries;
1463b9520dbfSniallo 
1464b9520dbfSniallo 	for (ntries = 0; ntries < 5; ntries++) {
146515fad6aeSdamien 		if (!(rum_read(sc, RT2573_PHY_CSR3) & RT2573_BBP_BUSY))
1466b9520dbfSniallo 			break;
1467b9520dbfSniallo 	}
1468b9520dbfSniallo 	if (ntries == 5) {
14694ab2b9feSmbalmer 		printf("%s: could not read BBP\n", sc->sc_dev.dv_xname);
1470b9520dbfSniallo 		return 0;
1471b9520dbfSniallo 	}
1472b9520dbfSniallo 
1473b9520dbfSniallo 	val = RT2573_BBP_BUSY | RT2573_BBP_READ | reg << 8;
1474b9520dbfSniallo 	rum_write(sc, RT2573_PHY_CSR3, val);
1475b9520dbfSniallo 
1476b9520dbfSniallo 	for (ntries = 0; ntries < 100; ntries++) {
147726819c62Sdamien 		val = rum_read(sc, RT2573_PHY_CSR3);
1478b9520dbfSniallo 		if (!(val & RT2573_BBP_BUSY))
147915fad6aeSdamien 			return val & 0xff;
1480b9520dbfSniallo 		DELAY(1);
1481b9520dbfSniallo 	}
1482b9520dbfSniallo 
14834ab2b9feSmbalmer 	printf("%s: could not read BBP\n", sc->sc_dev.dv_xname);
1484b9520dbfSniallo 	return 0;
1485b9520dbfSniallo }
1486b9520dbfSniallo 
148778315254Smbalmer void
rum_rf_write(struct rum_softc * sc,uint8_t reg,uint32_t val)1488b9520dbfSniallo rum_rf_write(struct rum_softc *sc, uint8_t reg, uint32_t val)
1489b9520dbfSniallo {
1490b9520dbfSniallo 	uint32_t tmp;
1491b9520dbfSniallo 	int ntries;
1492b9520dbfSniallo 
1493b9520dbfSniallo 	for (ntries = 0; ntries < 5; ntries++) {
1494b9520dbfSniallo 		if (!(rum_read(sc, RT2573_PHY_CSR4) & RT2573_RF_BUSY))
1495b9520dbfSniallo 			break;
1496b9520dbfSniallo 	}
1497b9520dbfSniallo 	if (ntries == 5) {
14984ab2b9feSmbalmer 		printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
1499b9520dbfSniallo 		return;
1500b9520dbfSniallo 	}
1501b9520dbfSniallo 
15027bae1587Sdamien 	tmp = RT2573_RF_BUSY | RT2573_RF_20BIT | (val & 0xfffff) << 2 |
1503b9520dbfSniallo 	    (reg & 3);
1504b9520dbfSniallo 	rum_write(sc, RT2573_PHY_CSR4, tmp);
1505b9520dbfSniallo 
1506b9520dbfSniallo 	/* remember last written value in sc */
1507b9520dbfSniallo 	sc->rf_regs[reg] = val;
1508b9520dbfSniallo 
150914761d2dSdamien 	DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0xfffff));
1510b9520dbfSniallo }
1511b9520dbfSniallo 
151278315254Smbalmer void
rum_select_antenna(struct rum_softc * sc)151314761d2dSdamien rum_select_antenna(struct rum_softc *sc)
151414761d2dSdamien {
151514761d2dSdamien 	uint8_t bbp4, bbp77;
151614761d2dSdamien 	uint32_t tmp;
151714761d2dSdamien 
151814761d2dSdamien 	bbp4  = rum_bbp_read(sc, 4);
151914761d2dSdamien 	bbp77 = rum_bbp_read(sc, 77);
152014761d2dSdamien 
152114761d2dSdamien 	/* TBD */
152214761d2dSdamien 
152314761d2dSdamien 	/* make sure Rx is disabled before switching antenna */
152414761d2dSdamien 	tmp = rum_read(sc, RT2573_TXRX_CSR0);
152514761d2dSdamien 	rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
152614761d2dSdamien 
152714761d2dSdamien 	rum_bbp_write(sc,  4, bbp4);
152814761d2dSdamien 	rum_bbp_write(sc, 77, bbp77);
152914761d2dSdamien 
153014761d2dSdamien 	rum_write(sc, RT2573_TXRX_CSR0, tmp);
153114761d2dSdamien }
153214761d2dSdamien 
153314761d2dSdamien /*
153414761d2dSdamien  * Enable multi-rate retries for frames sent at OFDM rates.
153514761d2dSdamien  * In 802.11b/g mode, allow fallback to CCK rates.
153614761d2dSdamien  */
153778315254Smbalmer void
rum_enable_mrr(struct rum_softc * sc)153814761d2dSdamien rum_enable_mrr(struct rum_softc *sc)
153914761d2dSdamien {
154014761d2dSdamien 	struct ieee80211com *ic = &sc->sc_ic;
154114761d2dSdamien 	uint32_t tmp;
154214761d2dSdamien 
154314761d2dSdamien 	tmp = rum_read(sc, RT2573_TXRX_CSR4);
154414761d2dSdamien 
154514761d2dSdamien 	tmp &= ~RT2573_MRR_CCK_FALLBACK;
154614761d2dSdamien 	if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan))
154714761d2dSdamien 		tmp |= RT2573_MRR_CCK_FALLBACK;
154814761d2dSdamien 	tmp |= RT2573_MRR_ENABLED;
154914761d2dSdamien 
155014761d2dSdamien 	rum_write(sc, RT2573_TXRX_CSR4, tmp);
155114761d2dSdamien }
155214761d2dSdamien 
155378315254Smbalmer void
rum_set_txpreamble(struct rum_softc * sc)155414761d2dSdamien rum_set_txpreamble(struct rum_softc *sc)
155514761d2dSdamien {
155614761d2dSdamien 	uint32_t tmp;
155714761d2dSdamien 
155814761d2dSdamien 	tmp = rum_read(sc, RT2573_TXRX_CSR4);
155914761d2dSdamien 
156014761d2dSdamien 	tmp &= ~RT2573_SHORT_PREAMBLE;
156114761d2dSdamien 	if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
156214761d2dSdamien 		tmp |= RT2573_SHORT_PREAMBLE;
156314761d2dSdamien 
156414761d2dSdamien 	rum_write(sc, RT2573_TXRX_CSR4, tmp);
156514761d2dSdamien }
156614761d2dSdamien 
156778315254Smbalmer void
rum_set_basicrates(struct rum_softc * sc)156814761d2dSdamien rum_set_basicrates(struct rum_softc *sc)
156914761d2dSdamien {
157014761d2dSdamien 	struct ieee80211com *ic = &sc->sc_ic;
157114761d2dSdamien 
157214761d2dSdamien 	/* update basic rate set */
157314761d2dSdamien 	if (ic->ic_curmode == IEEE80211_MODE_11B) {
157414761d2dSdamien 		/* 11b basic rates: 1, 2Mbps */
157514761d2dSdamien 		rum_write(sc, RT2573_TXRX_CSR5, 0x3);
1576bc303e9bSdamien 	} else if (ic->ic_curmode == IEEE80211_MODE_11A) {
157714761d2dSdamien 		/* 11a basic rates: 6, 12, 24Mbps */
157814761d2dSdamien 		rum_write(sc, RT2573_TXRX_CSR5, 0x150);
157914761d2dSdamien 	} else {
1580bc303e9bSdamien 		/* 11b/g basic rates: 1, 2, 5.5, 11Mbps */
1581bc303e9bSdamien 		rum_write(sc, RT2573_TXRX_CSR5, 0xf);
158214761d2dSdamien 	}
158314761d2dSdamien }
158414761d2dSdamien 
158514761d2dSdamien /*
158614761d2dSdamien  * Reprogram MAC/BBP to switch to a new band.  Values taken from the reference
158714761d2dSdamien  * driver.
158814761d2dSdamien  */
158978315254Smbalmer void
rum_select_band(struct rum_softc * sc,struct ieee80211_channel * c)159014761d2dSdamien rum_select_band(struct rum_softc *sc, struct ieee80211_channel *c)
159114761d2dSdamien {
159214761d2dSdamien 	uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
159314761d2dSdamien 	uint32_t tmp;
159414761d2dSdamien 
159514761d2dSdamien 	/* update all BBP registers that depend on the band */
159614761d2dSdamien 	bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
159714761d2dSdamien 	bbp35 = 0x50; bbp97 = 0x48; bbp98  = 0x48;
159814761d2dSdamien 	if (IEEE80211_IS_CHAN_5GHZ(c)) {
159914761d2dSdamien 		bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
160014761d2dSdamien 		bbp35 += 0x10; bbp97 += 0x10; bbp98  += 0x10;
160114761d2dSdamien 	}
160214761d2dSdamien 	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
160314761d2dSdamien 	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
160414761d2dSdamien 		bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
160514761d2dSdamien 	}
160614761d2dSdamien 
160714761d2dSdamien 	sc->bbp17 = bbp17;
160814761d2dSdamien 	rum_bbp_write(sc,  17, bbp17);
160914761d2dSdamien 	rum_bbp_write(sc,  96, bbp96);
161014761d2dSdamien 	rum_bbp_write(sc, 104, bbp104);
161114761d2dSdamien 
161214761d2dSdamien 	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
161314761d2dSdamien 	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
161414761d2dSdamien 		rum_bbp_write(sc, 75, 0x80);
161514761d2dSdamien 		rum_bbp_write(sc, 86, 0x80);
161614761d2dSdamien 		rum_bbp_write(sc, 88, 0x80);
161714761d2dSdamien 	}
161814761d2dSdamien 
161914761d2dSdamien 	rum_bbp_write(sc, 35, bbp35);
162014761d2dSdamien 	rum_bbp_write(sc, 97, bbp97);
162114761d2dSdamien 	rum_bbp_write(sc, 98, bbp98);
162214761d2dSdamien 
162314761d2dSdamien 	tmp = rum_read(sc, RT2573_PHY_CSR0);
162414761d2dSdamien 	tmp &= ~(RT2573_PA_PE_2GHZ | RT2573_PA_PE_5GHZ);
162514761d2dSdamien 	if (IEEE80211_IS_CHAN_2GHZ(c))
162614761d2dSdamien 		tmp |= RT2573_PA_PE_2GHZ;
162714761d2dSdamien 	else
162814761d2dSdamien 		tmp |= RT2573_PA_PE_5GHZ;
162914761d2dSdamien 	rum_write(sc, RT2573_PHY_CSR0, tmp);
163014761d2dSdamien 
163114761d2dSdamien 	/* 802.11a uses a 16 microseconds short interframe space */
163214761d2dSdamien 	sc->sifs = IEEE80211_IS_CHAN_5GHZ(c) ? 16 : 10;
163314761d2dSdamien }
163414761d2dSdamien 
163578315254Smbalmer void
rum_set_chan(struct rum_softc * sc,struct ieee80211_channel * c)1636b9520dbfSniallo rum_set_chan(struct rum_softc *sc, struct ieee80211_channel *c)
1637b9520dbfSniallo {
1638b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
163914761d2dSdamien 	const struct rfprog *rfprog;
164014761d2dSdamien 	uint8_t bbp3, bbp94 = RT2573_BBPR94_DEFAULT;
1641b9520dbfSniallo 	int8_t power;
164214761d2dSdamien 	u_int i, chan;
1643b9520dbfSniallo 
1644b9520dbfSniallo 	chan = ieee80211_chan2ieee(ic, c);
1645b9520dbfSniallo 	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1646b9520dbfSniallo 		return;
1647b9520dbfSniallo 
164814761d2dSdamien 	/* select the appropriate RF settings based on what EEPROM says */
164914761d2dSdamien 	rfprog = (sc->rf_rev == RT2573_RF_5225 ||
165014761d2dSdamien 		  sc->rf_rev == RT2573_RF_2527) ? rum_rf5225 : rum_rf5226;
165114761d2dSdamien 
165214761d2dSdamien 	/* find the settings for this channel (we know it exists) */
165336dba039Sjsg 	for (i = 0; rfprog[i].chan != chan; i++)
165436dba039Sjsg 		;
165514761d2dSdamien 
165674a1cafeSdamien 	power = sc->txpow[i];
1657b9520dbfSniallo 	if (power < 0) {
1658b9520dbfSniallo 		bbp94 += power;
1659b9520dbfSniallo 		power = 0;
1660b9520dbfSniallo 	} else if (power > 31) {
1661b9520dbfSniallo 		bbp94 += power - 31;
1662b9520dbfSniallo 		power = 31;
1663b9520dbfSniallo 	}
166414761d2dSdamien 
166514761d2dSdamien 	/*
166614761d2dSdamien 	 * If we are switching from the 2GHz band to the 5GHz band or
166714761d2dSdamien 	 * vice-versa, BBP registers need to be reprogrammed.
166814761d2dSdamien 	 */
166914761d2dSdamien 	if (c->ic_flags != sc->sc_curchan->ic_flags) {
167014761d2dSdamien 		rum_select_band(sc, c);
167114761d2dSdamien 		rum_select_antenna(sc);
167214761d2dSdamien 	}
1673b9520dbfSniallo 	sc->sc_curchan = c;
1674b9520dbfSniallo 
167514761d2dSdamien 	rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
167614761d2dSdamien 	rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
167714761d2dSdamien 	rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7);
167814761d2dSdamien 	rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
1679b9520dbfSniallo 
168014761d2dSdamien 	rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
168114761d2dSdamien 	rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
168214761d2dSdamien 	rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7 | 1);
168314761d2dSdamien 	rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
1684b9520dbfSniallo 
168514761d2dSdamien 	rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
168614761d2dSdamien 	rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
168714761d2dSdamien 	rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7);
168814761d2dSdamien 	rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
1689b430bbb4Sdamien 
1690b430bbb4Sdamien 	DELAY(10);
1691b9520dbfSniallo 
169214761d2dSdamien 	/* enable smart mode for MIMO-capable RFs */
169314761d2dSdamien 	bbp3 = rum_bbp_read(sc, 3);
169414761d2dSdamien 
169514761d2dSdamien 	bbp3 &= ~RT2573_SMART_MODE;
169614761d2dSdamien 	if (sc->rf_rev == RT2573_RF_5225 || sc->rf_rev == RT2573_RF_2527)
169714761d2dSdamien 		bbp3 |= RT2573_SMART_MODE;
169814761d2dSdamien 
169914761d2dSdamien 	rum_bbp_write(sc, 3, bbp3);
170014761d2dSdamien 
1701b9520dbfSniallo 	if (bbp94 != RT2573_BBPR94_DEFAULT)
1702b9520dbfSniallo 		rum_bbp_write(sc, 94, bbp94);
1703b9520dbfSniallo }
1704b9520dbfSniallo 
1705b9520dbfSniallo /*
1706b9520dbfSniallo  * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
1707b9520dbfSniallo  * and HostAP operating modes.
1708b9520dbfSniallo  */
170978315254Smbalmer void
rum_enable_tsf_sync(struct rum_softc * sc)1710b9520dbfSniallo rum_enable_tsf_sync(struct rum_softc *sc)
1711b9520dbfSniallo {
1712b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
1713b9520dbfSniallo 	uint32_t tmp;
1714b9520dbfSniallo 
1715171ac09aSdamien #ifndef IEEE80211_STA_ONLY
1716b9520dbfSniallo 	if (ic->ic_opmode != IEEE80211_M_STA) {
1717b9520dbfSniallo 		/*
1718b9520dbfSniallo 		 * Change default 16ms TBTT adjustment to 8ms.
1719b9520dbfSniallo 		 * Must be done before enabling beacon generation.
1720b9520dbfSniallo 		 */
1721b9520dbfSniallo 		rum_write(sc, RT2573_TXRX_CSR10, 1 << 12 | 8);
1722b9520dbfSniallo 	}
1723171ac09aSdamien #endif
1724b9520dbfSniallo 
1725b9520dbfSniallo 	tmp = rum_read(sc, RT2573_TXRX_CSR9) & 0xff000000;
1726b9520dbfSniallo 
1727b9520dbfSniallo 	/* set beacon interval (in 1/16ms unit) */
1728b9520dbfSniallo 	tmp |= ic->ic_bss->ni_intval * 16;
1729b9520dbfSniallo 
1730b9520dbfSniallo 	tmp |= RT2573_TSF_TICKING | RT2573_ENABLE_TBTT;
1731b9520dbfSniallo 	if (ic->ic_opmode == IEEE80211_M_STA)
1732b9520dbfSniallo 		tmp |= RT2573_TSF_MODE(1);
1733171ac09aSdamien #ifndef IEEE80211_STA_ONLY
1734b9520dbfSniallo 	else
1735b9520dbfSniallo 		tmp |= RT2573_TSF_MODE(2) | RT2573_GENERATE_BEACON;
1736171ac09aSdamien #endif
1737b9520dbfSniallo 	rum_write(sc, RT2573_TXRX_CSR9, tmp);
1738b9520dbfSniallo }
1739b9520dbfSniallo 
174078315254Smbalmer void
rum_update_slot(struct rum_softc * sc)1741b9520dbfSniallo rum_update_slot(struct rum_softc *sc)
1742b9520dbfSniallo {
1743b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
1744b9520dbfSniallo 	uint8_t slottime;
1745b9520dbfSniallo 	uint32_t tmp;
1746b9520dbfSniallo 
17478443256dSkevlo 	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ?
17488443256dSkevlo 	    IEEE80211_DUR_DS_SHSLOT : IEEE80211_DUR_DS_SLOT;
1749b9520dbfSniallo 
1750b9520dbfSniallo 	tmp = rum_read(sc, RT2573_MAC_CSR9);
1751b9520dbfSniallo 	tmp = (tmp & ~0xff) | slottime;
1752b9520dbfSniallo 	rum_write(sc, RT2573_MAC_CSR9, tmp);
175314761d2dSdamien 
175414761d2dSdamien 	DPRINTF(("setting slot time to %uus\n", slottime));
1755b9520dbfSniallo }
1756b9520dbfSniallo 
175778315254Smbalmer void
rum_set_bssid(struct rum_softc * sc,const uint8_t * bssid)1758e7c1b474Sdamien rum_set_bssid(struct rum_softc *sc, const uint8_t *bssid)
1759b9520dbfSniallo {
1760b9520dbfSniallo 	uint32_t tmp;
1761b9520dbfSniallo 
1762b9520dbfSniallo 	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
1763b9520dbfSniallo 	rum_write(sc, RT2573_MAC_CSR4, tmp);
1764b9520dbfSniallo 
1765e7c1b474Sdamien 	tmp = bssid[4] | bssid[5] << 8 | RT2573_ONE_BSSID << 16;
1766b9520dbfSniallo 	rum_write(sc, RT2573_MAC_CSR5, tmp);
1767b9520dbfSniallo }
1768b9520dbfSniallo 
176978315254Smbalmer void
rum_set_macaddr(struct rum_softc * sc,const uint8_t * addr)1770e7c1b474Sdamien rum_set_macaddr(struct rum_softc *sc, const uint8_t *addr)
1771b9520dbfSniallo {
1772b9520dbfSniallo 	uint32_t tmp;
1773b9520dbfSniallo 
1774b9520dbfSniallo 	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
1775b9520dbfSniallo 	rum_write(sc, RT2573_MAC_CSR2, tmp);
1776b9520dbfSniallo 
1777e7c1b474Sdamien 	tmp = addr[4] | addr[5] << 8 | 0xff << 16;
1778b9520dbfSniallo 	rum_write(sc, RT2573_MAC_CSR3, tmp);
1779b9520dbfSniallo }
1780b9520dbfSniallo 
178178315254Smbalmer void
rum_update_promisc(struct rum_softc * sc)1782b9520dbfSniallo rum_update_promisc(struct rum_softc *sc)
1783b9520dbfSniallo {
1784b9520dbfSniallo 	struct ifnet *ifp = &sc->sc_ic.ic_if;
178526819c62Sdamien 	uint32_t tmp;
1786b9520dbfSniallo 
1787b9520dbfSniallo 	tmp = rum_read(sc, RT2573_TXRX_CSR0);
1788b9520dbfSniallo 
1789b9520dbfSniallo 	tmp &= ~RT2573_DROP_NOT_TO_ME;
1790b9520dbfSniallo 	if (!(ifp->if_flags & IFF_PROMISC))
1791b9520dbfSniallo 		tmp |= RT2573_DROP_NOT_TO_ME;
1792b9520dbfSniallo 
1793b9520dbfSniallo 	rum_write(sc, RT2573_TXRX_CSR0, tmp);
1794b9520dbfSniallo 
179514761d2dSdamien 	DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
179614761d2dSdamien 	    "entering" : "leaving"));
1797b9520dbfSniallo }
1798b9520dbfSniallo 
179978315254Smbalmer const char *
rum_get_rf(int rev)1800b9520dbfSniallo rum_get_rf(int rev)
1801b9520dbfSniallo {
1802b9520dbfSniallo 	switch (rev) {
1803e24b0aa6Sdamien 	case RT2573_RF_2527:	return "RT2527 (MIMO XR)";
1804b9520dbfSniallo 	case RT2573_RF_2528:	return "RT2528";
1805e24b0aa6Sdamien 	case RT2573_RF_5225:	return "RT5225 (MIMO XR)";
180614761d2dSdamien 	case RT2573_RF_5226:	return "RT5226";
1807b9520dbfSniallo 	default:		return "unknown";
1808b9520dbfSniallo 	}
1809b9520dbfSniallo }
1810b9520dbfSniallo 
181178315254Smbalmer void
rum_read_eeprom(struct rum_softc * sc)1812b9520dbfSniallo rum_read_eeprom(struct rum_softc *sc)
1813b9520dbfSniallo {
1814b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
1815b9520dbfSniallo 	uint16_t val;
181614761d2dSdamien #ifdef RUM_DEBUG
181714761d2dSdamien 	int i;
181814761d2dSdamien #endif
1819b9520dbfSniallo 
182014761d2dSdamien 	/* read MAC/BBP type */
1821b9520dbfSniallo 	rum_eeprom_read(sc, RT2573_EEPROM_MACBBP, &val, 2);
1822b9520dbfSniallo 	sc->macbbp_rev = letoh16(val);
1823b9520dbfSniallo 
1824b9520dbfSniallo 	/* read MAC address */
1825b9520dbfSniallo 	rum_eeprom_read(sc, RT2573_EEPROM_ADDRESS, ic->ic_myaddr, 6);
1826b9520dbfSniallo 
182714761d2dSdamien 	rum_eeprom_read(sc, RT2573_EEPROM_ANTENNA, &val, 2);
182814761d2dSdamien 	val = letoh16(val);
182914761d2dSdamien 	sc->rf_rev =   (val >> 11) & 0x1f;
183014761d2dSdamien 	sc->hw_radio = (val >> 10) & 0x1;
183114761d2dSdamien 	sc->rx_ant =   (val >> 4)  & 0x3;
183214761d2dSdamien 	sc->tx_ant =   (val >> 2)  & 0x3;
183314761d2dSdamien 	sc->nb_ant =   val & 0x3;
1834b9520dbfSniallo 
183514761d2dSdamien 	DPRINTF(("RF revision=%d\n", sc->rf_rev));
183614761d2dSdamien 
183714761d2dSdamien 	rum_eeprom_read(sc, RT2573_EEPROM_CONFIG2, &val, 2);
1838aeed98a5Sjsg 	val = letoh16(val);
183914761d2dSdamien 	sc->ext_5ghz_lna = (val >> 6) & 0x1;
184014761d2dSdamien 	sc->ext_2ghz_lna = (val >> 4) & 0x1;
184114761d2dSdamien 
184214761d2dSdamien 	DPRINTF(("External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
184314761d2dSdamien 	    sc->ext_2ghz_lna, sc->ext_5ghz_lna));
184414761d2dSdamien 
184514761d2dSdamien 	rum_eeprom_read(sc, RT2573_EEPROM_RSSI_2GHZ_OFFSET, &val, 2);
184614761d2dSdamien 	val = letoh16(val);
184714761d2dSdamien 	if ((val & 0xff) != 0xff)
184814761d2dSdamien 		sc->rssi_2ghz_corr = (int8_t)(val & 0xff);	/* signed */
184914761d2dSdamien 
185014761d2dSdamien 	rum_eeprom_read(sc, RT2573_EEPROM_RSSI_5GHZ_OFFSET, &val, 2);
185114761d2dSdamien 	val = letoh16(val);
185214761d2dSdamien 	if ((val & 0xff) != 0xff)
185314761d2dSdamien 		sc->rssi_5ghz_corr = (int8_t)(val & 0xff);	/* signed */
185414761d2dSdamien 
185514761d2dSdamien 	DPRINTF(("RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
185614761d2dSdamien 	    sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
185714761d2dSdamien 
185814761d2dSdamien 	rum_eeprom_read(sc, RT2573_EEPROM_FREQ_OFFSET, &val, 2);
1859aeed98a5Sjsg 	val = letoh16(val);
186014761d2dSdamien 	if ((val & 0xff) != 0xff)
186114761d2dSdamien 		sc->rffreq = val & 0xff;
186214761d2dSdamien 
186314761d2dSdamien 	DPRINTF(("RF freq=%d\n", sc->rffreq));
186414761d2dSdamien 
186514761d2dSdamien 	/* read Tx power for all a/b/g channels */
186614761d2dSdamien 	rum_eeprom_read(sc, RT2573_EEPROM_TXPOWER, sc->txpow, 14);
186774a1cafeSdamien 	/* XXX default Tx power for 802.11a channels */
186874a1cafeSdamien 	memset(sc->txpow + 14, 24, sizeof (sc->txpow) - 14);
186914761d2dSdamien #ifdef RUM_DEBUG
187014761d2dSdamien 	for (i = 0; i < 14; i++)
1871fc0d81f2Sdamien 		DPRINTF(("Channel=%d Tx power=%d\n", i + 1,  sc->txpow[i]));
187214761d2dSdamien #endif
187314761d2dSdamien 
187414761d2dSdamien 	/* read default values for BBP registers */
187514761d2dSdamien 	rum_eeprom_read(sc, RT2573_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
187614761d2dSdamien #ifdef RUM_DEBUG
187714761d2dSdamien 	for (i = 0; i < 14; i++) {
187814761d2dSdamien 		if (sc->bbp_prom[i].reg == 0 || sc->bbp_prom[i].reg == 0xff)
187914761d2dSdamien 			continue;
188014761d2dSdamien 		DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
188114761d2dSdamien 		    sc->bbp_prom[i].val));
188214761d2dSdamien 	}
188314761d2dSdamien #endif
1884b9520dbfSniallo }
1885b9520dbfSniallo 
188678315254Smbalmer int
rum_bbp_init(struct rum_softc * sc)1887b9520dbfSniallo rum_bbp_init(struct rum_softc *sc)
1888b9520dbfSniallo {
1889b9520dbfSniallo 	int i, ntries;
1890b9520dbfSniallo 
189114761d2dSdamien 	/* wait for BBP to be ready */
1892b9520dbfSniallo 	for (ntries = 0; ntries < 100; ntries++) {
1893bc303e9bSdamien 		const uint8_t val = rum_bbp_read(sc, 0);
189414761d2dSdamien 		if (val != 0 && val != 0xff)
1895b9520dbfSniallo 			break;
1896b9520dbfSniallo 		DELAY(1000);
1897b9520dbfSniallo 	}
189814761d2dSdamien 	if (ntries == 100) {
189914761d2dSdamien 		printf("%s: timeout waiting for BBP\n",
19004ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
190114761d2dSdamien 		return EIO;
190214761d2dSdamien 	}
1903b9520dbfSniallo 
1904b9520dbfSniallo 	/* initialize BBP registers to default values */
19057d128c60Sjasper 	for (i = 0; i < nitems(rum_def_bbp); i++)
1906b9520dbfSniallo 		rum_bbp_write(sc, rum_def_bbp[i].reg, rum_def_bbp[i].val);
1907b9520dbfSniallo 
190814761d2dSdamien 	/* write vendor-specific BBP values (from EEPROM) */
1909b9520dbfSniallo 	for (i = 0; i < 16; i++) {
191014761d2dSdamien 		if (sc->bbp_prom[i].reg == 0 || sc->bbp_prom[i].reg == 0xff)
1911b9520dbfSniallo 			continue;
1912b9520dbfSniallo 		rum_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1913b9520dbfSniallo 	}
1914b9520dbfSniallo 
1915b9520dbfSniallo 	return 0;
1916b9520dbfSniallo }
1917b9520dbfSniallo 
191878315254Smbalmer int
rum_init(struct ifnet * ifp)1919b9520dbfSniallo rum_init(struct ifnet *ifp)
1920b9520dbfSniallo {
1921b9520dbfSniallo 	struct rum_softc *sc = ifp->if_softc;
1922b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
192314761d2dSdamien 	uint32_t tmp;
1924b9520dbfSniallo 	usbd_status error;
192514761d2dSdamien 	int i, ntries;
1926b9520dbfSniallo 
1927b9520dbfSniallo 	rum_stop(ifp, 0);
1928b9520dbfSniallo 
1929b9520dbfSniallo 	/* initialize MAC registers to default values */
19307d128c60Sjasper 	for (i = 0; i < nitems(rum_def_mac); i++)
1931b9520dbfSniallo 		rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);
1932b9520dbfSniallo 
1933b9520dbfSniallo 	/* set host ready */
193414c47094Sdamien 	rum_write(sc, RT2573_MAC_CSR1, 3);
193514c47094Sdamien 	rum_write(sc, RT2573_MAC_CSR1, 0);
1936b9520dbfSniallo 
193714761d2dSdamien 	/* wait for BBP/RF to wakeup */
193814761d2dSdamien 	for (ntries = 0; ntries < 1000; ntries++) {
193914761d2dSdamien 		if (rum_read(sc, RT2573_MAC_CSR12) & 8)
194014761d2dSdamien 			break;
194114761d2dSdamien 		rum_write(sc, RT2573_MAC_CSR12, 4);	/* force wakeup */
194214761d2dSdamien 		DELAY(1000);
194314761d2dSdamien 	}
194414761d2dSdamien 	if (ntries == 1000) {
194514761d2dSdamien 		printf("%s: timeout waiting for BBP/RF to wakeup\n",
19464ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
1947c8fc8278Stedu 		error = ENODEV;
194814761d2dSdamien 		goto fail;
194914761d2dSdamien 	}
195014761d2dSdamien 
19517c8343a4Sdamien 	if ((error = rum_bbp_init(sc)) != 0)
1952b9520dbfSniallo 		goto fail;
1953b9520dbfSniallo 
195414761d2dSdamien 	/* select default channel */
195514761d2dSdamien 	sc->sc_curchan = ic->ic_bss->ni_chan = ic->ic_ibss_chan;
195614761d2dSdamien 	rum_select_band(sc, sc->sc_curchan);
1957b9520dbfSniallo 	rum_select_antenna(sc);
195814761d2dSdamien 	rum_set_chan(sc, sc->sc_curchan);
1959b9520dbfSniallo 
19602703ec25Sdamien 	/* clear STA registers */
196114761d2dSdamien 	rum_read_multi(sc, RT2573_STA_CSR0, sc->sta, sizeof sc->sta);
1962b9520dbfSniallo 
1963b9520dbfSniallo 	IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
1964b9520dbfSniallo 	rum_set_macaddr(sc, ic->ic_myaddr);
1965b9520dbfSniallo 
196614c47094Sdamien 	/* initialize ASIC */
196714c47094Sdamien 	rum_write(sc, RT2573_MAC_CSR1, 4);
196814c47094Sdamien 
1969b9520dbfSniallo 	/*
197014761d2dSdamien 	 * Allocate xfer for AMRR statistics requests.
197114761d2dSdamien 	 */
197214761d2dSdamien 	sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev);
197314761d2dSdamien 	if (sc->amrr_xfer == NULL) {
197414761d2dSdamien 		printf("%s: could not allocate AMRR xfer\n",
19754ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
197614761d2dSdamien 		goto fail;
197714761d2dSdamien 	}
197814761d2dSdamien 
197914761d2dSdamien 	/*
1980b9520dbfSniallo 	 * Open Tx and Rx USB bulk pipes.
1981b9520dbfSniallo 	 */
1982b9520dbfSniallo 	error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
1983b9520dbfSniallo 	    &sc->sc_tx_pipeh);
1984b9520dbfSniallo 	if (error != 0) {
1985b9520dbfSniallo 		printf("%s: could not open Tx pipe: %s\n",
19864ab2b9feSmbalmer 		    sc->sc_dev.dv_xname, usbd_errstr(error));
1987b9520dbfSniallo 		goto fail;
1988b9520dbfSniallo 	}
1989b9520dbfSniallo 	error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
1990b9520dbfSniallo 	    &sc->sc_rx_pipeh);
1991b9520dbfSniallo 	if (error != 0) {
1992b9520dbfSniallo 		printf("%s: could not open Rx pipe: %s\n",
19934ab2b9feSmbalmer 		    sc->sc_dev.dv_xname, usbd_errstr(error));
1994b9520dbfSniallo 		goto fail;
1995b9520dbfSniallo 	}
1996b9520dbfSniallo 
1997b9520dbfSniallo 	/*
1998b9520dbfSniallo 	 * Allocate Tx and Rx xfer queues.
1999b9520dbfSniallo 	 */
2000b9520dbfSniallo 	error = rum_alloc_tx_list(sc);
2001b9520dbfSniallo 	if (error != 0) {
2002b9520dbfSniallo 		printf("%s: could not allocate Tx list\n",
20034ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
2004b9520dbfSniallo 		goto fail;
2005b9520dbfSniallo 	}
2006b9520dbfSniallo 	error = rum_alloc_rx_list(sc);
2007b9520dbfSniallo 	if (error != 0) {
2008b9520dbfSniallo 		printf("%s: could not allocate Rx list\n",
20094ab2b9feSmbalmer 		    sc->sc_dev.dv_xname);
2010b9520dbfSniallo 		goto fail;
2011b9520dbfSniallo 	}
2012b9520dbfSniallo 
2013b9520dbfSniallo 	/*
2014b9520dbfSniallo 	 * Start up the receive pipe.
2015b9520dbfSniallo 	 */
2016bc303e9bSdamien 	for (i = 0; i < RUM_RX_LIST_COUNT; i++) {
2017bc303e9bSdamien 		struct rum_rx_data *data = &sc->rx_data[i];
2018b9520dbfSniallo 
2019b9520dbfSniallo 		usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2020b9520dbfSniallo 		    MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, rum_rxeof);
2021bc303e9bSdamien 		error = usbd_transfer(data->xfer);
2022bc303e9bSdamien 		if (error != 0 && error != USBD_IN_PROGRESS) {
2023bc303e9bSdamien 			printf("%s: could not queue Rx transfer\n",
20244ab2b9feSmbalmer 			    sc->sc_dev.dv_xname);
2025bc303e9bSdamien 			goto fail;
2026bc303e9bSdamien 		}
2027b9520dbfSniallo 	}
2028b9520dbfSniallo 
202914761d2dSdamien 	/* update Rx filter */
203014761d2dSdamien 	tmp = rum_read(sc, RT2573_TXRX_CSR0) & 0xffff;
203114761d2dSdamien 
203214761d2dSdamien 	tmp |= RT2573_DROP_PHY_ERROR | RT2573_DROP_CRC_ERROR;
2033b9520dbfSniallo 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
203414761d2dSdamien 		tmp |= RT2573_DROP_CTL | RT2573_DROP_VER_ERROR |
203514761d2dSdamien 		       RT2573_DROP_ACKCTS;
2036171ac09aSdamien #ifndef IEEE80211_STA_ONLY
2037b9520dbfSniallo 		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2038171ac09aSdamien #endif
2039b9520dbfSniallo 			tmp |= RT2573_DROP_TODS;
2040b9520dbfSniallo 		if (!(ifp->if_flags & IFF_PROMISC))
2041b9520dbfSniallo 			tmp |= RT2573_DROP_NOT_TO_ME;
2042b9520dbfSniallo 	}
204314761d2dSdamien 	rum_write(sc, RT2573_TXRX_CSR0, tmp);
2044b9520dbfSniallo 
2045de6cd8fbSdlg 	ifq_clr_oactive(&ifp->if_snd);
2046b9520dbfSniallo 	ifp->if_flags |= IFF_RUNNING;
2047b9520dbfSniallo 
2048b9520dbfSniallo 	if (ic->ic_opmode == IEEE80211_M_MONITOR)
2049b9520dbfSniallo 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2050b9520dbfSniallo 	else
2051b9520dbfSniallo 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2052b9520dbfSniallo 
2053b9520dbfSniallo 	return 0;
2054b9520dbfSniallo 
2055b9520dbfSniallo fail:	rum_stop(ifp, 1);
2056b9520dbfSniallo 	return error;
2057b9520dbfSniallo }
2058b9520dbfSniallo 
205978315254Smbalmer void
rum_stop(struct ifnet * ifp,int disable)2060b9520dbfSniallo rum_stop(struct ifnet *ifp, int disable)
2061b9520dbfSniallo {
2062b9520dbfSniallo 	struct rum_softc *sc = ifp->if_softc;
2063b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
206414761d2dSdamien 	uint32_t tmp;
2065b9520dbfSniallo 
2066b9520dbfSniallo 	sc->sc_tx_timer = 0;
2067b9520dbfSniallo 	ifp->if_timer = 0;
2068de6cd8fbSdlg 	ifp->if_flags &= ~IFF_RUNNING;
2069de6cd8fbSdlg 	ifq_clr_oactive(&ifp->if_snd);
2070b9520dbfSniallo 
2071b9520dbfSniallo 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);	/* free all nodes */
2072b9520dbfSniallo 
2073b9520dbfSniallo 	/* disable Rx */
207414761d2dSdamien 	tmp = rum_read(sc, RT2573_TXRX_CSR0);
207514761d2dSdamien 	rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
207614761d2dSdamien 
207774a1cafeSdamien 	/* reset ASIC */
207874a1cafeSdamien 	rum_write(sc, RT2573_MAC_CSR1, 3);
2079b9520dbfSniallo 	rum_write(sc, RT2573_MAC_CSR1, 0);
208074a1cafeSdamien 
208171e644e0Sdamien 	if (sc->amrr_xfer != NULL) {
208271e644e0Sdamien 		usbd_free_xfer(sc->amrr_xfer);
208371e644e0Sdamien 		sc->amrr_xfer = NULL;
208471e644e0Sdamien 	}
2085b9520dbfSniallo 	if (sc->sc_rx_pipeh != NULL) {
2086b9520dbfSniallo 		usbd_close_pipe(sc->sc_rx_pipeh);
2087b9520dbfSniallo 		sc->sc_rx_pipeh = NULL;
2088b9520dbfSniallo 	}
2089b9520dbfSniallo 	if (sc->sc_tx_pipeh != NULL) {
2090b9520dbfSniallo 		usbd_close_pipe(sc->sc_tx_pipeh);
2091b9520dbfSniallo 		sc->sc_tx_pipeh = NULL;
2092b9520dbfSniallo 	}
2093b9520dbfSniallo 
2094b9520dbfSniallo 	rum_free_rx_list(sc);
2095b9520dbfSniallo 	rum_free_tx_list(sc);
2096b9520dbfSniallo }
2097b9520dbfSniallo 
209878315254Smbalmer int
rum_load_microcode(struct rum_softc * sc,const u_char * ucode,size_t size)2099e3d550ecSdamien rum_load_microcode(struct rum_softc *sc, const u_char *ucode, size_t size)
2100b9520dbfSniallo {
2101b9520dbfSniallo 	usb_device_request_t req;
2102e3d550ecSdamien 	uint16_t reg = RT2573_MCU_CODE_BASE;
210314761d2dSdamien 	usbd_status error;
2104e3d550ecSdamien 
210514761d2dSdamien 	/* copy firmware image into NIC */
2106e3d550ecSdamien 	for (; size >= 4; reg += 4, ucode += 4, size -= 4)
2107e3d550ecSdamien 		rum_write(sc, reg, UGETDW(ucode));
2108b9520dbfSniallo 
2109b9520dbfSniallo 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2110e3d550ecSdamien 	req.bRequest = RT2573_MCU_CNTL;
2111e3d550ecSdamien 	USETW(req.wValue, RT2573_MCU_RUN);
2112b9520dbfSniallo 	USETW(req.wIndex, 0);
2113b9520dbfSniallo 	USETW(req.wLength, 0);
2114b9520dbfSniallo 
2115b9520dbfSniallo 	error = usbd_do_request(sc->sc_udev, &req, NULL);
2116b9520dbfSniallo 	if (error != 0) {
2117b9520dbfSniallo 		printf("%s: could not run firmware: %s\n",
21184ab2b9feSmbalmer 		    sc->sc_dev.dv_xname, usbd_errstr(error));
2119b9520dbfSniallo 	}
2120e3d550ecSdamien 	return error;
2121b9520dbfSniallo }
2122b9520dbfSniallo 
2123171ac09aSdamien #ifndef IEEE80211_STA_ONLY
212478315254Smbalmer int
rum_prepare_beacon(struct rum_softc * sc)2125b9520dbfSniallo rum_prepare_beacon(struct rum_softc *sc)
2126b9520dbfSniallo {
2127b9520dbfSniallo 	struct ieee80211com *ic = &sc->sc_ic;
2128b9520dbfSniallo 	struct rum_tx_desc desc;
2129b9520dbfSniallo 	struct mbuf *m0;
2130b9520dbfSniallo 	int rate;
2131b9520dbfSniallo 
2132b9520dbfSniallo 	m0 = ieee80211_beacon_alloc(ic, ic->ic_bss);
2133b9520dbfSniallo 	if (m0 == NULL) {
2134b9520dbfSniallo 		printf("%s: could not allocate beacon frame\n",
2135b9520dbfSniallo 		    sc->sc_dev.dv_xname);
2136b9520dbfSniallo 		return ENOBUFS;
2137b9520dbfSniallo 	}
2138b9520dbfSniallo 
2139b9520dbfSniallo 	/* send beacons at the lowest available rate */
2140b9520dbfSniallo 	rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan) ? 12 : 2;
2141b9520dbfSniallo 
214214761d2dSdamien 	rum_setup_tx_desc(sc, &desc, RT2573_TX_TIMESTAMP, RT2573_TX_HWSEQ,
2143b9520dbfSniallo 	    m0->m_pkthdr.len, rate);
2144b9520dbfSniallo 
2145b9520dbfSniallo 	/* copy the first 24 bytes of Tx descriptor into NIC memory */
2146b9520dbfSniallo 	rum_write_multi(sc, RT2573_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2147b9520dbfSniallo 
2148b9520dbfSniallo 	/* copy beacon header and payload into NIC memory */
2149fc0d81f2Sdamien 	rum_write_multi(sc, RT2573_HW_BEACON_BASE0 + 24, mtod(m0, uint8_t *),
2150fc0d81f2Sdamien 	    m0->m_pkthdr.len);
2151b9520dbfSniallo 
2152b9520dbfSniallo 	m_freem(m0);
215388fa525eSdamien 
2154b9520dbfSniallo 	return 0;
2155b9520dbfSniallo }
2156171ac09aSdamien #endif
2157b9520dbfSniallo 
215878315254Smbalmer void
rum_newassoc(struct ieee80211com * ic,struct ieee80211_node * ni,int isnew)21590db83ec9Sdamien rum_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
21600db83ec9Sdamien {
21610db83ec9Sdamien 	/* start with lowest Tx rate */
21620db83ec9Sdamien 	ni->ni_txrate = 0;
21630db83ec9Sdamien }
21640db83ec9Sdamien 
216578315254Smbalmer void
rum_amrr_start(struct rum_softc * sc,struct ieee80211_node * ni)216614761d2dSdamien rum_amrr_start(struct rum_softc *sc, struct ieee80211_node *ni)
2167b9520dbfSniallo {
216814761d2dSdamien 	int i;
2169b9520dbfSniallo 
217014761d2dSdamien 	/* clear statistic registers (STA_CSR0 to STA_CSR5) */
217114761d2dSdamien 	rum_read_multi(sc, RT2573_STA_CSR0, sc->sta, sizeof sc->sta);
2172b9520dbfSniallo 
217314761d2dSdamien 	ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2174b9520dbfSniallo 
217514761d2dSdamien 	/* set rate to some reasonable initial value */
217614761d2dSdamien 	for (i = ni->ni_rates.rs_nrates - 1;
217714761d2dSdamien 	     i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
217814761d2dSdamien 	     i--);
217914761d2dSdamien 	ni->ni_txrate = i;
2180b9520dbfSniallo 
218112136ef5Sjakemsr 	if (!usbd_is_dying(sc->sc_udev))
218229e86e5eSblambert 		timeout_add_sec(&sc->amrr_to, 1);
218314761d2dSdamien }
218414761d2dSdamien 
218578315254Smbalmer void
rum_amrr_timeout(void * arg)218614761d2dSdamien rum_amrr_timeout(void *arg)
218714761d2dSdamien {
218895547211Sdamien 	struct rum_softc *sc = arg;
218914761d2dSdamien 	usb_device_request_t req;
219014761d2dSdamien 
21917b043b62Sjakemsr 	if (usbd_is_dying(sc->sc_udev))
21927b043b62Sjakemsr 		return;
21937b043b62Sjakemsr 
219414761d2dSdamien 	/*
219514761d2dSdamien 	 * Asynchronously read statistic registers (cleared by read).
219614761d2dSdamien 	 */
219714761d2dSdamien 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
219814761d2dSdamien 	req.bRequest = RT2573_READ_MULTI_MAC;
219914761d2dSdamien 	USETW(req.wValue, 0);
220014761d2dSdamien 	USETW(req.wIndex, RT2573_STA_CSR0);
220114761d2dSdamien 	USETW(req.wLength, sizeof sc->sta);
220214761d2dSdamien 
220314761d2dSdamien 	usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
220414761d2dSdamien 	    USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
220514761d2dSdamien 	    rum_amrr_update);
220614761d2dSdamien 	(void)usbd_transfer(sc->amrr_xfer);
220714761d2dSdamien }
220814761d2dSdamien 
220978315254Smbalmer void
rum_amrr_update(struct usbd_xfer * xfer,void * priv,usbd_status status)2210ab0b1be7Smglocker rum_amrr_update(struct usbd_xfer *xfer, void *priv,
221114761d2dSdamien     usbd_status status)
221214761d2dSdamien {
221314761d2dSdamien 	struct rum_softc *sc = (struct rum_softc *)priv;
221414761d2dSdamien 	struct ifnet *ifp = &sc->sc_ic.ic_if;
221514761d2dSdamien 
221614761d2dSdamien 	if (status != USBD_NORMAL_COMPLETION) {
221714761d2dSdamien 		printf("%s: could not retrieve Tx statistics - cancelling "
22184ab2b9feSmbalmer 		    "automatic rate control\n", sc->sc_dev.dv_xname);
221914761d2dSdamien 		return;
222014761d2dSdamien 	}
222114761d2dSdamien 
222214761d2dSdamien 	/* count TX retry-fail as Tx errors */
222314761d2dSdamien 	ifp->if_oerrors += letoh32(sc->sta[5]) >> 16;
222414761d2dSdamien 
222514761d2dSdamien 	sc->amn.amn_retrycnt =
222614761d2dSdamien 	    (letoh32(sc->sta[4]) >> 16) +	/* TX one-retry ok count */
222714761d2dSdamien 	    (letoh32(sc->sta[5]) & 0xffff) +	/* TX more-retry ok count */
222814761d2dSdamien 	    (letoh32(sc->sta[5]) >> 16);	/* TX retry-fail count */
222914761d2dSdamien 
223014761d2dSdamien 	sc->amn.amn_txcnt =
223114761d2dSdamien 	    sc->amn.amn_retrycnt +
223214761d2dSdamien 	    (letoh32(sc->sta[4]) & 0xffff);	/* TX no-retry ok count */
223314761d2dSdamien 
223414761d2dSdamien 	ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
223514761d2dSdamien 
223612136ef5Sjakemsr 	if (!usbd_is_dying(sc->sc_udev))
223729e86e5eSblambert 		timeout_add_sec(&sc->amrr_to, 1);
223814761d2dSdamien }
2239