1 /* $OpenBSD: if_axe.c,v 1.131 2015/06/12 15:47:31 mpi Exp $ */ 2 3 /* 4 * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * Copyright (c) 1997, 1998, 1999, 2000-2003 21 * Bill Paul <wpaul@windriver.com>. All rights reserved. 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 1. Redistributions of source code must retain the above copyright 27 * notice, this list of conditions and the following disclaimer. 28 * 2. Redistributions in binary form must reproduce the above copyright 29 * notice, this list of conditions and the following disclaimer in the 30 * documentation and/or other materials provided with the distribution. 31 * 3. All advertising materials mentioning features or use of this software 32 * must display the following acknowledgement: 33 * This product includes software developed by Bill Paul. 34 * 4. Neither the name of the author nor the names of any co-contributors 35 * may be used to endorse or promote products derived from this software 36 * without specific prior written permission. 37 * 38 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 39 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 41 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 42 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 43 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 44 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 45 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 46 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 47 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 48 * THE POSSIBILITY OF SUCH DAMAGE. 49 */ 50 51 /* 52 * ASIX Electronics AX88172 USB 2.0 ethernet driver. Used in the 53 * LinkSys USB200M and various other adapters. 54 * 55 * Manuals available from: 56 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 57 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 58 * controller) to find the definitions for the RX control register. 59 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 60 * 61 * Written by Bill Paul <wpaul@windriver.com> 62 * Senior Engineer 63 * Wind River Systems 64 */ 65 66 /* 67 * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 68 * It uses an external PHY (reference designs use a Realtek chip), 69 * and has a 64-bit multicast hash filter. There is some information 70 * missing from the manual which one needs to know in order to make 71 * the chip function: 72 * 73 * - You must set bit 7 in the RX control register, otherwise the 74 * chip won't receive any packets. 75 * - You must initialize all 3 IPG registers, or you won't be able 76 * to send any packets. 77 * 78 * Note that this device appears to only support loading the station 79 * address via autoload from the EEPROM (i.e. there's no way to manually 80 * set it). 81 * 82 * (Adam Weinberger wanted me to name this driver if_gir.c.) 83 */ 84 85 /* 86 * Ported to OpenBSD 3/28/2004 by Greg Taleck <taleck@oz.net> 87 * with bits and pieces from the aue and url drivers. 88 */ 89 90 #include "bpfilter.h" 91 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/sockio.h> 95 #include <sys/rwlock.h> 96 #include <sys/mbuf.h> 97 #include <sys/kernel.h> 98 #include <sys/socket.h> 99 100 #include <sys/device.h> 101 102 #include <machine/bus.h> 103 104 #include <net/if.h> 105 #include <net/if_dl.h> 106 #include <net/if_media.h> 107 108 #if NBPFILTER > 0 109 #include <net/bpf.h> 110 #endif 111 112 #include <netinet/in.h> 113 #include <netinet/if_ether.h> 114 115 #include <dev/mii/mii.h> 116 #include <dev/mii/miivar.h> 117 118 #include <dev/usb/usb.h> 119 #include <dev/usb/usbdi.h> 120 #include <dev/usb/usbdi_util.h> 121 #include <dev/usb/usbdivar.h> 122 #include <dev/usb/usbdevs.h> 123 124 #include <dev/usb/if_axereg.h> 125 126 #ifdef AXE_DEBUG 127 #define DPRINTF(x) do { if (axedebug) printf x; } while (0) 128 #define DPRINTFN(n,x) do { if (axedebug >= (n)) printf x; } while (0) 129 int axedebug = 0; 130 #else 131 #define DPRINTF(x) 132 #define DPRINTFN(n,x) 133 #endif 134 135 /* 136 * Various supported device vendors/products. 137 */ 138 const struct axe_type axe_devs[] = { 139 { { USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UF200}, 0 }, 140 { { USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2}, 0 }, 141 { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET }, AX772 }, 142 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172}, 0 }, 143 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772}, AX772 }, 144 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772A}, AX772 }, 145 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B}, AX772 | AX772B }, 146 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B_1}, AX772 | AX772B }, 147 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178}, AX178 }, 148 { { USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T}, 0 }, 149 { { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055 }, AX178 }, 150 { { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR}, 0}, 151 { { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2}, AX772 }, 152 { { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX }, 0}, 153 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100}, 0 }, 154 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1 }, AX772 }, 155 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100C1 }, AX772 | AX772B }, 156 { { USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E}, 0 }, 157 { { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2 }, AX178 }, 158 { { USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1}, 0 }, 159 { { USB_VENDOR_LENOVO, USB_PRODUCT_LENOVO_ETHERNET }, AX772 | AX772B }, 160 { { USB_VENDOR_LINKSYS, USB_PRODUCT_LINKSYS_HG20F9}, AX772 | AX772B }, 161 { { USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M}, 0 }, 162 { { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000 }, AX178 }, 163 { { USB_VENDOR_LOGITEC, USB_PRODUCT_LOGITEC_LAN_GTJU2}, AX178 }, 164 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2GT}, AX178 }, 165 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX}, 0 }, 166 { { USB_VENDOR_MSI, USB_PRODUCT_MSI_AX88772A}, AX772 }, 167 { { USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120}, 0 }, 168 { { USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS }, AX772 }, 169 { { USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T }, AX178 }, 170 { { USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL}, 0 }, 171 { { USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029}, 0 }, 172 { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028 }, AX178 } 173 }; 174 175 #define axe_lookup(v, p) ((struct axe_type *)usb_lookup(axe_devs, v, p)) 176 177 int axe_match(struct device *, void *, void *); 178 void axe_attach(struct device *, struct device *, void *); 179 int axe_detach(struct device *, int); 180 181 struct cfdriver axe_cd = { 182 NULL, "axe", DV_IFNET 183 }; 184 185 const struct cfattach axe_ca = { 186 sizeof(struct axe_softc), axe_match, axe_attach, axe_detach 187 }; 188 189 int axe_tx_list_init(struct axe_softc *); 190 int axe_rx_list_init(struct axe_softc *); 191 struct mbuf *axe_newbuf(void); 192 int axe_encap(struct axe_softc *, struct mbuf *, int); 193 void axe_rxeof(struct usbd_xfer *, void *, usbd_status); 194 void axe_txeof(struct usbd_xfer *, void *, usbd_status); 195 void axe_tick(void *); 196 void axe_tick_task(void *); 197 void axe_start(struct ifnet *); 198 int axe_ioctl(struct ifnet *, u_long, caddr_t); 199 void axe_init(void *); 200 void axe_stop(struct axe_softc *); 201 void axe_watchdog(struct ifnet *); 202 int axe_miibus_readreg(struct device *, int, int); 203 void axe_miibus_writereg(struct device *, int, int, int); 204 void axe_miibus_statchg(struct device *); 205 int axe_cmd(struct axe_softc *, int, int, int, void *); 206 int axe_ifmedia_upd(struct ifnet *); 207 void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 208 void axe_reset(struct axe_softc *sc); 209 210 void axe_iff(struct axe_softc *); 211 void axe_lock_mii(struct axe_softc *sc); 212 void axe_unlock_mii(struct axe_softc *sc); 213 214 void axe_ax88178_init(struct axe_softc *); 215 void axe_ax88772_init(struct axe_softc *); 216 217 /* Get exclusive access to the MII registers */ 218 void 219 axe_lock_mii(struct axe_softc *sc) 220 { 221 sc->axe_refcnt++; 222 rw_enter_write(&sc->axe_mii_lock); 223 } 224 225 void 226 axe_unlock_mii(struct axe_softc *sc) 227 { 228 rw_exit_write(&sc->axe_mii_lock); 229 if (--sc->axe_refcnt < 0) 230 usb_detach_wakeup(&sc->axe_dev); 231 } 232 233 int 234 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 235 { 236 usb_device_request_t req; 237 usbd_status err; 238 239 if (usbd_is_dying(sc->axe_udev)) 240 return(0); 241 242 if (AXE_CMD_DIR(cmd)) 243 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 244 else 245 req.bmRequestType = UT_READ_VENDOR_DEVICE; 246 req.bRequest = AXE_CMD_CMD(cmd); 247 USETW(req.wValue, val); 248 USETW(req.wIndex, index); 249 USETW(req.wLength, AXE_CMD_LEN(cmd)); 250 251 err = usbd_do_request(sc->axe_udev, &req, buf); 252 253 if (err) { 254 DPRINTF(("axe_cmd err: cmd: %d\n", cmd)); 255 return(-1); 256 } 257 258 return(0); 259 } 260 261 int 262 axe_miibus_readreg(struct device *dev, int phy, int reg) 263 { 264 struct axe_softc *sc = (void *)dev; 265 usbd_status err; 266 uWord val; 267 int ival; 268 269 if (usbd_is_dying(sc->axe_udev)) { 270 DPRINTF(("axe: dying\n")); 271 return(0); 272 } 273 274 #ifdef notdef 275 /* 276 * The chip tells us the MII address of any supported 277 * PHYs attached to the chip, so only read from those. 278 */ 279 280 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x\n", phy, reg)); 281 282 if (sc->axe_phyaddrs[0] != AXE_NOPHY && phy != sc->axe_phyaddrs[0]) 283 return (0); 284 285 if (sc->axe_phyaddrs[1] != AXE_NOPHY && phy != sc->axe_phyaddrs[1]) 286 return (0); 287 #endif 288 if (sc->axe_phyno != phy) 289 return (0); 290 291 USETW(val, 0); 292 293 axe_lock_mii(sc); 294 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 295 err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, val); 296 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 297 axe_unlock_mii(sc); 298 299 if (err) { 300 printf("axe%d: read PHY failed\n", sc->axe_unit); 301 return(-1); 302 } 303 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n", 304 phy, reg, UGETW(val))); 305 306 ival = UGETW(val); 307 if ((sc->axe_flags & AX772) != 0 && reg == MII_BMSR) { 308 /* 309 * BMSR of AX88772 indicates that it supports extended 310 * capability but the extended status register is 311 * revered for embedded ethernet PHY. So clear the 312 * extended capability bit of BMSR. 313 */ 314 ival &= ~BMSR_EXTCAP; 315 } 316 317 return (ival); 318 } 319 320 void 321 axe_miibus_writereg(struct device *dev, int phy, int reg, int val) 322 { 323 struct axe_softc *sc = (void *)dev; 324 usbd_status err; 325 uWord uval; 326 327 if (usbd_is_dying(sc->axe_udev)) 328 return; 329 if (sc->axe_phyno != phy) 330 return; 331 332 USETW(uval, val); 333 334 axe_lock_mii(sc); 335 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 336 err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, uval); 337 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 338 axe_unlock_mii(sc); 339 340 if (err) { 341 printf("axe%d: write PHY failed\n", sc->axe_unit); 342 return; 343 } 344 } 345 346 void 347 axe_miibus_statchg(struct device *dev) 348 { 349 struct axe_softc *sc = (void *)dev; 350 struct mii_data *mii = GET_MII(sc); 351 struct ifnet *ifp; 352 int val, err; 353 354 ifp = GET_IFP(sc); 355 if (mii == NULL || ifp == NULL || 356 (ifp->if_flags & IFF_RUNNING) == 0) 357 return; 358 359 sc->axe_link = 0; 360 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 361 (IFM_ACTIVE | IFM_AVALID)) { 362 switch (IFM_SUBTYPE(mii->mii_media_active)) { 363 case IFM_10_T: 364 case IFM_100_TX: 365 sc->axe_link++; 366 break; 367 case IFM_1000_T: 368 if ((sc->axe_flags & AX178) == 0) 369 break; 370 sc->axe_link++; 371 break; 372 default: 373 break; 374 } 375 } 376 377 /* Lost link, do nothing. */ 378 if (sc->axe_link == 0) 379 return; 380 381 val = 0; 382 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 383 val |= AXE_MEDIA_FULL_DUPLEX; 384 385 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 386 val |= (AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC); 387 if (sc->axe_flags & AX178) 388 val |= AXE_178_MEDIA_ENCK; 389 390 switch (IFM_SUBTYPE(mii->mii_media_active)) { 391 case IFM_1000_T: 392 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 393 break; 394 case IFM_100_TX: 395 val |= AXE_178_MEDIA_100TX; 396 break; 397 case IFM_10_T: 398 /* doesn't need to be handled */ 399 break; 400 } 401 } 402 403 DPRINTF(("axe_miibus_statchg: val=0x%x\n", val)); 404 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 405 if (err) { 406 printf("%s: media change failed\n", sc->axe_dev.dv_xname); 407 return; 408 } 409 } 410 411 /* 412 * Set media options. 413 */ 414 int 415 axe_ifmedia_upd(struct ifnet *ifp) 416 { 417 struct axe_softc *sc = ifp->if_softc; 418 struct mii_data *mii = GET_MII(sc); 419 420 if (mii->mii_instance) { 421 struct mii_softc *miisc; 422 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 423 mii_phy_reset(miisc); 424 } 425 mii_mediachg(mii); 426 427 return (0); 428 } 429 430 /* 431 * Report current media status. 432 */ 433 void 434 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 435 { 436 struct axe_softc *sc = ifp->if_softc; 437 struct mii_data *mii = GET_MII(sc); 438 439 mii_pollstat(mii); 440 ifmr->ifm_active = mii->mii_media_active; 441 ifmr->ifm_status = mii->mii_media_status; 442 } 443 444 void 445 axe_iff(struct axe_softc *sc) 446 { 447 struct ifnet *ifp = GET_IFP(sc); 448 struct arpcom *ac = &sc->arpcom; 449 struct ether_multi *enm; 450 struct ether_multistep step; 451 u_int32_t h = 0; 452 uWord urxmode; 453 u_int16_t rxmode; 454 u_int8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 455 456 if (usbd_is_dying(sc->axe_udev)) 457 return; 458 459 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, urxmode); 460 rxmode = UGETW(urxmode); 461 rxmode &= ~(AXE_RXCMD_ALLMULTI | AXE_RXCMD_MULTICAST | 462 AXE_RXCMD_PROMISC); 463 ifp->if_flags &= ~IFF_ALLMULTI; 464 465 /* 466 * Always accept broadcast frames. 467 * Always accept frames destined to our station address. 468 */ 469 rxmode |= AXE_RXCMD_BROADCAST; 470 if ((sc->axe_flags & (AX178 | AX772)) == 0) 471 rxmode |= AXE_172_RXCMD_UNICAST; 472 473 if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) { 474 ifp->if_flags |= IFF_ALLMULTI; 475 rxmode |= AXE_RXCMD_ALLMULTI; 476 if (ifp->if_flags & IFF_PROMISC) 477 rxmode |= AXE_RXCMD_PROMISC; 478 } else { 479 rxmode |= AXE_RXCMD_MULTICAST; 480 481 /* now program new ones */ 482 ETHER_FIRST_MULTI(step, ac, enm); 483 while (enm != NULL) { 484 h = ether_crc32_be(enm->enm_addrlo, 485 ETHER_ADDR_LEN) >> 26; 486 487 hashtbl[h / 8] |= 1 << (h % 8); 488 489 ETHER_NEXT_MULTI(step, enm); 490 } 491 } 492 493 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 494 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 495 } 496 497 void 498 axe_reset(struct axe_softc *sc) 499 { 500 if (usbd_is_dying(sc->axe_udev)) 501 return; 502 /* XXX What to reset? */ 503 504 /* Wait a little while for the chip to get its brains in order. */ 505 DELAY(1000); 506 return; 507 } 508 509 #define AXE_GPIO_WRITE(x,y) do { \ 510 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \ 511 usbd_delay_ms(sc->axe_udev, (y)); \ 512 } while (0) 513 514 void 515 axe_ax88178_init(struct axe_softc *sc) 516 { 517 int gpio0 = 0, phymode = 0, ledmode; 518 u_int16_t eeprom, val; 519 520 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 521 /* XXX magic */ 522 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 523 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 524 525 eeprom = letoh16(eeprom); 526 527 DPRINTF((" EEPROM is 0x%x\n", eeprom)); 528 529 /* if EEPROM is invalid we have to use to GPIO0 */ 530 if (eeprom == 0xffff) { 531 phymode = AXE_PHY_MODE_MARVELL; 532 gpio0 = 1; 533 ledmode = 0; 534 } else { 535 phymode = eeprom & 0x7f; 536 gpio0 = (eeprom & 0x80) ? 0 : 1; 537 ledmode = eeprom >> 8; 538 } 539 540 DPRINTF(("use gpio0: %d, phymode 0x%02x, eeprom 0x%04x\n", 541 gpio0, phymode, eeprom)); 542 543 /* power up external phy */ 544 AXE_GPIO_WRITE(AXE_GPIO1|AXE_GPIO1_EN | AXE_GPIO_RELOAD_EEPROM, 40); 545 if (ledmode == 1) { 546 AXE_GPIO_WRITE(AXE_GPIO1_EN, 30); 547 AXE_GPIO_WRITE(AXE_GPIO1_EN | AXE_GPIO1, 30); 548 } else { 549 val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN : 550 AXE_GPIO1 | AXE_GPIO1_EN; 551 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, 30); 552 AXE_GPIO_WRITE(val | AXE_GPIO2_EN, 300); 553 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, 30); 554 } 555 556 /* initialize phy */ 557 if (phymode == AXE_PHY_MODE_REALTEK_8211CL) { 558 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x1f, 0x0005); 559 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x0c, 0x0000); 560 val = axe_miibus_readreg(&sc->axe_dev, sc->axe_phyno, 0x0001); 561 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x01, 562 val | 0x0080); 563 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x1f, 0x0000); 564 } 565 566 /* soft reset */ 567 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 568 usbd_delay_ms(sc->axe_udev, 150); 569 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 570 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 571 usbd_delay_ms(sc->axe_udev, 150); 572 /* Enable MII/GMII/RGMII for external PHY */ 573 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 574 usbd_delay_ms(sc->axe_udev, 10); 575 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 576 } 577 578 /* Read Ethernet Address from EEPROM if it is zero */ 579 void 580 axe_ax88772b_nodeid(struct axe_softc *sc, u_char *eaddr) 581 { 582 int i; 583 uint16_t val; 584 585 for (i = 0; i < ETHER_ADDR_LEN; i++) { 586 if (eaddr[i] != 0) 587 break; 588 } 589 590 /* We already have an ethernet address */ 591 if (i != ETHER_ADDR_LEN) 592 return; 593 594 /* read from EEPROM */ 595 for (i = 0; i < ETHER_ADDR_LEN/2; i++) { 596 axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_NODEID + i, &val); 597 val = ntohs(val); 598 *eaddr++ = (u_char)((val >> 8) & 0xff); 599 *eaddr++ = (u_char)(val & 0xff); 600 } 601 } 602 603 void 604 axe_ax88772_init(struct axe_softc *sc) 605 { 606 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 607 usbd_delay_ms(sc->axe_udev, 40); 608 609 if (sc->axe_phyno == AXE_PHY_NO_AX772_EPHY) { 610 /* ask for the embedded PHY */ 611 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 612 usbd_delay_ms(sc->axe_udev, 10); 613 614 /* power down and reset state, pin reset state */ 615 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 616 usbd_delay_ms(sc->axe_udev, 60); 617 618 /* power down/reset state, pin operating state */ 619 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 620 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 621 usbd_delay_ms(sc->axe_udev, 150); 622 623 /* power up, reset */ 624 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 625 626 /* power up, operating */ 627 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 628 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 629 } else { 630 /* ask for external PHY */ 631 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 632 usbd_delay_ms(sc->axe_udev, 10); 633 634 /* power down internal PHY */ 635 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 636 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 637 } 638 639 usbd_delay_ms(sc->axe_udev, 150); 640 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 641 } 642 643 static int 644 axe_get_phyno(struct axe_softc *sc, int sel) 645 { 646 int phyno = -1; 647 648 switch (AXE_PHY_TYPE(sc->axe_phyaddrs[sel])) { 649 case PHY_TYPE_100_HOME: 650 case PHY_TYPE_GIG: 651 phyno = AXE_PHY_NO(sc->axe_phyaddrs[sel]); 652 break; 653 case PHY_TYPE_SPECIAL: 654 /* FALLTHROUGH */ 655 case PHY_TYPE_RSVD: 656 /* FALLTHROUGH */ 657 case PHY_TYPE_NON_SUP: 658 /* FALLTHROUGH */ 659 default: 660 break; 661 } 662 663 return (phyno); 664 } 665 666 /* 667 * Probe for a AX88172 chip. 668 */ 669 int 670 axe_match(struct device *parent, void *match, void *aux) 671 { 672 struct usb_attach_arg *uaa = aux; 673 674 if (uaa->iface == NULL || uaa->configno != 1) 675 return (UMATCH_NONE); 676 677 return (axe_lookup(uaa->vendor, uaa->product) != NULL ? 678 UMATCH_VENDOR_PRODUCT_CONF_IFACE : UMATCH_NONE); 679 } 680 681 /* 682 * Attach the interface. Allocate softc structures, do ifmedia 683 * setup and ethernet/BPF attach. 684 */ 685 void 686 axe_attach(struct device *parent, struct device *self, void *aux) 687 { 688 struct axe_softc *sc = (struct axe_softc *)self; 689 struct usb_attach_arg *uaa = aux; 690 usb_interface_descriptor_t *id; 691 usb_endpoint_descriptor_t *ed; 692 struct mii_data *mii; 693 u_char eaddr[ETHER_ADDR_LEN]; 694 char *devname = sc->axe_dev.dv_xname; 695 struct ifnet *ifp; 696 int i, s; 697 698 sc->axe_unit = self->dv_unit; /*device_get_unit(self);*/ 699 sc->axe_udev = uaa->device; 700 sc->axe_iface = uaa->iface; 701 sc->axe_flags = axe_lookup(uaa->vendor, uaa->product)->axe_flags; 702 703 usb_init_task(&sc->axe_tick_task, axe_tick_task, sc, 704 USB_TASK_TYPE_GENERIC); 705 rw_init(&sc->axe_mii_lock, "axemii"); 706 usb_init_task(&sc->axe_stop_task, (void (*)(void *))axe_stop, sc, 707 USB_TASK_TYPE_GENERIC); 708 709 sc->axe_product = uaa->product; 710 sc->axe_vendor = uaa->vendor; 711 712 id = usbd_get_interface_descriptor(sc->axe_iface); 713 714 /* decide on what our bufsize will be */ 715 if (sc->axe_flags & (AX178 | AX772)) 716 sc->axe_bufsz = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 717 AXE_178_MAX_BUFSZ : AXE_178_MIN_BUFSZ; 718 else 719 sc->axe_bufsz = AXE_172_BUFSZ; 720 721 /* Find endpoints. */ 722 for (i = 0; i < id->bNumEndpoints; i++) { 723 ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i); 724 if (!ed) { 725 printf("%s: couldn't get ep %d\n", 726 sc->axe_dev.dv_xname, i); 727 return; 728 } 729 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 730 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 731 sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress; 732 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 733 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 734 sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress; 735 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 736 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) { 737 sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress; 738 } 739 } 740 741 s = splnet(); 742 743 /* We need the PHYID for init dance in some cases */ 744 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs); 745 746 DPRINTF((" phyaddrs[0]: %x phyaddrs[1]: %x\n", 747 sc->axe_phyaddrs[0], sc->axe_phyaddrs[1])); 748 749 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 750 if (sc->axe_phyno == -1) 751 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 752 if (sc->axe_phyno == -1) { 753 printf("%s:", sc->axe_dev.dv_xname); 754 printf(" no valid PHY address found, assuming PHY address 0\n"); 755 sc->axe_phyno = 0; 756 } 757 758 DPRINTF((" get_phyno %d\n", sc->axe_phyno)); 759 760 if (sc->axe_flags & AX178) 761 axe_ax88178_init(sc); 762 else if (sc->axe_flags & AX772) 763 axe_ax88772_init(sc); 764 765 /* 766 * Get station address. 767 */ 768 if (sc->axe_flags & (AX178 | AX772)) 769 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr); 770 else 771 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr); 772 773 if (sc->axe_flags & AX772B) 774 axe_ax88772b_nodeid(sc, eaddr); 775 776 /* 777 * Load IPG values 778 */ 779 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs); 780 781 /* 782 * An ASIX chip was detected. Inform the world. 783 */ 784 printf("%s:", sc->axe_dev.dv_xname); 785 if (sc->axe_flags & AX178) 786 printf(" AX88178"); 787 else if (sc->axe_flags & AX772B) 788 printf(" AX88772B"); 789 else if (sc->axe_flags & AX772) 790 printf(" AX88772"); 791 else 792 printf(" AX88172"); 793 printf(", address %s\n", ether_sprintf(eaddr)); 794 795 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 796 797 /* Initialize interface info.*/ 798 ifp = &sc->arpcom.ac_if; 799 ifp->if_softc = sc; 800 strlcpy(ifp->if_xname, devname, IFNAMSIZ); 801 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 802 ifp->if_ioctl = axe_ioctl; 803 ifp->if_start = axe_start; 804 ifp->if_watchdog = axe_watchdog; 805 IFQ_SET_READY(&ifp->if_snd); 806 807 ifp->if_capabilities = IFCAP_VLAN_MTU; 808 809 /* Initialize MII/media info. */ 810 mii = &sc->axe_mii; 811 mii->mii_ifp = ifp; 812 mii->mii_readreg = axe_miibus_readreg; 813 mii->mii_writereg = axe_miibus_writereg; 814 mii->mii_statchg = axe_miibus_statchg; 815 mii->mii_flags = MIIF_AUTOTSLEEP; 816 817 ifmedia_init(&mii->mii_media, 0, axe_ifmedia_upd, axe_ifmedia_sts); 818 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 819 820 if (LIST_FIRST(&mii->mii_phys) == NULL) { 821 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL); 822 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE); 823 } else 824 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO); 825 826 /* Attach the interface. */ 827 if_attach(ifp); 828 ether_ifattach(ifp); 829 830 timeout_set(&sc->axe_stat_ch, axe_tick, sc); 831 832 splx(s); 833 } 834 835 int 836 axe_detach(struct device *self, int flags) 837 { 838 struct axe_softc *sc = (struct axe_softc *)self; 839 int s; 840 struct ifnet *ifp = GET_IFP(sc); 841 842 DPRINTFN(2,("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 843 844 if (timeout_initialized(&sc->axe_stat_ch)) 845 timeout_del(&sc->axe_stat_ch); 846 847 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) 848 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]); 849 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) 850 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]); 851 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) 852 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 853 854 /* 855 * Remove any pending tasks. They cannot be executing because they run 856 * in the same thread as detach. 857 */ 858 usb_rem_task(sc->axe_udev, &sc->axe_tick_task); 859 usb_rem_task(sc->axe_udev, &sc->axe_stop_task); 860 861 s = splusb(); 862 863 if (--sc->axe_refcnt >= 0) { 864 /* Wait for processes to go away */ 865 usb_detach_wait(&sc->axe_dev); 866 } 867 868 if (ifp->if_flags & IFF_RUNNING) 869 axe_stop(sc); 870 871 mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY); 872 ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY); 873 if (ifp->if_softc != NULL) { 874 ether_ifdetach(ifp); 875 if_detach(ifp); 876 } 877 878 #ifdef DIAGNOSTIC 879 if (sc->axe_ep[AXE_ENDPT_TX] != NULL || 880 sc->axe_ep[AXE_ENDPT_RX] != NULL || 881 sc->axe_ep[AXE_ENDPT_INTR] != NULL) 882 printf("%s: detach has active endpoints\n", 883 sc->axe_dev.dv_xname); 884 #endif 885 886 if (--sc->axe_refcnt >= 0) { 887 /* Wait for processes to go away. */ 888 usb_detach_wait(&sc->axe_dev); 889 } 890 splx(s); 891 892 return (0); 893 } 894 895 struct mbuf * 896 axe_newbuf(void) 897 { 898 struct mbuf *m; 899 900 MGETHDR(m, M_DONTWAIT, MT_DATA); 901 if (m == NULL) 902 return (NULL); 903 904 MCLGET(m, M_DONTWAIT); 905 if (!(m->m_flags & M_EXT)) { 906 m_freem(m); 907 return (NULL); 908 } 909 910 m->m_len = m->m_pkthdr.len = MCLBYTES; 911 m_adj(m, ETHER_ALIGN); 912 913 return (m); 914 } 915 916 int 917 axe_rx_list_init(struct axe_softc *sc) 918 { 919 struct axe_cdata *cd; 920 struct axe_chain *c; 921 int i; 922 923 DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 924 925 cd = &sc->axe_cdata; 926 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 927 c = &cd->axe_rx_chain[i]; 928 c->axe_sc = sc; 929 c->axe_idx = i; 930 c->axe_mbuf = NULL; 931 if (c->axe_xfer == NULL) { 932 c->axe_xfer = usbd_alloc_xfer(sc->axe_udev); 933 if (c->axe_xfer == NULL) 934 return (ENOBUFS); 935 c->axe_buf = usbd_alloc_buffer(c->axe_xfer, 936 sc->axe_bufsz); 937 if (c->axe_buf == NULL) { 938 usbd_free_xfer(c->axe_xfer); 939 return (ENOBUFS); 940 } 941 } 942 } 943 944 return (0); 945 } 946 947 int 948 axe_tx_list_init(struct axe_softc *sc) 949 { 950 struct axe_cdata *cd; 951 struct axe_chain *c; 952 int i; 953 954 DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 955 956 cd = &sc->axe_cdata; 957 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 958 c = &cd->axe_tx_chain[i]; 959 c->axe_sc = sc; 960 c->axe_idx = i; 961 c->axe_mbuf = NULL; 962 if (c->axe_xfer == NULL) { 963 c->axe_xfer = usbd_alloc_xfer(sc->axe_udev); 964 if (c->axe_xfer == NULL) 965 return (ENOBUFS); 966 c->axe_buf = usbd_alloc_buffer(c->axe_xfer, 967 sc->axe_bufsz); 968 if (c->axe_buf == NULL) { 969 usbd_free_xfer(c->axe_xfer); 970 return (ENOBUFS); 971 } 972 } 973 } 974 975 return (0); 976 } 977 978 /* 979 * A frame has been uploaded: pass the resulting mbuf chain up to 980 * the higher level protocols. 981 */ 982 void 983 axe_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 984 { 985 struct axe_chain *c = (struct axe_chain *)priv; 986 struct axe_softc *sc = c->axe_sc; 987 struct ifnet *ifp = GET_IFP(sc); 988 struct mbuf_list ml = MBUF_LIST_INITIALIZER(); 989 u_char *buf = c->axe_buf; 990 u_int32_t total_len; 991 u_int16_t pktlen = 0; 992 struct mbuf *m; 993 struct axe_sframe_hdr hdr; 994 int s; 995 996 DPRINTFN(10,("%s: %s: enter\n", sc->axe_dev.dv_xname,__func__)); 997 998 if (usbd_is_dying(sc->axe_udev)) 999 return; 1000 1001 if (!(ifp->if_flags & IFF_RUNNING)) 1002 return; 1003 1004 if (status != USBD_NORMAL_COMPLETION) { 1005 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1006 return; 1007 if (usbd_ratecheck(&sc->axe_rx_notice)) { 1008 printf("%s: usb errors on rx: %s\n", 1009 sc->axe_dev.dv_xname, usbd_errstr(status)); 1010 } 1011 if (status == USBD_STALLED) 1012 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]); 1013 goto done; 1014 } 1015 1016 usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL); 1017 1018 do { 1019 if (sc->axe_flags & (AX178 | AX772)) { 1020 if (total_len < sizeof(hdr)) { 1021 ifp->if_ierrors++; 1022 goto done; 1023 } 1024 1025 buf += pktlen; 1026 1027 memcpy(&hdr, buf, sizeof(hdr)); 1028 total_len -= sizeof(hdr); 1029 1030 if (((letoh16(hdr.len) & AXE_RH1M_RXLEN_MASK) ^ 1031 (letoh16(hdr.ilen) & AXE_RH1M_RXLEN_MASK)) != 1032 AXE_RH1M_RXLEN_MASK) { 1033 ifp->if_ierrors++; 1034 goto done; 1035 } 1036 pktlen = letoh16(hdr.len) & AXE_RH1M_RXLEN_MASK; 1037 if (pktlen > total_len) { 1038 ifp->if_ierrors++; 1039 goto done; 1040 } 1041 1042 buf += sizeof(hdr); 1043 1044 if ((pktlen % 2) != 0) 1045 pktlen++; 1046 1047 if (total_len < pktlen) 1048 total_len = 0; 1049 else 1050 total_len -= pktlen; 1051 } else { 1052 pktlen = total_len; /* crc on the end? */ 1053 total_len = 0; 1054 } 1055 1056 m = axe_newbuf(); 1057 if (m == NULL) { 1058 ifp->if_ierrors++; 1059 goto done; 1060 } 1061 1062 ifp->if_ipackets++; 1063 m->m_pkthdr.len = m->m_len = pktlen; 1064 1065 memcpy(mtod(m, char *), buf, pktlen); 1066 1067 ml_enqueue(&ml, m); 1068 1069 } while (total_len > 0); 1070 1071 done: 1072 /* push the packet up */ 1073 s = splnet(); 1074 if_input(ifp, &ml); 1075 splx(s); 1076 1077 memset(c->axe_buf, 0, sc->axe_bufsz); 1078 1079 /* Setup new transfer. */ 1080 usbd_setup_xfer(xfer, sc->axe_ep[AXE_ENDPT_RX], 1081 c, c->axe_buf, sc->axe_bufsz, 1082 USBD_SHORT_XFER_OK | USBD_NO_COPY, 1083 USBD_NO_TIMEOUT, axe_rxeof); 1084 usbd_transfer(xfer); 1085 1086 DPRINTFN(10,("%s: %s: start rx\n", sc->axe_dev.dv_xname, __func__)); 1087 1088 return; 1089 } 1090 1091 /* 1092 * A frame was downloaded to the chip. It's safe for us to clean up 1093 * the list buffers. 1094 */ 1095 1096 void 1097 axe_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 1098 { 1099 struct axe_softc *sc; 1100 struct axe_chain *c; 1101 struct ifnet *ifp; 1102 int s; 1103 1104 c = priv; 1105 sc = c->axe_sc; 1106 ifp = &sc->arpcom.ac_if; 1107 1108 if (usbd_is_dying(sc->axe_udev)) 1109 return; 1110 1111 s = splnet(); 1112 1113 if (status != USBD_NORMAL_COMPLETION) { 1114 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) { 1115 splx(s); 1116 return; 1117 } 1118 ifp->if_oerrors++; 1119 printf("axe%d: usb error on tx: %s\n", sc->axe_unit, 1120 usbd_errstr(status)); 1121 if (status == USBD_STALLED) 1122 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]); 1123 splx(s); 1124 return; 1125 } 1126 1127 ifp->if_timer = 0; 1128 ifp->if_flags &= ~IFF_OACTIVE; 1129 1130 m_freem(c->axe_mbuf); 1131 c->axe_mbuf = NULL; 1132 1133 if (IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1134 axe_start(ifp); 1135 1136 ifp->if_opackets++; 1137 splx(s); 1138 return; 1139 } 1140 1141 void 1142 axe_tick(void *xsc) 1143 { 1144 struct axe_softc *sc = xsc; 1145 1146 if (sc == NULL) 1147 return; 1148 1149 DPRINTFN(0xff, ("%s: %s: enter\n", sc->axe_dev.dv_xname, 1150 __func__)); 1151 1152 if (usbd_is_dying(sc->axe_udev)) 1153 return; 1154 1155 /* Perform periodic stuff in process context */ 1156 usb_add_task(sc->axe_udev, &sc->axe_tick_task); 1157 1158 } 1159 1160 void 1161 axe_tick_task(void *xsc) 1162 { 1163 int s; 1164 struct axe_softc *sc; 1165 struct ifnet *ifp; 1166 struct mii_data *mii; 1167 1168 sc = xsc; 1169 1170 if (sc == NULL) 1171 return; 1172 1173 if (usbd_is_dying(sc->axe_udev)) 1174 return; 1175 1176 ifp = GET_IFP(sc); 1177 mii = GET_MII(sc); 1178 if (mii == NULL) 1179 return; 1180 1181 s = splnet(); 1182 1183 mii_tick(mii); 1184 if (sc->axe_link == 0) 1185 axe_miibus_statchg(&sc->axe_dev); 1186 timeout_add_sec(&sc->axe_stat_ch, 1); 1187 1188 splx(s); 1189 } 1190 1191 int 1192 axe_encap(struct axe_softc *sc, struct mbuf *m, int idx) 1193 { 1194 struct axe_chain *c; 1195 usbd_status err; 1196 struct axe_sframe_hdr hdr; 1197 int length, boundary; 1198 1199 c = &sc->axe_cdata.axe_tx_chain[idx]; 1200 1201 if (sc->axe_flags & (AX178 | AX772)) { 1202 boundary = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 512 : 64; 1203 1204 hdr.len = htole16(m->m_pkthdr.len); 1205 hdr.ilen = ~hdr.len; 1206 1207 memcpy(c->axe_buf, &hdr, sizeof(hdr)); 1208 length = sizeof(hdr); 1209 1210 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf + length); 1211 length += m->m_pkthdr.len; 1212 1213 if ((length % boundary) == 0) { 1214 hdr.len = 0x0000; 1215 hdr.ilen = 0xffff; 1216 memcpy(c->axe_buf + length, &hdr, sizeof(hdr)); 1217 length += sizeof(hdr); 1218 } 1219 1220 } else { 1221 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf); 1222 length = m->m_pkthdr.len; 1223 } 1224 1225 c->axe_mbuf = m; 1226 1227 usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_TX], 1228 c, c->axe_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, 1229 10000, axe_txeof); 1230 1231 /* Transmit */ 1232 err = usbd_transfer(c->axe_xfer); 1233 if (err != USBD_IN_PROGRESS) { 1234 axe_stop(sc); 1235 return(EIO); 1236 } 1237 1238 sc->axe_cdata.axe_tx_cnt++; 1239 1240 return(0); 1241 } 1242 1243 void 1244 axe_start(struct ifnet *ifp) 1245 { 1246 struct axe_softc *sc; 1247 struct mbuf *m_head = NULL; 1248 1249 sc = ifp->if_softc; 1250 1251 if (!sc->axe_link) 1252 return; 1253 1254 if (ifp->if_flags & IFF_OACTIVE) 1255 return; 1256 1257 IFQ_POLL(&ifp->if_snd, m_head); 1258 if (m_head == NULL) 1259 return; 1260 1261 if (axe_encap(sc, m_head, 0)) { 1262 ifp->if_flags |= IFF_OACTIVE; 1263 return; 1264 } 1265 IFQ_DEQUEUE(&ifp->if_snd, m_head); 1266 1267 /* 1268 * If there's a BPF listener, bounce a copy of this frame 1269 * to him. 1270 */ 1271 #if NBPFILTER > 0 1272 if (ifp->if_bpf) 1273 bpf_mtap(ifp->if_bpf, m_head, BPF_DIRECTION_OUT); 1274 #endif 1275 1276 ifp->if_flags |= IFF_OACTIVE; 1277 1278 /* 1279 * Set a timeout in case the chip goes out to lunch. 1280 */ 1281 ifp->if_timer = 5; 1282 1283 return; 1284 } 1285 1286 void 1287 axe_init(void *xsc) 1288 { 1289 struct axe_softc *sc = xsc; 1290 struct ifnet *ifp = &sc->arpcom.ac_if; 1291 struct axe_chain *c; 1292 usbd_status err; 1293 uWord urxmode; 1294 int rxmode; 1295 int i, s; 1296 1297 s = splnet(); 1298 1299 /* 1300 * Cancel pending I/O and free all RX/TX buffers. 1301 */ 1302 axe_reset(sc); 1303 1304 /* set MAC address */ 1305 if (sc->axe_flags & (AX178 | AX772)) 1306 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, 1307 &sc->arpcom.ac_enaddr); 1308 1309 /* Enable RX logic. */ 1310 1311 /* Init RX ring. */ 1312 if (axe_rx_list_init(sc) == ENOBUFS) { 1313 printf("axe%d: rx list init failed\n", sc->axe_unit); 1314 splx(s); 1315 return; 1316 } 1317 1318 /* Init TX ring. */ 1319 if (axe_tx_list_init(sc) == ENOBUFS) { 1320 printf("axe%d: tx list init failed\n", sc->axe_unit); 1321 splx(s); 1322 return; 1323 } 1324 1325 /* Set transmitter IPG values */ 1326 if (sc->axe_flags & (AX178 | AX772)) 1327 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2], 1328 (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL); 1329 else { 1330 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL); 1331 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL); 1332 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL); 1333 } 1334 1335 /* Program promiscuous mode and multicast filters. */ 1336 axe_iff(sc); 1337 1338 /* Enable receiver, set RX mode */ 1339 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, urxmode); 1340 rxmode = UGETW(urxmode); 1341 rxmode |= AXE_RXCMD_ENABLE; 1342 if (sc->axe_flags & AX772B) 1343 rxmode |= AXE_772B_RXCMD_RH1M; 1344 else if (sc->axe_flags & (AX178 | AX772)) { 1345 if (sc->axe_udev->speed == USB_SPEED_HIGH) { 1346 /* largest possible USB buffer size for AX88178 */ 1347 rxmode |= AXE_178_RXCMD_MFB; 1348 } 1349 } 1350 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1351 1352 /* Open RX and TX pipes. */ 1353 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX], 1354 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]); 1355 if (err) { 1356 printf("axe%d: open rx pipe failed: %s\n", 1357 sc->axe_unit, usbd_errstr(err)); 1358 splx(s); 1359 return; 1360 } 1361 1362 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX], 1363 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]); 1364 if (err) { 1365 printf("axe%d: open tx pipe failed: %s\n", 1366 sc->axe_unit, usbd_errstr(err)); 1367 splx(s); 1368 return; 1369 } 1370 1371 /* Start up the receive pipe. */ 1372 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1373 c = &sc->axe_cdata.axe_rx_chain[i]; 1374 usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_RX], 1375 c, c->axe_buf, sc->axe_bufsz, 1376 USBD_SHORT_XFER_OK | USBD_NO_COPY, 1377 USBD_NO_TIMEOUT, axe_rxeof); 1378 usbd_transfer(c->axe_xfer); 1379 } 1380 1381 sc->axe_link = 0; 1382 ifp->if_flags |= IFF_RUNNING; 1383 ifp->if_flags &= ~IFF_OACTIVE; 1384 1385 splx(s); 1386 1387 timeout_add_sec(&sc->axe_stat_ch, 1); 1388 return; 1389 } 1390 1391 int 1392 axe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1393 { 1394 struct axe_softc *sc = ifp->if_softc; 1395 struct ifreq *ifr = (struct ifreq *)data; 1396 struct ifaddr *ifa = (struct ifaddr *)data; 1397 int s, error = 0; 1398 1399 s = splnet(); 1400 1401 switch(cmd) { 1402 case SIOCSIFADDR: 1403 ifp->if_flags |= IFF_UP; 1404 if (!(ifp->if_flags & IFF_RUNNING)) 1405 axe_init(sc); 1406 if (ifa->ifa_addr->sa_family == AF_INET) 1407 arp_ifinit(&sc->arpcom, ifa); 1408 break; 1409 1410 case SIOCSIFFLAGS: 1411 if (ifp->if_flags & IFF_UP) { 1412 if (ifp->if_flags & IFF_RUNNING) 1413 error = ENETRESET; 1414 else 1415 axe_init(sc); 1416 } else { 1417 if (ifp->if_flags & IFF_RUNNING) 1418 axe_stop(sc); 1419 } 1420 break; 1421 1422 case SIOCGIFMEDIA: 1423 case SIOCSIFMEDIA: 1424 error = ifmedia_ioctl(ifp, ifr, &sc->axe_mii.mii_media, cmd); 1425 break; 1426 1427 default: 1428 error = ether_ioctl(ifp, &sc->arpcom, cmd, data); 1429 } 1430 1431 if (error == ENETRESET) { 1432 if (ifp->if_flags & IFF_RUNNING) 1433 axe_iff(sc); 1434 error = 0; 1435 } 1436 1437 splx(s); 1438 return(error); 1439 } 1440 1441 void 1442 axe_watchdog(struct ifnet *ifp) 1443 { 1444 struct axe_softc *sc; 1445 struct axe_chain *c; 1446 usbd_status stat; 1447 int s; 1448 1449 sc = ifp->if_softc; 1450 1451 ifp->if_oerrors++; 1452 printf("axe%d: watchdog timeout\n", sc->axe_unit); 1453 1454 s = splusb(); 1455 c = &sc->axe_cdata.axe_tx_chain[0]; 1456 usbd_get_xfer_status(c->axe_xfer, NULL, NULL, NULL, &stat); 1457 axe_txeof(c->axe_xfer, c, stat); 1458 1459 if (!IFQ_IS_EMPTY(&ifp->if_snd)) 1460 axe_start(ifp); 1461 splx(s); 1462 } 1463 1464 /* 1465 * Stop the adapter and free any mbufs allocated to the 1466 * RX and TX lists. 1467 */ 1468 void 1469 axe_stop(struct axe_softc *sc) 1470 { 1471 usbd_status err; 1472 struct ifnet *ifp; 1473 int i; 1474 1475 axe_reset(sc); 1476 1477 ifp = &sc->arpcom.ac_if; 1478 ifp->if_timer = 0; 1479 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1480 1481 timeout_del(&sc->axe_stat_ch); 1482 1483 /* Stop transfers. */ 1484 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) { 1485 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]); 1486 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]); 1487 if (err) { 1488 printf("axe%d: close rx pipe failed: %s\n", 1489 sc->axe_unit, usbd_errstr(err)); 1490 } 1491 sc->axe_ep[AXE_ENDPT_RX] = NULL; 1492 } 1493 1494 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) { 1495 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]); 1496 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]); 1497 if (err) { 1498 printf("axe%d: close tx pipe failed: %s\n", 1499 sc->axe_unit, usbd_errstr(err)); 1500 } 1501 sc->axe_ep[AXE_ENDPT_TX] = NULL; 1502 } 1503 1504 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) { 1505 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 1506 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 1507 if (err) { 1508 printf("axe%d: close intr pipe failed: %s\n", 1509 sc->axe_unit, usbd_errstr(err)); 1510 } 1511 sc->axe_ep[AXE_ENDPT_INTR] = NULL; 1512 } 1513 1514 /* Free RX resources. */ 1515 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1516 if (sc->axe_cdata.axe_rx_chain[i].axe_mbuf != NULL) { 1517 m_freem(sc->axe_cdata.axe_rx_chain[i].axe_mbuf); 1518 sc->axe_cdata.axe_rx_chain[i].axe_mbuf = NULL; 1519 } 1520 if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) { 1521 usbd_free_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer); 1522 sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL; 1523 } 1524 } 1525 1526 /* Free TX resources. */ 1527 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 1528 if (sc->axe_cdata.axe_tx_chain[i].axe_mbuf != NULL) { 1529 m_freem(sc->axe_cdata.axe_tx_chain[i].axe_mbuf); 1530 sc->axe_cdata.axe_tx_chain[i].axe_mbuf = NULL; 1531 } 1532 if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) { 1533 usbd_free_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer); 1534 sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL; 1535 } 1536 } 1537 1538 sc->axe_link = 0; 1539 } 1540 1541