xref: /openbsd-src/sys/dev/pci/drm/ttm/ttm_module.c (revision 1bb76ff151c0aba8e3312a604e4cd2e5195cf4b7)
1c349dbc7Sjsg /* SPDX-License-Identifier: GPL-2.0 OR MIT */
2c349dbc7Sjsg /**************************************************************************
3c349dbc7Sjsg  *
4c349dbc7Sjsg  * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
5c349dbc7Sjsg  * All Rights Reserved.
6c349dbc7Sjsg  *
7c349dbc7Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
8c349dbc7Sjsg  * copy of this software and associated documentation files (the
9c349dbc7Sjsg  * "Software"), to deal in the Software without restriction, including
10c349dbc7Sjsg  * without limitation the rights to use, copy, modify, merge, publish,
11c349dbc7Sjsg  * distribute, sub license, and/or sell copies of the Software, and to
12c349dbc7Sjsg  * permit persons to whom the Software is furnished to do so, subject to
13c349dbc7Sjsg  * the following conditions:
14c349dbc7Sjsg  *
15c349dbc7Sjsg  * The above copyright notice and this permission notice (including the
16c349dbc7Sjsg  * next paragraph) shall be included in all copies or substantial portions
17c349dbc7Sjsg  * of the Software.
18c349dbc7Sjsg  *
19c349dbc7Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20c349dbc7Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21c349dbc7Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22c349dbc7Sjsg  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
23c349dbc7Sjsg  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24c349dbc7Sjsg  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25c349dbc7Sjsg  * USE OR OTHER DEALINGS IN THE SOFTWARE.
26c349dbc7Sjsg  *
27c349dbc7Sjsg  **************************************************************************/
28c349dbc7Sjsg /*
29c349dbc7Sjsg  * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
30c349dbc7Sjsg  * 	    Jerome Glisse
31c349dbc7Sjsg  */
32c349dbc7Sjsg #include <linux/module.h>
33c349dbc7Sjsg #include <linux/device.h>
345ca02815Sjsg #include <linux/pgtable.h>
35c349dbc7Sjsg #include <linux/sched.h>
365ca02815Sjsg #include <linux/debugfs.h>
37c349dbc7Sjsg #include <drm/drm_sysfs.h>
385ca02815Sjsg #include <drm/ttm/ttm_caching.h>
39c349dbc7Sjsg 
405ca02815Sjsg #include "ttm_module.h"
41c349dbc7Sjsg 
42c349dbc7Sjsg /**
43*1bb76ff1Sjsg  * DOC: TTM
44*1bb76ff1Sjsg  *
45*1bb76ff1Sjsg  * TTM is a memory manager for accelerator devices with dedicated memory.
46*1bb76ff1Sjsg  *
47*1bb76ff1Sjsg  * The basic idea is that resources are grouped together in buffer objects of
48*1bb76ff1Sjsg  * certain size and TTM handles lifetime, movement and CPU mappings of those
49*1bb76ff1Sjsg  * objects.
50*1bb76ff1Sjsg  *
51*1bb76ff1Sjsg  * TODO: Add more design background and information here.
52*1bb76ff1Sjsg  */
53*1bb76ff1Sjsg 
54*1bb76ff1Sjsg /**
555ca02815Sjsg  * ttm_prot_from_caching - Modify the page protection according to the
565ca02815Sjsg  * ttm cacing mode
575ca02815Sjsg  * @caching: The ttm caching mode
585ca02815Sjsg  * @tmp: The original page protection
595ca02815Sjsg  *
605ca02815Sjsg  * Return: The modified page protection
61c349dbc7Sjsg  */
ttm_prot_from_caching(enum ttm_caching caching,pgprot_t tmp)625ca02815Sjsg pgprot_t ttm_prot_from_caching(enum ttm_caching caching, pgprot_t tmp)
635ca02815Sjsg {
645ca02815Sjsg 	/* Cached mappings need no adjustment */
655ca02815Sjsg 	if (caching == ttm_cached)
665ca02815Sjsg 		return tmp;
67c349dbc7Sjsg 
685ca02815Sjsg #if defined(__i386__) || defined(__x86_64__)
695ca02815Sjsg 	if (caching == ttm_write_combined)
705ca02815Sjsg 		tmp = pgprot_writecombine(tmp);
71*1bb76ff1Sjsg #ifndef CONFIG_UML
725ca02815Sjsg 	else if (curcpu()->ci_family > 3)
735ca02815Sjsg 		tmp = pgprot_noncached(tmp);
74*1bb76ff1Sjsg #endif /* CONFIG_UML */
75*1bb76ff1Sjsg #endif /* __i386__ || __x86_64__ */
765ca02815Sjsg #if defined(__ia64__) || defined(__arm__) || defined(__aarch64__) || \
77*1bb76ff1Sjsg 	defined(__powerpc__) || defined(__mips__) || defined(__loongarch__)
785ca02815Sjsg 	if (caching == ttm_write_combined)
795ca02815Sjsg 		tmp = pgprot_writecombine(tmp);
805ca02815Sjsg 	else
815ca02815Sjsg 		tmp = pgprot_noncached(tmp);
825ca02815Sjsg #endif
835ca02815Sjsg #if defined(__sparc__)
845ca02815Sjsg 	tmp = pgprot_noncached(tmp);
855ca02815Sjsg #endif
865ca02815Sjsg 	return tmp;
87c349dbc7Sjsg }
88c349dbc7Sjsg 
89c349dbc7Sjsg MODULE_AUTHOR("Thomas Hellstrom, Jerome Glisse");
90c349dbc7Sjsg MODULE_DESCRIPTION("TTM memory manager subsystem (for DRM device)");
91c349dbc7Sjsg MODULE_LICENSE("GPL and additional rights");
92