1c349dbc7Sjsg /* SPDX-License-Identifier: MIT */
2c349dbc7Sjsg /*
3c349dbc7Sjsg * Copyright © 2019 Intel Corporation
4c349dbc7Sjsg */
5c349dbc7Sjsg
6c349dbc7Sjsg #ifndef __INTEL_RUNTIME_PM_H__
7c349dbc7Sjsg #define __INTEL_RUNTIME_PM_H__
8c349dbc7Sjsg
9c349dbc7Sjsg #include <linux/types.h>
10c349dbc7Sjsg
11c349dbc7Sjsg #include "intel_wakeref.h"
12c349dbc7Sjsg
13c349dbc7Sjsg #include "i915_utils.h"
14c349dbc7Sjsg
15c349dbc7Sjsg struct device;
16c349dbc7Sjsg struct drm_i915_private;
17c349dbc7Sjsg struct drm_printer;
18c349dbc7Sjsg
19c349dbc7Sjsg /*
20c349dbc7Sjsg * This struct helps tracking the state needed for runtime PM, which puts the
21c349dbc7Sjsg * device in PCI D3 state. Notice that when this happens, nothing on the
22c349dbc7Sjsg * graphics device works, even register access, so we don't get interrupts nor
23c349dbc7Sjsg * anything else.
24c349dbc7Sjsg *
25c349dbc7Sjsg * Every piece of our code that needs to actually touch the hardware needs to
26c349dbc7Sjsg * either call intel_runtime_pm_get or call intel_display_power_get with the
27c349dbc7Sjsg * appropriate power domain.
28c349dbc7Sjsg *
29c349dbc7Sjsg * Our driver uses the autosuspend delay feature, which means we'll only really
30c349dbc7Sjsg * suspend if we stay with zero refcount for a certain amount of time. The
31c349dbc7Sjsg * default value is currently very conservative (see intel_runtime_pm_enable), but
32c349dbc7Sjsg * it can be changed with the standard runtime PM files from sysfs.
33c349dbc7Sjsg *
34c349dbc7Sjsg * The irqs_disabled variable becomes true exactly after we disable the IRQs and
35c349dbc7Sjsg * goes back to false exactly before we reenable the IRQs. We use this variable
36c349dbc7Sjsg * to check if someone is trying to enable/disable IRQs while they're supposed
37c349dbc7Sjsg * to be disabled. This shouldn't happen and we'll print some error messages in
38c349dbc7Sjsg * case it happens.
39c349dbc7Sjsg *
40c349dbc7Sjsg * For more, read the Documentation/power/runtime_pm.rst.
41c349dbc7Sjsg */
42c349dbc7Sjsg struct intel_runtime_pm {
43c349dbc7Sjsg atomic_t wakeref_count;
445ca02815Sjsg struct device *kdev; /* points to i915->drm.dev */
45c349dbc7Sjsg bool available;
46c349dbc7Sjsg bool suspended;
47c349dbc7Sjsg bool irqs_enabled;
481bb76ff1Sjsg bool no_wakeref_tracking;
491bb76ff1Sjsg
501bb76ff1Sjsg /*
511bb76ff1Sjsg * Protects access to lmem usefault list.
521bb76ff1Sjsg * It is required, if we are outside of the runtime suspend path,
531bb76ff1Sjsg * access to @lmem_userfault_list requires always first grabbing the
541bb76ff1Sjsg * runtime pm, to ensure we can't race against runtime suspend.
551bb76ff1Sjsg * Once we have that we also need to grab @lmem_userfault_lock,
561bb76ff1Sjsg * at which point we have exclusive access.
571bb76ff1Sjsg * The runtime suspend path is special since it doesn't really hold any locks,
581bb76ff1Sjsg * but instead has exclusive access by virtue of all other accesses requiring
591bb76ff1Sjsg * holding the runtime pm wakeref.
601bb76ff1Sjsg */
611bb76ff1Sjsg spinlock_t lmem_userfault_lock;
621bb76ff1Sjsg
631bb76ff1Sjsg /*
641bb76ff1Sjsg * Keep list of userfaulted gem obj, which require to release their
651bb76ff1Sjsg * mmap mappings at runtime suspend path.
661bb76ff1Sjsg */
671bb76ff1Sjsg struct list_head lmem_userfault_list;
681bb76ff1Sjsg
691bb76ff1Sjsg /* Manual runtime pm autosuspend delay for user GGTT/lmem mmaps */
701bb76ff1Sjsg struct intel_wakeref_auto userfault_wakeref;
71c349dbc7Sjsg
72c349dbc7Sjsg #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
73c349dbc7Sjsg /*
74c349dbc7Sjsg * To aide detection of wakeref leaks and general misuse, we
75c349dbc7Sjsg * track all wakeref holders. With manual markup (i.e. returning
76c349dbc7Sjsg * a cookie to each rpm_get caller which they then supply to their
77c349dbc7Sjsg * paired rpm_put) we can remove corresponding pairs of and keep
78c349dbc7Sjsg * the array trimmed to active wakerefs.
79c349dbc7Sjsg */
80c349dbc7Sjsg struct intel_runtime_pm_debug {
81c349dbc7Sjsg spinlock_t lock;
82c349dbc7Sjsg
83c349dbc7Sjsg depot_stack_handle_t last_acquire;
84c349dbc7Sjsg depot_stack_handle_t last_release;
85c349dbc7Sjsg
86c349dbc7Sjsg depot_stack_handle_t *owners;
87c349dbc7Sjsg unsigned long count;
88c349dbc7Sjsg } debug;
89c349dbc7Sjsg #endif
90c349dbc7Sjsg };
91c349dbc7Sjsg
92c349dbc7Sjsg #define BITS_PER_WAKEREF \
93*f005ef32Sjsg BITS_PER_TYPE(typeof_member(struct intel_runtime_pm, wakeref_count))
94c349dbc7Sjsg #define INTEL_RPM_WAKELOCK_SHIFT (BITS_PER_WAKEREF / 2)
95c349dbc7Sjsg #define INTEL_RPM_WAKELOCK_BIAS (1 << INTEL_RPM_WAKELOCK_SHIFT)
96c349dbc7Sjsg #define INTEL_RPM_RAW_WAKEREF_MASK (INTEL_RPM_WAKELOCK_BIAS - 1)
97c349dbc7Sjsg
98c349dbc7Sjsg static inline int
intel_rpm_raw_wakeref_count(int wakeref_count)99c349dbc7Sjsg intel_rpm_raw_wakeref_count(int wakeref_count)
100c349dbc7Sjsg {
101c349dbc7Sjsg return wakeref_count & INTEL_RPM_RAW_WAKEREF_MASK;
102c349dbc7Sjsg }
103c349dbc7Sjsg
104c349dbc7Sjsg static inline int
intel_rpm_wakelock_count(int wakeref_count)105c349dbc7Sjsg intel_rpm_wakelock_count(int wakeref_count)
106c349dbc7Sjsg {
107c349dbc7Sjsg return wakeref_count >> INTEL_RPM_WAKELOCK_SHIFT;
108c349dbc7Sjsg }
109c349dbc7Sjsg
110c349dbc7Sjsg static inline void
assert_rpm_device_not_suspended(struct intel_runtime_pm * rpm)111c349dbc7Sjsg assert_rpm_device_not_suspended(struct intel_runtime_pm *rpm)
112c349dbc7Sjsg {
113c349dbc7Sjsg WARN_ONCE(rpm->suspended,
114c349dbc7Sjsg "Device suspended during HW access\n");
115c349dbc7Sjsg }
116c349dbc7Sjsg
117c349dbc7Sjsg static inline void
__assert_rpm_raw_wakeref_held(struct intel_runtime_pm * rpm,int wakeref_count)118c349dbc7Sjsg __assert_rpm_raw_wakeref_held(struct intel_runtime_pm *rpm, int wakeref_count)
119c349dbc7Sjsg {
120c349dbc7Sjsg assert_rpm_device_not_suspended(rpm);
121c349dbc7Sjsg WARN_ONCE(!intel_rpm_raw_wakeref_count(wakeref_count),
122c349dbc7Sjsg "RPM raw-wakeref not held\n");
123c349dbc7Sjsg }
124c349dbc7Sjsg
125c349dbc7Sjsg static inline void
__assert_rpm_wakelock_held(struct intel_runtime_pm * rpm,int wakeref_count)126c349dbc7Sjsg __assert_rpm_wakelock_held(struct intel_runtime_pm *rpm, int wakeref_count)
127c349dbc7Sjsg {
128c349dbc7Sjsg __assert_rpm_raw_wakeref_held(rpm, wakeref_count);
129c349dbc7Sjsg WARN_ONCE(!intel_rpm_wakelock_count(wakeref_count),
130c349dbc7Sjsg "RPM wakelock ref not held during HW access\n");
131c349dbc7Sjsg }
132c349dbc7Sjsg
133c349dbc7Sjsg static inline void
assert_rpm_raw_wakeref_held(struct intel_runtime_pm * rpm)134c349dbc7Sjsg assert_rpm_raw_wakeref_held(struct intel_runtime_pm *rpm)
135c349dbc7Sjsg {
136c349dbc7Sjsg __assert_rpm_raw_wakeref_held(rpm, atomic_read(&rpm->wakeref_count));
137c349dbc7Sjsg }
138c349dbc7Sjsg
139c349dbc7Sjsg static inline void
assert_rpm_wakelock_held(struct intel_runtime_pm * rpm)140c349dbc7Sjsg assert_rpm_wakelock_held(struct intel_runtime_pm *rpm)
141c349dbc7Sjsg {
142c349dbc7Sjsg __assert_rpm_wakelock_held(rpm, atomic_read(&rpm->wakeref_count));
143c349dbc7Sjsg }
144c349dbc7Sjsg
145c349dbc7Sjsg /**
146c349dbc7Sjsg * disable_rpm_wakeref_asserts - disable the RPM assert checks
147c349dbc7Sjsg * @rpm: the intel_runtime_pm structure
148c349dbc7Sjsg *
149c349dbc7Sjsg * This function disable asserts that check if we hold an RPM wakelock
150c349dbc7Sjsg * reference, while keeping the device-not-suspended checks still enabled.
151c349dbc7Sjsg * It's meant to be used only in special circumstances where our rule about
152c349dbc7Sjsg * the wakelock refcount wrt. the device power state doesn't hold. According
153c349dbc7Sjsg * to this rule at any point where we access the HW or want to keep the HW in
154c349dbc7Sjsg * an active state we must hold an RPM wakelock reference acquired via one of
155c349dbc7Sjsg * the intel_runtime_pm_get() helpers. Currently there are a few special spots
156c349dbc7Sjsg * where this rule doesn't hold: the IRQ and suspend/resume handlers, the
157c349dbc7Sjsg * forcewake release timer, and the GPU RPS and hangcheck works. All other
158c349dbc7Sjsg * users should avoid using this function.
159c349dbc7Sjsg *
160c349dbc7Sjsg * Any calls to this function must have a symmetric call to
161c349dbc7Sjsg * enable_rpm_wakeref_asserts().
162c349dbc7Sjsg */
163c349dbc7Sjsg static inline void
disable_rpm_wakeref_asserts(struct intel_runtime_pm * rpm)164c349dbc7Sjsg disable_rpm_wakeref_asserts(struct intel_runtime_pm *rpm)
165c349dbc7Sjsg {
166c349dbc7Sjsg atomic_add(INTEL_RPM_WAKELOCK_BIAS + 1,
167c349dbc7Sjsg &rpm->wakeref_count);
168c349dbc7Sjsg }
169c349dbc7Sjsg
170c349dbc7Sjsg /**
171c349dbc7Sjsg * enable_rpm_wakeref_asserts - re-enable the RPM assert checks
172c349dbc7Sjsg * @rpm: the intel_runtime_pm structure
173c349dbc7Sjsg *
174c349dbc7Sjsg * This function re-enables the RPM assert checks after disabling them with
175c349dbc7Sjsg * disable_rpm_wakeref_asserts. It's meant to be used only in special
176c349dbc7Sjsg * circumstances otherwise its use should be avoided.
177c349dbc7Sjsg *
178c349dbc7Sjsg * Any calls to this function must have a symmetric call to
179c349dbc7Sjsg * disable_rpm_wakeref_asserts().
180c349dbc7Sjsg */
181c349dbc7Sjsg static inline void
enable_rpm_wakeref_asserts(struct intel_runtime_pm * rpm)182c349dbc7Sjsg enable_rpm_wakeref_asserts(struct intel_runtime_pm *rpm)
183c349dbc7Sjsg {
184c349dbc7Sjsg atomic_sub(INTEL_RPM_WAKELOCK_BIAS + 1,
185c349dbc7Sjsg &rpm->wakeref_count);
186c349dbc7Sjsg }
187c349dbc7Sjsg
188c349dbc7Sjsg void intel_runtime_pm_init_early(struct intel_runtime_pm *rpm);
189c349dbc7Sjsg void intel_runtime_pm_enable(struct intel_runtime_pm *rpm);
190c349dbc7Sjsg void intel_runtime_pm_disable(struct intel_runtime_pm *rpm);
191c349dbc7Sjsg void intel_runtime_pm_driver_release(struct intel_runtime_pm *rpm);
192c349dbc7Sjsg
193c349dbc7Sjsg intel_wakeref_t intel_runtime_pm_get(struct intel_runtime_pm *rpm);
194c349dbc7Sjsg intel_wakeref_t intel_runtime_pm_get_if_in_use(struct intel_runtime_pm *rpm);
195ad8b1aafSjsg intel_wakeref_t intel_runtime_pm_get_if_active(struct intel_runtime_pm *rpm);
196c349dbc7Sjsg intel_wakeref_t intel_runtime_pm_get_noresume(struct intel_runtime_pm *rpm);
197c349dbc7Sjsg intel_wakeref_t intel_runtime_pm_get_raw(struct intel_runtime_pm *rpm);
198c349dbc7Sjsg
199c349dbc7Sjsg #define with_intel_runtime_pm(rpm, wf) \
200c349dbc7Sjsg for ((wf) = intel_runtime_pm_get(rpm); (wf); \
201c349dbc7Sjsg intel_runtime_pm_put((rpm), (wf)), (wf) = 0)
202c349dbc7Sjsg
203c349dbc7Sjsg #define with_intel_runtime_pm_if_in_use(rpm, wf) \
204c349dbc7Sjsg for ((wf) = intel_runtime_pm_get_if_in_use(rpm); (wf); \
205c349dbc7Sjsg intel_runtime_pm_put((rpm), (wf)), (wf) = 0)
206c349dbc7Sjsg
207ad8b1aafSjsg #define with_intel_runtime_pm_if_active(rpm, wf) \
208ad8b1aafSjsg for ((wf) = intel_runtime_pm_get_if_active(rpm); (wf); \
209ad8b1aafSjsg intel_runtime_pm_put((rpm), (wf)), (wf) = 0)
210ad8b1aafSjsg
211c349dbc7Sjsg void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm);
212c349dbc7Sjsg #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
213c349dbc7Sjsg void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
214c349dbc7Sjsg #else
215c349dbc7Sjsg static inline void
intel_runtime_pm_put(struct intel_runtime_pm * rpm,intel_wakeref_t wref)216c349dbc7Sjsg intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
217c349dbc7Sjsg {
218c349dbc7Sjsg intel_runtime_pm_put_unchecked(rpm);
219c349dbc7Sjsg }
220c349dbc7Sjsg #endif
221c349dbc7Sjsg void intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
222c349dbc7Sjsg
223c349dbc7Sjsg #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
224c349dbc7Sjsg void print_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm,
225c349dbc7Sjsg struct drm_printer *p);
226c349dbc7Sjsg #else
print_intel_runtime_pm_wakeref(struct intel_runtime_pm * rpm,struct drm_printer * p)227c349dbc7Sjsg static inline void print_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm,
228c349dbc7Sjsg struct drm_printer *p)
229c349dbc7Sjsg {
230c349dbc7Sjsg }
231c349dbc7Sjsg #endif
232c349dbc7Sjsg
233c349dbc7Sjsg #endif /* __INTEL_RUNTIME_PM_H__ */
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