1c349dbc7Sjsg /*
2c349dbc7Sjsg * Copyright 2008 Intel Corporation <hong.liu@intel.com>
3c349dbc7Sjsg * Copyright 2008 Red Hat <mjg@redhat.com>
4c349dbc7Sjsg *
5c349dbc7Sjsg * Permission is hereby granted, free of charge, to any person obtaining
6c349dbc7Sjsg * a copy of this software and associated documentation files (the
7c349dbc7Sjsg * "Software"), to deal in the Software without restriction, including
8c349dbc7Sjsg * without limitation the rights to use, copy, modify, merge, publish,
9c349dbc7Sjsg * distribute, sub license, and/or sell copies of the Software, and to
10c349dbc7Sjsg * permit persons to whom the Software is furnished to do so, subject to
11c349dbc7Sjsg * the following conditions:
12c349dbc7Sjsg *
13c349dbc7Sjsg * The above copyright notice and this permission notice (including the
14c349dbc7Sjsg * next paragraph) shall be included in all copies or substantial
15c349dbc7Sjsg * portions of the Software.
16c349dbc7Sjsg *
17c349dbc7Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18c349dbc7Sjsg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19c349dbc7Sjsg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20c349dbc7Sjsg * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
21c349dbc7Sjsg * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
22c349dbc7Sjsg * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23c349dbc7Sjsg * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24c349dbc7Sjsg * SOFTWARE.
25c349dbc7Sjsg *
26c349dbc7Sjsg */
27c349dbc7Sjsg
28c349dbc7Sjsg #include <linux/acpi.h>
29c349dbc7Sjsg #include <linux/dmi.h>
30c349dbc7Sjsg #include <linux/firmware.h>
31c349dbc7Sjsg #include <acpi/video.h>
32c349dbc7Sjsg
331bb76ff1Sjsg #include <drm/drm_edid.h>
341bb76ff1Sjsg
35c349dbc7Sjsg #include "i915_drv.h"
36c349dbc7Sjsg #include "intel_acpi.h"
37b35a56d4Sjsg #include "intel_backlight.h"
38c349dbc7Sjsg #include "intel_display_types.h"
39c349dbc7Sjsg #include "intel_opregion.h"
401bb76ff1Sjsg #include "intel_pci_config.h"
41c349dbc7Sjsg
42c349dbc7Sjsg #define OPREGION_HEADER_OFFSET 0
43c349dbc7Sjsg #define OPREGION_ACPI_OFFSET 0x100
44c349dbc7Sjsg #define ACPI_CLID 0x01ac /* current lid state indicator */
45c349dbc7Sjsg #define ACPI_CDCK 0x01b0 /* current docking state indicator */
46c349dbc7Sjsg #define OPREGION_SWSCI_OFFSET 0x200
47c349dbc7Sjsg #define OPREGION_ASLE_OFFSET 0x300
48c349dbc7Sjsg #define OPREGION_VBT_OFFSET 0x400
49c349dbc7Sjsg #define OPREGION_ASLE_EXT_OFFSET 0x1C00
50c349dbc7Sjsg
51c349dbc7Sjsg #define OPREGION_SIGNATURE "IntelGraphicsMem"
521bb76ff1Sjsg #define MBOX_ACPI BIT(0) /* Mailbox #1 */
531bb76ff1Sjsg #define MBOX_SWSCI BIT(1) /* Mailbox #2 (obsolete from v2.x) */
541bb76ff1Sjsg #define MBOX_ASLE BIT(2) /* Mailbox #3 */
551bb76ff1Sjsg #define MBOX_ASLE_EXT BIT(4) /* Mailbox #5 */
561bb76ff1Sjsg #define MBOX_BACKLIGHT BIT(5) /* Mailbox #2 (valid from v3.x) */
571bb76ff1Sjsg
581bb76ff1Sjsg #define PCON_HEADLESS_SKU BIT(13)
59c349dbc7Sjsg
60c349dbc7Sjsg struct opregion_header {
61c349dbc7Sjsg u8 signature[16];
62c349dbc7Sjsg u32 size;
63c349dbc7Sjsg struct {
64c349dbc7Sjsg u8 rsvd;
65c349dbc7Sjsg u8 revision;
66c349dbc7Sjsg u8 minor;
67c349dbc7Sjsg u8 major;
68c349dbc7Sjsg } __packed over;
69c349dbc7Sjsg u8 bios_ver[32];
70c349dbc7Sjsg u8 vbios_ver[16];
71c349dbc7Sjsg u8 driver_ver[16];
72c349dbc7Sjsg u32 mboxes;
73c349dbc7Sjsg u32 driver_model;
74c349dbc7Sjsg u32 pcon;
75c349dbc7Sjsg u8 dver[32];
76c349dbc7Sjsg u8 rsvd[124];
77c349dbc7Sjsg } __packed;
78c349dbc7Sjsg
79c349dbc7Sjsg /* OpRegion mailbox #1: public ACPI methods */
80c349dbc7Sjsg struct opregion_acpi {
81c349dbc7Sjsg u32 drdy; /* driver readiness */
82c349dbc7Sjsg u32 csts; /* notification status */
83c349dbc7Sjsg u32 cevt; /* current event */
84c349dbc7Sjsg u8 rsvd1[20];
85c349dbc7Sjsg u32 didl[8]; /* supported display devices ID list */
86c349dbc7Sjsg u32 cpdl[8]; /* currently presented display list */
87c349dbc7Sjsg u32 cadl[8]; /* currently active display list */
88c349dbc7Sjsg u32 nadl[8]; /* next active devices list */
89c349dbc7Sjsg u32 aslp; /* ASL sleep time-out */
90c349dbc7Sjsg u32 tidx; /* toggle table index */
91c349dbc7Sjsg u32 chpd; /* current hotplug enable indicator */
92c349dbc7Sjsg u32 clid; /* current lid state*/
93c349dbc7Sjsg u32 cdck; /* current docking state */
94c349dbc7Sjsg u32 sxsw; /* Sx state resume */
95c349dbc7Sjsg u32 evts; /* ASL supported events */
96c349dbc7Sjsg u32 cnot; /* current OS notification */
97c349dbc7Sjsg u32 nrdy; /* driver status */
98c349dbc7Sjsg u32 did2[7]; /* extended supported display devices ID list */
99c349dbc7Sjsg u32 cpd2[7]; /* extended attached display devices list */
100c349dbc7Sjsg u8 rsvd2[4];
101c349dbc7Sjsg } __packed;
102c349dbc7Sjsg
103c349dbc7Sjsg /* OpRegion mailbox #2: SWSCI */
104c349dbc7Sjsg struct opregion_swsci {
105c349dbc7Sjsg u32 scic; /* SWSCI command|status|data */
106c349dbc7Sjsg u32 parm; /* command parameters */
107c349dbc7Sjsg u32 dslp; /* driver sleep time-out */
108c349dbc7Sjsg u8 rsvd[244];
109c349dbc7Sjsg } __packed;
110c349dbc7Sjsg
111c349dbc7Sjsg /* OpRegion mailbox #3: ASLE */
112c349dbc7Sjsg struct opregion_asle {
113c349dbc7Sjsg u32 ardy; /* driver readiness */
114c349dbc7Sjsg u32 aslc; /* ASLE interrupt command */
115c349dbc7Sjsg u32 tche; /* technology enabled indicator */
116c349dbc7Sjsg u32 alsi; /* current ALS illuminance reading */
117c349dbc7Sjsg u32 bclp; /* backlight brightness to set */
118c349dbc7Sjsg u32 pfit; /* panel fitting state */
119c349dbc7Sjsg u32 cblv; /* current brightness level */
120c349dbc7Sjsg u16 bclm[20]; /* backlight level duty cycle mapping table */
121c349dbc7Sjsg u32 cpfm; /* current panel fitting mode */
122c349dbc7Sjsg u32 epfm; /* enabled panel fitting modes */
123c349dbc7Sjsg u8 plut[74]; /* panel LUT and identifier */
124c349dbc7Sjsg u32 pfmb; /* PWM freq and min brightness */
125c349dbc7Sjsg u32 cddv; /* color correction default values */
126c349dbc7Sjsg u32 pcft; /* power conservation features */
127c349dbc7Sjsg u32 srot; /* supported rotation angles */
128c349dbc7Sjsg u32 iuer; /* IUER events */
129c349dbc7Sjsg u64 fdss;
130c349dbc7Sjsg u32 fdsp;
131c349dbc7Sjsg u32 stat;
132c349dbc7Sjsg u64 rvda; /* Physical (2.0) or relative from opregion (2.1+)
133c349dbc7Sjsg * address of raw VBT data. */
134c349dbc7Sjsg u32 rvds; /* Size of raw vbt data */
135c349dbc7Sjsg u8 rsvd[58];
136c349dbc7Sjsg } __packed;
137c349dbc7Sjsg
138c349dbc7Sjsg /* OpRegion mailbox #5: ASLE ext */
139c349dbc7Sjsg struct opregion_asle_ext {
140c349dbc7Sjsg u32 phed; /* Panel Header */
141c349dbc7Sjsg u8 bddc[256]; /* Panel EDID */
142c349dbc7Sjsg u8 rsvd[764];
143c349dbc7Sjsg } __packed;
144c349dbc7Sjsg
145c349dbc7Sjsg /* Driver readiness indicator */
146c349dbc7Sjsg #define ASLE_ARDY_READY (1 << 0)
147c349dbc7Sjsg #define ASLE_ARDY_NOT_READY (0 << 0)
148c349dbc7Sjsg
149c349dbc7Sjsg /* ASLE Interrupt Command (ASLC) bits */
150c349dbc7Sjsg #define ASLC_SET_ALS_ILLUM (1 << 0)
151c349dbc7Sjsg #define ASLC_SET_BACKLIGHT (1 << 1)
152c349dbc7Sjsg #define ASLC_SET_PFIT (1 << 2)
153c349dbc7Sjsg #define ASLC_SET_PWM_FREQ (1 << 3)
154c349dbc7Sjsg #define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4)
155c349dbc7Sjsg #define ASLC_BUTTON_ARRAY (1 << 5)
156c349dbc7Sjsg #define ASLC_CONVERTIBLE_INDICATOR (1 << 6)
157c349dbc7Sjsg #define ASLC_DOCKING_INDICATOR (1 << 7)
158c349dbc7Sjsg #define ASLC_ISCT_STATE_CHANGE (1 << 8)
159c349dbc7Sjsg #define ASLC_REQ_MSK 0x1ff
160c349dbc7Sjsg /* response bits */
161c349dbc7Sjsg #define ASLC_ALS_ILLUM_FAILED (1 << 10)
162c349dbc7Sjsg #define ASLC_BACKLIGHT_FAILED (1 << 12)
163c349dbc7Sjsg #define ASLC_PFIT_FAILED (1 << 14)
164c349dbc7Sjsg #define ASLC_PWM_FREQ_FAILED (1 << 16)
165c349dbc7Sjsg #define ASLC_ROTATION_ANGLES_FAILED (1 << 18)
166c349dbc7Sjsg #define ASLC_BUTTON_ARRAY_FAILED (1 << 20)
167c349dbc7Sjsg #define ASLC_CONVERTIBLE_FAILED (1 << 22)
168c349dbc7Sjsg #define ASLC_DOCKING_FAILED (1 << 24)
169c349dbc7Sjsg #define ASLC_ISCT_STATE_FAILED (1 << 26)
170c349dbc7Sjsg
171c349dbc7Sjsg /* Technology enabled indicator */
172c349dbc7Sjsg #define ASLE_TCHE_ALS_EN (1 << 0)
173c349dbc7Sjsg #define ASLE_TCHE_BLC_EN (1 << 1)
174c349dbc7Sjsg #define ASLE_TCHE_PFIT_EN (1 << 2)
175c349dbc7Sjsg #define ASLE_TCHE_PFMB_EN (1 << 3)
176c349dbc7Sjsg
177c349dbc7Sjsg /* ASLE backlight brightness to set */
178c349dbc7Sjsg #define ASLE_BCLP_VALID (1<<31)
179c349dbc7Sjsg #define ASLE_BCLP_MSK (~(1<<31))
180c349dbc7Sjsg
181c349dbc7Sjsg /* ASLE panel fitting request */
182c349dbc7Sjsg #define ASLE_PFIT_VALID (1<<31)
183c349dbc7Sjsg #define ASLE_PFIT_CENTER (1<<0)
184c349dbc7Sjsg #define ASLE_PFIT_STRETCH_TEXT (1<<1)
185c349dbc7Sjsg #define ASLE_PFIT_STRETCH_GFX (1<<2)
186c349dbc7Sjsg
187c349dbc7Sjsg /* PWM frequency and minimum brightness */
188c349dbc7Sjsg #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
189c349dbc7Sjsg #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
190c349dbc7Sjsg #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
191c349dbc7Sjsg #define ASLE_PFMB_PWM_VALID (1<<31)
192c349dbc7Sjsg
193c349dbc7Sjsg #define ASLE_CBLV_VALID (1<<31)
194c349dbc7Sjsg
195c349dbc7Sjsg /* IUER */
196c349dbc7Sjsg #define ASLE_IUER_DOCKING (1 << 7)
197c349dbc7Sjsg #define ASLE_IUER_CONVERTIBLE (1 << 6)
198c349dbc7Sjsg #define ASLE_IUER_ROTATION_LOCK_BTN (1 << 4)
199c349dbc7Sjsg #define ASLE_IUER_VOLUME_DOWN_BTN (1 << 3)
200c349dbc7Sjsg #define ASLE_IUER_VOLUME_UP_BTN (1 << 2)
201c349dbc7Sjsg #define ASLE_IUER_WINDOWS_BTN (1 << 1)
202c349dbc7Sjsg #define ASLE_IUER_POWER_BTN (1 << 0)
203c349dbc7Sjsg
2041bb76ff1Sjsg #define ASLE_PHED_EDID_VALID_MASK 0x3
2051bb76ff1Sjsg
206c349dbc7Sjsg /* Software System Control Interrupt (SWSCI) */
207c349dbc7Sjsg #define SWSCI_SCIC_INDICATOR (1 << 0)
208c349dbc7Sjsg #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1
209c349dbc7Sjsg #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1)
210c349dbc7Sjsg #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8
211c349dbc7Sjsg #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8)
212c349dbc7Sjsg #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8
213c349dbc7Sjsg #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8)
214c349dbc7Sjsg #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5
215c349dbc7Sjsg #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5)
216c349dbc7Sjsg #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1
217c349dbc7Sjsg
218c349dbc7Sjsg #define SWSCI_FUNCTION_CODE(main, sub) \
219c349dbc7Sjsg ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \
220c349dbc7Sjsg (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT)
221c349dbc7Sjsg
222c349dbc7Sjsg /* SWSCI: Get BIOS Data (GBDA) */
223c349dbc7Sjsg #define SWSCI_GBDA 4
224c349dbc7Sjsg #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0)
225c349dbc7Sjsg #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1)
226c349dbc7Sjsg #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4)
227c349dbc7Sjsg #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5)
228c349dbc7Sjsg #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6)
229c349dbc7Sjsg #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7)
230c349dbc7Sjsg #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10)
231c349dbc7Sjsg
232c349dbc7Sjsg /* SWSCI: System BIOS Callbacks (SBCB) */
233c349dbc7Sjsg #define SWSCI_SBCB 6
234c349dbc7Sjsg #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0)
235c349dbc7Sjsg #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1)
236c349dbc7Sjsg #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3)
237c349dbc7Sjsg #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4)
238c349dbc7Sjsg #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5)
239c349dbc7Sjsg #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6)
240c349dbc7Sjsg #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7)
241c349dbc7Sjsg #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8)
242c349dbc7Sjsg #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9)
243c349dbc7Sjsg #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10)
244c349dbc7Sjsg #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11)
245c349dbc7Sjsg #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16)
246c349dbc7Sjsg #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17)
247c349dbc7Sjsg #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18)
248c349dbc7Sjsg #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19)
249c349dbc7Sjsg #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21)
250c349dbc7Sjsg
251c349dbc7Sjsg #define MAX_DSLP 1500
252c349dbc7Sjsg
check_swsci_function(struct drm_i915_private * i915,u32 function)2531bb76ff1Sjsg static int check_swsci_function(struct drm_i915_private *i915, u32 function)
254c349dbc7Sjsg {
2551bb76ff1Sjsg struct opregion_swsci *swsci = i915->display.opregion.swsci;
2561bb76ff1Sjsg u32 main_function, sub_function;
257c349dbc7Sjsg
258c349dbc7Sjsg if (!swsci)
259c349dbc7Sjsg return -ENODEV;
260c349dbc7Sjsg
261c349dbc7Sjsg main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >>
262c349dbc7Sjsg SWSCI_SCIC_MAIN_FUNCTION_SHIFT;
263c349dbc7Sjsg sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >>
264c349dbc7Sjsg SWSCI_SCIC_SUB_FUNCTION_SHIFT;
265c349dbc7Sjsg
266c349dbc7Sjsg /* Check if we can call the function. See swsci_setup for details. */
267c349dbc7Sjsg if (main_function == SWSCI_SBCB) {
2681bb76ff1Sjsg if ((i915->display.opregion.swsci_sbcb_sub_functions &
269c349dbc7Sjsg (1 << sub_function)) == 0)
270c349dbc7Sjsg return -EINVAL;
271c349dbc7Sjsg } else if (main_function == SWSCI_GBDA) {
2721bb76ff1Sjsg if ((i915->display.opregion.swsci_gbda_sub_functions &
273c349dbc7Sjsg (1 << sub_function)) == 0)
274c349dbc7Sjsg return -EINVAL;
275c349dbc7Sjsg }
276c349dbc7Sjsg
2771bb76ff1Sjsg return 0;
2781bb76ff1Sjsg }
2791bb76ff1Sjsg
swsci(struct drm_i915_private * dev_priv,u32 function,u32 parm,u32 * parm_out)2801bb76ff1Sjsg static int swsci(struct drm_i915_private *dev_priv,
2811bb76ff1Sjsg u32 function, u32 parm, u32 *parm_out)
2821bb76ff1Sjsg {
2831bb76ff1Sjsg struct opregion_swsci *swsci = dev_priv->display.opregion.swsci;
2841bb76ff1Sjsg struct pci_dev *pdev = dev_priv->drm.pdev;
2851bb76ff1Sjsg u32 scic, dslp;
2861bb76ff1Sjsg u16 swsci_val;
2871bb76ff1Sjsg int ret;
2881bb76ff1Sjsg
2891bb76ff1Sjsg ret = check_swsci_function(dev_priv, function);
2901bb76ff1Sjsg if (ret)
2911bb76ff1Sjsg return ret;
2921bb76ff1Sjsg
293c349dbc7Sjsg /* Driver sleep timeout in ms. */
294c349dbc7Sjsg dslp = swsci->dslp;
295c349dbc7Sjsg if (!dslp) {
296c349dbc7Sjsg /* The spec says 2ms should be the default, but it's too small
297c349dbc7Sjsg * for some machines. */
298c349dbc7Sjsg dslp = 50;
299c349dbc7Sjsg } else if (dslp > MAX_DSLP) {
300c349dbc7Sjsg /* Hey bios, trust must be earned. */
301c349dbc7Sjsg DRM_INFO_ONCE("ACPI BIOS requests an excessive sleep of %u ms, "
302c349dbc7Sjsg "using %u ms instead\n", dslp, MAX_DSLP);
303c349dbc7Sjsg dslp = MAX_DSLP;
304c349dbc7Sjsg }
305c349dbc7Sjsg
306c349dbc7Sjsg /* The spec tells us to do this, but we are the only user... */
307c349dbc7Sjsg scic = swsci->scic;
308c349dbc7Sjsg if (scic & SWSCI_SCIC_INDICATOR) {
309c349dbc7Sjsg drm_dbg(&dev_priv->drm, "SWSCI request already in progress\n");
310c349dbc7Sjsg return -EBUSY;
311c349dbc7Sjsg }
312c349dbc7Sjsg
313c349dbc7Sjsg scic = function | SWSCI_SCIC_INDICATOR;
314c349dbc7Sjsg
315c349dbc7Sjsg swsci->parm = parm;
316c349dbc7Sjsg swsci->scic = scic;
317c349dbc7Sjsg
318c349dbc7Sjsg /* Ensure SCI event is selected and event trigger is cleared. */
319c349dbc7Sjsg pci_read_config_word(pdev, SWSCI, &swsci_val);
320c349dbc7Sjsg if (!(swsci_val & SWSCI_SCISEL) || (swsci_val & SWSCI_GSSCIE)) {
321c349dbc7Sjsg swsci_val |= SWSCI_SCISEL;
322c349dbc7Sjsg swsci_val &= ~SWSCI_GSSCIE;
323c349dbc7Sjsg pci_write_config_word(pdev, SWSCI, swsci_val);
324c349dbc7Sjsg }
325c349dbc7Sjsg
326c349dbc7Sjsg /* Use event trigger to tell bios to check the mail. */
327c349dbc7Sjsg swsci_val |= SWSCI_GSSCIE;
328c349dbc7Sjsg pci_write_config_word(pdev, SWSCI, swsci_val);
329c349dbc7Sjsg
330c349dbc7Sjsg /* Poll for the result. */
331c349dbc7Sjsg #define C (((scic = swsci->scic) & SWSCI_SCIC_INDICATOR) == 0)
332c349dbc7Sjsg if (wait_for(C, dslp)) {
333c349dbc7Sjsg drm_dbg(&dev_priv->drm, "SWSCI request timed out\n");
334c349dbc7Sjsg return -ETIMEDOUT;
335c349dbc7Sjsg }
336c349dbc7Sjsg
337c349dbc7Sjsg scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >>
338c349dbc7Sjsg SWSCI_SCIC_EXIT_STATUS_SHIFT;
339c349dbc7Sjsg
340c349dbc7Sjsg /* Note: scic == 0 is an error! */
341c349dbc7Sjsg if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) {
342c349dbc7Sjsg drm_dbg(&dev_priv->drm, "SWSCI request error %u\n", scic);
343c349dbc7Sjsg return -EIO;
344c349dbc7Sjsg }
345c349dbc7Sjsg
346c349dbc7Sjsg if (parm_out)
347c349dbc7Sjsg *parm_out = swsci->parm;
348c349dbc7Sjsg
349c349dbc7Sjsg return 0;
350c349dbc7Sjsg
351c349dbc7Sjsg #undef C
352c349dbc7Sjsg }
353c349dbc7Sjsg
354c349dbc7Sjsg #define DISPLAY_TYPE_CRT 0
355c349dbc7Sjsg #define DISPLAY_TYPE_TV 1
356c349dbc7Sjsg #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2
357c349dbc7Sjsg #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3
358c349dbc7Sjsg
intel_opregion_notify_encoder(struct intel_encoder * intel_encoder,bool enable)359c349dbc7Sjsg int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
360c349dbc7Sjsg bool enable)
361c349dbc7Sjsg {
362c349dbc7Sjsg struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
363c349dbc7Sjsg u32 parm = 0;
364c349dbc7Sjsg u32 type = 0;
365c349dbc7Sjsg u32 port;
3661bb76ff1Sjsg int ret;
367c349dbc7Sjsg
368c349dbc7Sjsg /* don't care about old stuff for now */
369c349dbc7Sjsg if (!HAS_DDI(dev_priv))
370c349dbc7Sjsg return 0;
371c349dbc7Sjsg
3721bb76ff1Sjsg /* Avoid port out of bounds checks if SWSCI isn't there. */
3731bb76ff1Sjsg ret = check_swsci_function(dev_priv, SWSCI_SBCB_DISPLAY_POWER_STATE);
3741bb76ff1Sjsg if (ret)
3751bb76ff1Sjsg return ret;
3761bb76ff1Sjsg
377c349dbc7Sjsg if (intel_encoder->type == INTEL_OUTPUT_DSI)
378c349dbc7Sjsg port = 0;
379c349dbc7Sjsg else
380c349dbc7Sjsg port = intel_encoder->port;
381c349dbc7Sjsg
382c349dbc7Sjsg if (port == PORT_E) {
383c349dbc7Sjsg port = 0;
384c349dbc7Sjsg } else {
385c349dbc7Sjsg parm |= 1 << port;
386c349dbc7Sjsg port++;
387c349dbc7Sjsg }
388c349dbc7Sjsg
3892e7e0e65Sjsg /*
3902e7e0e65Sjsg * The port numbering and mapping here is bizarre. The now-obsolete
3912e7e0e65Sjsg * swsci spec supports ports numbered [0..4]. Port E is handled as a
3922e7e0e65Sjsg * special case, but port F and beyond are not. The functionality is
3932e7e0e65Sjsg * supposed to be obsolete for new platforms. Just bail out if the port
3942e7e0e65Sjsg * number is out of bounds after mapping.
3952e7e0e65Sjsg */
3962e7e0e65Sjsg if (port > 4) {
3972e7e0e65Sjsg drm_dbg_kms(&dev_priv->drm,
3982e7e0e65Sjsg "[ENCODER:%d:%s] port %c (index %u) out of bounds for display power state notification\n",
3992e7e0e65Sjsg intel_encoder->base.base.id, intel_encoder->base.name,
4002e7e0e65Sjsg port_name(intel_encoder->port), port);
4012e7e0e65Sjsg return -EINVAL;
4022e7e0e65Sjsg }
4032e7e0e65Sjsg
404c349dbc7Sjsg if (!enable)
405c349dbc7Sjsg parm |= 4 << 8;
406c349dbc7Sjsg
407c349dbc7Sjsg switch (intel_encoder->type) {
408c349dbc7Sjsg case INTEL_OUTPUT_ANALOG:
409c349dbc7Sjsg type = DISPLAY_TYPE_CRT;
410c349dbc7Sjsg break;
411c349dbc7Sjsg case INTEL_OUTPUT_DDI:
412c349dbc7Sjsg case INTEL_OUTPUT_DP:
413c349dbc7Sjsg case INTEL_OUTPUT_HDMI:
414c349dbc7Sjsg case INTEL_OUTPUT_DP_MST:
415c349dbc7Sjsg type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL;
416c349dbc7Sjsg break;
417c349dbc7Sjsg case INTEL_OUTPUT_EDP:
418c349dbc7Sjsg case INTEL_OUTPUT_DSI:
419c349dbc7Sjsg type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL;
420c349dbc7Sjsg break;
421c349dbc7Sjsg default:
422c349dbc7Sjsg drm_WARN_ONCE(&dev_priv->drm, 1,
423c349dbc7Sjsg "unsupported intel_encoder type %d\n",
424c349dbc7Sjsg intel_encoder->type);
425c349dbc7Sjsg return -EINVAL;
426c349dbc7Sjsg }
427c349dbc7Sjsg
428c349dbc7Sjsg parm |= type << (16 + port * 3);
429c349dbc7Sjsg
430c349dbc7Sjsg return swsci(dev_priv, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL);
431c349dbc7Sjsg }
432c349dbc7Sjsg
433c349dbc7Sjsg static const struct {
434c349dbc7Sjsg pci_power_t pci_power_state;
435c349dbc7Sjsg u32 parm;
436c349dbc7Sjsg } power_state_map[] = {
437c349dbc7Sjsg { PCI_D0, 0x00 },
438c349dbc7Sjsg { PCI_D1, 0x01 },
439c349dbc7Sjsg { PCI_D2, 0x02 },
440c349dbc7Sjsg { PCI_D3hot, 0x04 },
441c349dbc7Sjsg { PCI_D3cold, 0x04 },
442c349dbc7Sjsg };
443c349dbc7Sjsg
intel_opregion_notify_adapter(struct drm_i915_private * dev_priv,pci_power_t state)444c349dbc7Sjsg int intel_opregion_notify_adapter(struct drm_i915_private *dev_priv,
445c349dbc7Sjsg pci_power_t state)
446c349dbc7Sjsg {
447c349dbc7Sjsg int i;
448c349dbc7Sjsg
449c349dbc7Sjsg if (!HAS_DDI(dev_priv))
450c349dbc7Sjsg return 0;
451c349dbc7Sjsg
452c349dbc7Sjsg for (i = 0; i < ARRAY_SIZE(power_state_map); i++) {
453c349dbc7Sjsg if (state == power_state_map[i].pci_power_state)
454c349dbc7Sjsg return swsci(dev_priv, SWSCI_SBCB_ADAPTER_POWER_STATE,
455c349dbc7Sjsg power_state_map[i].parm, NULL);
456c349dbc7Sjsg }
457c349dbc7Sjsg
458c349dbc7Sjsg return -EINVAL;
459c349dbc7Sjsg }
460c349dbc7Sjsg
asle_set_backlight(struct drm_i915_private * dev_priv,u32 bclp)461c349dbc7Sjsg static u32 asle_set_backlight(struct drm_i915_private *dev_priv, u32 bclp)
462c349dbc7Sjsg {
463c349dbc7Sjsg struct intel_connector *connector;
464c349dbc7Sjsg struct drm_connector_list_iter conn_iter;
4651bb76ff1Sjsg struct opregion_asle *asle = dev_priv->display.opregion.asle;
466c349dbc7Sjsg
467c349dbc7Sjsg drm_dbg(&dev_priv->drm, "bclp = 0x%08x\n", bclp);
468c349dbc7Sjsg
469c349dbc7Sjsg #ifdef __linux__
470c349dbc7Sjsg if (acpi_video_get_backlight_type() == acpi_backlight_native) {
471c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
472c349dbc7Sjsg "opregion backlight request ignored\n");
473c349dbc7Sjsg return 0;
474c349dbc7Sjsg }
475c349dbc7Sjsg #endif
476c349dbc7Sjsg
477c349dbc7Sjsg if (!(bclp & ASLE_BCLP_VALID))
478c349dbc7Sjsg return ASLC_BACKLIGHT_FAILED;
479c349dbc7Sjsg
480c349dbc7Sjsg bclp &= ASLE_BCLP_MSK;
481c349dbc7Sjsg if (bclp > 255)
482c349dbc7Sjsg return ASLC_BACKLIGHT_FAILED;
483c349dbc7Sjsg
484*f005ef32Sjsg drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, NULL);
485c349dbc7Sjsg
486c349dbc7Sjsg /*
487c349dbc7Sjsg * Update backlight on all connectors that support backlight (usually
488c349dbc7Sjsg * only one).
489c349dbc7Sjsg */
490c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm, "updating opregion backlight %d/255\n",
491c349dbc7Sjsg bclp);
492*f005ef32Sjsg drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
493c349dbc7Sjsg for_each_intel_connector_iter(connector, &conn_iter)
4941bb76ff1Sjsg intel_backlight_set_acpi(connector->base.state, bclp, 255);
495c349dbc7Sjsg drm_connector_list_iter_end(&conn_iter);
496c349dbc7Sjsg asle->cblv = DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID;
497c349dbc7Sjsg
498*f005ef32Sjsg drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex);
499c349dbc7Sjsg
500c349dbc7Sjsg
501c349dbc7Sjsg return 0;
502c349dbc7Sjsg }
503c349dbc7Sjsg
asle_set_als_illum(struct drm_i915_private * dev_priv,u32 alsi)504c349dbc7Sjsg static u32 asle_set_als_illum(struct drm_i915_private *dev_priv, u32 alsi)
505c349dbc7Sjsg {
506c349dbc7Sjsg /* alsi is the current ALS reading in lux. 0 indicates below sensor
507c349dbc7Sjsg range, 0xffff indicates above sensor range. 1-0xfffe are valid */
508c349dbc7Sjsg drm_dbg(&dev_priv->drm, "Illum is not supported\n");
509c349dbc7Sjsg return ASLC_ALS_ILLUM_FAILED;
510c349dbc7Sjsg }
511c349dbc7Sjsg
asle_set_pwm_freq(struct drm_i915_private * dev_priv,u32 pfmb)512c349dbc7Sjsg static u32 asle_set_pwm_freq(struct drm_i915_private *dev_priv, u32 pfmb)
513c349dbc7Sjsg {
514c349dbc7Sjsg drm_dbg(&dev_priv->drm, "PWM freq is not supported\n");
515c349dbc7Sjsg return ASLC_PWM_FREQ_FAILED;
516c349dbc7Sjsg }
517c349dbc7Sjsg
asle_set_pfit(struct drm_i915_private * dev_priv,u32 pfit)518c349dbc7Sjsg static u32 asle_set_pfit(struct drm_i915_private *dev_priv, u32 pfit)
519c349dbc7Sjsg {
520c349dbc7Sjsg /* Panel fitting is currently controlled by the X code, so this is a
521c349dbc7Sjsg noop until modesetting support works fully */
522c349dbc7Sjsg drm_dbg(&dev_priv->drm, "Pfit is not supported\n");
523c349dbc7Sjsg return ASLC_PFIT_FAILED;
524c349dbc7Sjsg }
525c349dbc7Sjsg
asle_set_supported_rotation_angles(struct drm_i915_private * dev_priv,u32 srot)526c349dbc7Sjsg static u32 asle_set_supported_rotation_angles(struct drm_i915_private *dev_priv, u32 srot)
527c349dbc7Sjsg {
528c349dbc7Sjsg drm_dbg(&dev_priv->drm, "SROT is not supported\n");
529c349dbc7Sjsg return ASLC_ROTATION_ANGLES_FAILED;
530c349dbc7Sjsg }
531c349dbc7Sjsg
asle_set_button_array(struct drm_i915_private * dev_priv,u32 iuer)532c349dbc7Sjsg static u32 asle_set_button_array(struct drm_i915_private *dev_priv, u32 iuer)
533c349dbc7Sjsg {
534c349dbc7Sjsg if (!iuer)
535c349dbc7Sjsg drm_dbg(&dev_priv->drm,
536c349dbc7Sjsg "Button array event is not supported (nothing)\n");
537c349dbc7Sjsg if (iuer & ASLE_IUER_ROTATION_LOCK_BTN)
538c349dbc7Sjsg drm_dbg(&dev_priv->drm,
539c349dbc7Sjsg "Button array event is not supported (rotation lock)\n");
540c349dbc7Sjsg if (iuer & ASLE_IUER_VOLUME_DOWN_BTN)
541c349dbc7Sjsg drm_dbg(&dev_priv->drm,
542c349dbc7Sjsg "Button array event is not supported (volume down)\n");
543c349dbc7Sjsg if (iuer & ASLE_IUER_VOLUME_UP_BTN)
544c349dbc7Sjsg drm_dbg(&dev_priv->drm,
545c349dbc7Sjsg "Button array event is not supported (volume up)\n");
546c349dbc7Sjsg if (iuer & ASLE_IUER_WINDOWS_BTN)
547c349dbc7Sjsg drm_dbg(&dev_priv->drm,
548c349dbc7Sjsg "Button array event is not supported (windows)\n");
549c349dbc7Sjsg if (iuer & ASLE_IUER_POWER_BTN)
550c349dbc7Sjsg drm_dbg(&dev_priv->drm,
551c349dbc7Sjsg "Button array event is not supported (power)\n");
552c349dbc7Sjsg
553c349dbc7Sjsg return ASLC_BUTTON_ARRAY_FAILED;
554c349dbc7Sjsg }
555c349dbc7Sjsg
asle_set_convertible(struct drm_i915_private * dev_priv,u32 iuer)556c349dbc7Sjsg static u32 asle_set_convertible(struct drm_i915_private *dev_priv, u32 iuer)
557c349dbc7Sjsg {
558c349dbc7Sjsg if (iuer & ASLE_IUER_CONVERTIBLE)
559c349dbc7Sjsg drm_dbg(&dev_priv->drm,
560c349dbc7Sjsg "Convertible is not supported (clamshell)\n");
561c349dbc7Sjsg else
562c349dbc7Sjsg drm_dbg(&dev_priv->drm,
563c349dbc7Sjsg "Convertible is not supported (slate)\n");
564c349dbc7Sjsg
565c349dbc7Sjsg return ASLC_CONVERTIBLE_FAILED;
566c349dbc7Sjsg }
567c349dbc7Sjsg
asle_set_docking(struct drm_i915_private * dev_priv,u32 iuer)568c349dbc7Sjsg static u32 asle_set_docking(struct drm_i915_private *dev_priv, u32 iuer)
569c349dbc7Sjsg {
570c349dbc7Sjsg if (iuer & ASLE_IUER_DOCKING)
571c349dbc7Sjsg drm_dbg(&dev_priv->drm, "Docking is not supported (docked)\n");
572c349dbc7Sjsg else
573c349dbc7Sjsg drm_dbg(&dev_priv->drm,
574c349dbc7Sjsg "Docking is not supported (undocked)\n");
575c349dbc7Sjsg
576c349dbc7Sjsg return ASLC_DOCKING_FAILED;
577c349dbc7Sjsg }
578c349dbc7Sjsg
asle_isct_state(struct drm_i915_private * dev_priv)579c349dbc7Sjsg static u32 asle_isct_state(struct drm_i915_private *dev_priv)
580c349dbc7Sjsg {
581c349dbc7Sjsg drm_dbg(&dev_priv->drm, "ISCT is not supported\n");
582c349dbc7Sjsg return ASLC_ISCT_STATE_FAILED;
583c349dbc7Sjsg }
584c349dbc7Sjsg
asle_work(struct work_struct * work)585c349dbc7Sjsg static void asle_work(struct work_struct *work)
586c349dbc7Sjsg {
587c349dbc7Sjsg struct intel_opregion *opregion =
588c349dbc7Sjsg container_of(work, struct intel_opregion, asle_work);
589c349dbc7Sjsg struct drm_i915_private *dev_priv =
5901bb76ff1Sjsg container_of(opregion, struct drm_i915_private, display.opregion);
5911bb76ff1Sjsg struct opregion_asle *asle = dev_priv->display.opregion.asle;
592c349dbc7Sjsg u32 aslc_stat = 0;
593c349dbc7Sjsg u32 aslc_req;
594c349dbc7Sjsg
595c349dbc7Sjsg if (!asle)
596c349dbc7Sjsg return;
597c349dbc7Sjsg
598c349dbc7Sjsg aslc_req = asle->aslc;
599c349dbc7Sjsg
600c349dbc7Sjsg if (!(aslc_req & ASLC_REQ_MSK)) {
601c349dbc7Sjsg drm_dbg(&dev_priv->drm,
602c349dbc7Sjsg "No request on ASLC interrupt 0x%08x\n", aslc_req);
603c349dbc7Sjsg return;
604c349dbc7Sjsg }
605c349dbc7Sjsg
606c349dbc7Sjsg if (aslc_req & ASLC_SET_ALS_ILLUM)
607c349dbc7Sjsg aslc_stat |= asle_set_als_illum(dev_priv, asle->alsi);
608c349dbc7Sjsg
609c349dbc7Sjsg if (aslc_req & ASLC_SET_BACKLIGHT)
610c349dbc7Sjsg aslc_stat |= asle_set_backlight(dev_priv, asle->bclp);
611c349dbc7Sjsg
612c349dbc7Sjsg if (aslc_req & ASLC_SET_PFIT)
613c349dbc7Sjsg aslc_stat |= asle_set_pfit(dev_priv, asle->pfit);
614c349dbc7Sjsg
615c349dbc7Sjsg if (aslc_req & ASLC_SET_PWM_FREQ)
616c349dbc7Sjsg aslc_stat |= asle_set_pwm_freq(dev_priv, asle->pfmb);
617c349dbc7Sjsg
618c349dbc7Sjsg if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES)
619c349dbc7Sjsg aslc_stat |= asle_set_supported_rotation_angles(dev_priv,
620c349dbc7Sjsg asle->srot);
621c349dbc7Sjsg
622c349dbc7Sjsg if (aslc_req & ASLC_BUTTON_ARRAY)
623c349dbc7Sjsg aslc_stat |= asle_set_button_array(dev_priv, asle->iuer);
624c349dbc7Sjsg
625c349dbc7Sjsg if (aslc_req & ASLC_CONVERTIBLE_INDICATOR)
626c349dbc7Sjsg aslc_stat |= asle_set_convertible(dev_priv, asle->iuer);
627c349dbc7Sjsg
628c349dbc7Sjsg if (aslc_req & ASLC_DOCKING_INDICATOR)
629c349dbc7Sjsg aslc_stat |= asle_set_docking(dev_priv, asle->iuer);
630c349dbc7Sjsg
631c349dbc7Sjsg if (aslc_req & ASLC_ISCT_STATE_CHANGE)
632c349dbc7Sjsg aslc_stat |= asle_isct_state(dev_priv);
633c349dbc7Sjsg
634c349dbc7Sjsg asle->aslc = aslc_stat;
635c349dbc7Sjsg }
636c349dbc7Sjsg
intel_opregion_asle_intr(struct drm_i915_private * dev_priv)637c349dbc7Sjsg void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
638c349dbc7Sjsg {
6391bb76ff1Sjsg if (dev_priv->display.opregion.asle)
640*f005ef32Sjsg queue_work(dev_priv->unordered_wq,
641*f005ef32Sjsg &dev_priv->display.opregion.asle_work);
642c349dbc7Sjsg }
643c349dbc7Sjsg
644c349dbc7Sjsg #define ACPI_EV_DISPLAY_SWITCH (1<<0)
645c349dbc7Sjsg #define ACPI_EV_LID (1<<1)
646c349dbc7Sjsg #define ACPI_EV_DOCK (1<<2)
647c349dbc7Sjsg
648c349dbc7Sjsg #ifdef notyet
649c349dbc7Sjsg
650c349dbc7Sjsg /*
651c349dbc7Sjsg * The only video events relevant to opregion are 0x80. These indicate either a
652c349dbc7Sjsg * docking event, lid switch or display switch request. In Linux, these are
653c349dbc7Sjsg * handled by the dock, button and video drivers.
654c349dbc7Sjsg */
intel_opregion_video_event(struct notifier_block * nb,unsigned long val,void * data)655c349dbc7Sjsg static int intel_opregion_video_event(struct notifier_block *nb,
656c349dbc7Sjsg unsigned long val, void *data)
657c349dbc7Sjsg {
658c349dbc7Sjsg struct intel_opregion *opregion = container_of(nb, struct intel_opregion,
659c349dbc7Sjsg acpi_notifier);
660c349dbc7Sjsg struct acpi_bus_event *event = data;
661c349dbc7Sjsg struct opregion_acpi *acpi;
662c349dbc7Sjsg int ret = NOTIFY_OK;
663c349dbc7Sjsg
664c349dbc7Sjsg if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
665c349dbc7Sjsg return NOTIFY_DONE;
666c349dbc7Sjsg
667c349dbc7Sjsg acpi = opregion->acpi;
668c349dbc7Sjsg
669c349dbc7Sjsg if (event->type == 0x80 && ((acpi->cevt & 1) == 0))
670c349dbc7Sjsg ret = NOTIFY_BAD;
671c349dbc7Sjsg
672c349dbc7Sjsg acpi->csts = 0;
673c349dbc7Sjsg
674c349dbc7Sjsg return ret;
675c349dbc7Sjsg }
676c349dbc7Sjsg
677c349dbc7Sjsg /*
678c349dbc7Sjsg * Initialise the DIDL field in opregion. This passes a list of devices to
679c349dbc7Sjsg * the firmware. Values are defined by section B.4.2 of the ACPI specification
680c349dbc7Sjsg * (version 3)
681c349dbc7Sjsg */
682c349dbc7Sjsg
set_did(struct intel_opregion * opregion,int i,u32 val)683c349dbc7Sjsg static void set_did(struct intel_opregion *opregion, int i, u32 val)
684c349dbc7Sjsg {
685c349dbc7Sjsg if (i < ARRAY_SIZE(opregion->acpi->didl)) {
686c349dbc7Sjsg opregion->acpi->didl[i] = val;
687c349dbc7Sjsg } else {
688c349dbc7Sjsg i -= ARRAY_SIZE(opregion->acpi->didl);
689c349dbc7Sjsg
690c349dbc7Sjsg if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2)))
691c349dbc7Sjsg return;
692c349dbc7Sjsg
693c349dbc7Sjsg opregion->acpi->did2[i] = val;
694c349dbc7Sjsg }
695c349dbc7Sjsg }
696c349dbc7Sjsg
intel_didl_outputs(struct drm_i915_private * dev_priv)697c349dbc7Sjsg static void intel_didl_outputs(struct drm_i915_private *dev_priv)
698c349dbc7Sjsg {
6991bb76ff1Sjsg struct intel_opregion *opregion = &dev_priv->display.opregion;
700c349dbc7Sjsg struct intel_connector *connector;
701c349dbc7Sjsg struct drm_connector_list_iter conn_iter;
702c349dbc7Sjsg int i = 0, max_outputs;
703c349dbc7Sjsg
704c349dbc7Sjsg /*
705c349dbc7Sjsg * In theory, did2, the extended didl, gets added at opregion version
706c349dbc7Sjsg * 3.0. In practice, however, we're supposed to set it for earlier
707c349dbc7Sjsg * versions as well, since a BIOS that doesn't understand did2 should
708c349dbc7Sjsg * not look at it anyway. Use a variable so we can tweak this if a need
709c349dbc7Sjsg * arises later.
710c349dbc7Sjsg */
711c349dbc7Sjsg max_outputs = ARRAY_SIZE(opregion->acpi->didl) +
712c349dbc7Sjsg ARRAY_SIZE(opregion->acpi->did2);
713c349dbc7Sjsg
714c349dbc7Sjsg intel_acpi_device_id_update(dev_priv);
715c349dbc7Sjsg
716c349dbc7Sjsg drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
717c349dbc7Sjsg for_each_intel_connector_iter(connector, &conn_iter) {
718c349dbc7Sjsg if (i < max_outputs)
719c349dbc7Sjsg set_did(opregion, i, connector->acpi_device_id);
720c349dbc7Sjsg i++;
721c349dbc7Sjsg }
722c349dbc7Sjsg drm_connector_list_iter_end(&conn_iter);
723c349dbc7Sjsg
724c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm, "%d outputs detected\n", i);
725c349dbc7Sjsg
726c349dbc7Sjsg if (i > max_outputs)
727c349dbc7Sjsg drm_err(&dev_priv->drm,
728c349dbc7Sjsg "More than %d outputs in connector list\n",
729c349dbc7Sjsg max_outputs);
730c349dbc7Sjsg
731c349dbc7Sjsg /* If fewer than max outputs, the list must be null terminated */
732c349dbc7Sjsg if (i < max_outputs)
733c349dbc7Sjsg set_did(opregion, i, 0);
734c349dbc7Sjsg }
735c349dbc7Sjsg
intel_setup_cadls(struct drm_i915_private * dev_priv)736c349dbc7Sjsg static void intel_setup_cadls(struct drm_i915_private *dev_priv)
737c349dbc7Sjsg {
7381bb76ff1Sjsg struct intel_opregion *opregion = &dev_priv->display.opregion;
739c349dbc7Sjsg struct intel_connector *connector;
740c349dbc7Sjsg struct drm_connector_list_iter conn_iter;
741c349dbc7Sjsg int i = 0;
742c349dbc7Sjsg
743c349dbc7Sjsg /*
744c349dbc7Sjsg * Initialize the CADL field from the connector device ids. This is
745c349dbc7Sjsg * essentially the same as copying from the DIDL. Technically, this is
746c349dbc7Sjsg * not always correct as display outputs may exist, but not active. This
747c349dbc7Sjsg * initialization is necessary for some Clevo laptops that check this
748c349dbc7Sjsg * field before processing the brightness and display switching hotkeys.
749c349dbc7Sjsg *
750c349dbc7Sjsg * Note that internal panels should be at the front of the connector
751c349dbc7Sjsg * list already, ensuring they're not left out.
752c349dbc7Sjsg */
753c349dbc7Sjsg drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
754c349dbc7Sjsg for_each_intel_connector_iter(connector, &conn_iter) {
755c349dbc7Sjsg if (i >= ARRAY_SIZE(opregion->acpi->cadl))
756c349dbc7Sjsg break;
757c349dbc7Sjsg opregion->acpi->cadl[i++] = connector->acpi_device_id;
758c349dbc7Sjsg }
759c349dbc7Sjsg drm_connector_list_iter_end(&conn_iter);
760c349dbc7Sjsg
761c349dbc7Sjsg /* If fewer than 8 active devices, the list must be null terminated */
762c349dbc7Sjsg if (i < ARRAY_SIZE(opregion->acpi->cadl))
763c349dbc7Sjsg opregion->acpi->cadl[i] = 0;
764c349dbc7Sjsg }
765c349dbc7Sjsg
766c349dbc7Sjsg #endif
767c349dbc7Sjsg
swsci_setup(struct drm_i915_private * dev_priv)768c349dbc7Sjsg static void swsci_setup(struct drm_i915_private *dev_priv)
769c349dbc7Sjsg {
7701bb76ff1Sjsg struct intel_opregion *opregion = &dev_priv->display.opregion;
771c349dbc7Sjsg bool requested_callbacks = false;
772c349dbc7Sjsg u32 tmp;
773c349dbc7Sjsg
774c349dbc7Sjsg /* Sub-function code 0 is okay, let's allow them. */
775c349dbc7Sjsg opregion->swsci_gbda_sub_functions = 1;
776c349dbc7Sjsg opregion->swsci_sbcb_sub_functions = 1;
777c349dbc7Sjsg
778c349dbc7Sjsg /* We use GBDA to ask for supported GBDA calls. */
779c349dbc7Sjsg if (swsci(dev_priv, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) {
780c349dbc7Sjsg /* make the bits match the sub-function codes */
781c349dbc7Sjsg tmp <<= 1;
782c349dbc7Sjsg opregion->swsci_gbda_sub_functions |= tmp;
783c349dbc7Sjsg }
784c349dbc7Sjsg
785c349dbc7Sjsg /*
786c349dbc7Sjsg * We also use GBDA to ask for _requested_ SBCB callbacks. The driver
787c349dbc7Sjsg * must not call interfaces that are not specifically requested by the
788c349dbc7Sjsg * bios.
789c349dbc7Sjsg */
790c349dbc7Sjsg if (swsci(dev_priv, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) {
791c349dbc7Sjsg /* here, the bits already match sub-function codes */
792c349dbc7Sjsg opregion->swsci_sbcb_sub_functions |= tmp;
793c349dbc7Sjsg requested_callbacks = true;
794c349dbc7Sjsg }
795c349dbc7Sjsg
796c349dbc7Sjsg /*
797c349dbc7Sjsg * But we use SBCB to ask for _supported_ SBCB calls. This does not mean
798c349dbc7Sjsg * the callback is _requested_. But we still can't call interfaces that
799c349dbc7Sjsg * are not requested.
800c349dbc7Sjsg */
801c349dbc7Sjsg if (swsci(dev_priv, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) {
802c349dbc7Sjsg /* make the bits match the sub-function codes */
803c349dbc7Sjsg u32 low = tmp & 0x7ff;
804c349dbc7Sjsg u32 high = tmp & ~0xfff; /* bit 11 is reserved */
805c349dbc7Sjsg tmp = (high << 4) | (low << 1) | 1;
806c349dbc7Sjsg
807c349dbc7Sjsg /* best guess what to do with supported wrt requested */
808c349dbc7Sjsg if (requested_callbacks) {
809c349dbc7Sjsg u32 req = opregion->swsci_sbcb_sub_functions;
810c349dbc7Sjsg if ((req & tmp) != req)
811c349dbc7Sjsg drm_dbg(&dev_priv->drm,
812c349dbc7Sjsg "SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n",
813c349dbc7Sjsg req, tmp);
814c349dbc7Sjsg /* XXX: for now, trust the requested callbacks */
815c349dbc7Sjsg /* opregion->swsci_sbcb_sub_functions &= tmp; */
816c349dbc7Sjsg } else {
817c349dbc7Sjsg opregion->swsci_sbcb_sub_functions |= tmp;
818c349dbc7Sjsg }
819c349dbc7Sjsg }
820c349dbc7Sjsg
821c349dbc7Sjsg drm_dbg(&dev_priv->drm,
822c349dbc7Sjsg "SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n",
823c349dbc7Sjsg opregion->swsci_gbda_sub_functions,
824c349dbc7Sjsg opregion->swsci_sbcb_sub_functions);
825c349dbc7Sjsg }
826c349dbc7Sjsg
intel_no_opregion_vbt_callback(const struct dmi_system_id * id)827c349dbc7Sjsg static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
828c349dbc7Sjsg {
829c349dbc7Sjsg DRM_DEBUG_KMS("Falling back to manually reading VBT from "
830c349dbc7Sjsg "VBIOS ROM for %s\n", id->ident);
831c349dbc7Sjsg return 1;
832c349dbc7Sjsg }
833c349dbc7Sjsg
834c349dbc7Sjsg static const struct dmi_system_id intel_no_opregion_vbt[] = {
835c349dbc7Sjsg {
836c349dbc7Sjsg .callback = intel_no_opregion_vbt_callback,
837c349dbc7Sjsg .ident = "ThinkCentre A57",
838c349dbc7Sjsg .matches = {
839c349dbc7Sjsg DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
840c349dbc7Sjsg DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
841c349dbc7Sjsg },
842c349dbc7Sjsg },
843c349dbc7Sjsg { }
844c349dbc7Sjsg };
845c349dbc7Sjsg
intel_load_vbt_firmware(struct drm_i915_private * dev_priv)846c349dbc7Sjsg static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
847c349dbc7Sjsg {
8481bb76ff1Sjsg struct intel_opregion *opregion = &dev_priv->display.opregion;
849c349dbc7Sjsg const struct firmware *fw = NULL;
850ad8b1aafSjsg const char *name = dev_priv->params.vbt_firmware;
851c349dbc7Sjsg int ret;
852c349dbc7Sjsg
853c349dbc7Sjsg if (!name || !*name)
854c349dbc7Sjsg return -ENOENT;
855c349dbc7Sjsg
856c349dbc7Sjsg #ifdef __linux__
8575ca02815Sjsg ret = request_firmware(&fw, name, dev_priv->drm.dev);
858c349dbc7Sjsg #else
859c349dbc7Sjsg ret = request_firmware(&fw, name, NULL);
860c349dbc7Sjsg #endif
861c349dbc7Sjsg if (ret) {
862c349dbc7Sjsg drm_err(&dev_priv->drm,
863c349dbc7Sjsg "Requesting VBT firmware \"%s\" failed (%d)\n",
864c349dbc7Sjsg name, ret);
865c349dbc7Sjsg return ret;
866c349dbc7Sjsg }
867c349dbc7Sjsg
868c349dbc7Sjsg if (intel_bios_is_valid_vbt(fw->data, fw->size)) {
869c349dbc7Sjsg opregion->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL);
870c349dbc7Sjsg if (opregion->vbt_firmware) {
871c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
872c349dbc7Sjsg "Found valid VBT firmware \"%s\"\n", name);
873c349dbc7Sjsg opregion->vbt = opregion->vbt_firmware;
874c349dbc7Sjsg opregion->vbt_size = fw->size;
875c349dbc7Sjsg ret = 0;
876c349dbc7Sjsg } else {
877c349dbc7Sjsg ret = -ENOMEM;
878c349dbc7Sjsg }
879c349dbc7Sjsg } else {
880c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n",
881c349dbc7Sjsg name);
882c349dbc7Sjsg ret = -EINVAL;
883c349dbc7Sjsg }
884c349dbc7Sjsg
885c349dbc7Sjsg release_firmware(fw);
886c349dbc7Sjsg
887c349dbc7Sjsg return ret;
888c349dbc7Sjsg }
889c349dbc7Sjsg
intel_opregion_setup(struct drm_i915_private * dev_priv)890c349dbc7Sjsg int intel_opregion_setup(struct drm_i915_private *dev_priv)
891c349dbc7Sjsg {
8921bb76ff1Sjsg struct intel_opregion *opregion = &dev_priv->display.opregion;
893c349dbc7Sjsg struct pci_dev *pdev = dev_priv->drm.pdev;
894c349dbc7Sjsg u32 asls, mboxes;
895c349dbc7Sjsg char buf[sizeof(OPREGION_SIGNATURE)];
896c349dbc7Sjsg int err = 0;
897c349dbc7Sjsg void *base;
898c349dbc7Sjsg const void *vbt;
899c349dbc7Sjsg u32 vbt_size;
900c349dbc7Sjsg
901c349dbc7Sjsg BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100);
902c349dbc7Sjsg BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100);
903c349dbc7Sjsg BUILD_BUG_ON(sizeof(struct opregion_swsci) != 0x100);
904c349dbc7Sjsg BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100);
905c349dbc7Sjsg BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400);
906c349dbc7Sjsg
907c349dbc7Sjsg pci_read_config_dword(pdev, ASLS, &asls);
908c349dbc7Sjsg drm_dbg(&dev_priv->drm, "graphic opregion physical addr: 0x%x\n",
909c349dbc7Sjsg asls);
910c349dbc7Sjsg if (asls == 0) {
911c349dbc7Sjsg drm_dbg(&dev_priv->drm, "ACPI OpRegion not supported!\n");
912c349dbc7Sjsg return -ENOTSUPP;
913c349dbc7Sjsg }
914c349dbc7Sjsg
915c349dbc7Sjsg INIT_WORK(&opregion->asle_work, asle_work);
916c349dbc7Sjsg
917c349dbc7Sjsg #ifdef __linux__
918c349dbc7Sjsg base = memremap(asls, OPREGION_SIZE, MEMREMAP_WB);
919c349dbc7Sjsg if (!base)
920c349dbc7Sjsg return -ENOMEM;
921c349dbc7Sjsg #else
922c349dbc7Sjsg if (bus_space_map(dev_priv->bst, asls, OPREGION_SIZE,
923c349dbc7Sjsg BUS_SPACE_MAP_LINEAR, &dev_priv->opregion_ioh))
924c349dbc7Sjsg return -ENOMEM;
925c349dbc7Sjsg base = bus_space_vaddr(dev_priv->bst, dev_priv->opregion_ioh);
926c349dbc7Sjsg #endif
927c349dbc7Sjsg
928c349dbc7Sjsg memcpy(buf, base, sizeof(buf));
929c349dbc7Sjsg
930c349dbc7Sjsg if (memcmp(buf, OPREGION_SIGNATURE, 16)) {
931c349dbc7Sjsg drm_dbg(&dev_priv->drm, "opregion signature mismatch\n");
932c349dbc7Sjsg err = -EINVAL;
933c349dbc7Sjsg goto err_out;
934c349dbc7Sjsg }
935c349dbc7Sjsg opregion->header = base;
936c349dbc7Sjsg opregion->lid_state = base + ACPI_CLID;
937c349dbc7Sjsg
938c349dbc7Sjsg drm_dbg(&dev_priv->drm, "ACPI OpRegion version %u.%u.%u\n",
939c349dbc7Sjsg opregion->header->over.major,
940c349dbc7Sjsg opregion->header->over.minor,
941c349dbc7Sjsg opregion->header->over.revision);
942c349dbc7Sjsg
943c349dbc7Sjsg mboxes = opregion->header->mboxes;
944c349dbc7Sjsg if (mboxes & MBOX_ACPI) {
945c349dbc7Sjsg drm_dbg(&dev_priv->drm, "Public ACPI methods supported\n");
946c349dbc7Sjsg opregion->acpi = base + OPREGION_ACPI_OFFSET;
947c349dbc7Sjsg /*
948c349dbc7Sjsg * Indicate we handle monitor hotplug events ourselves so we do
949c349dbc7Sjsg * not need ACPI notifications for them. Disabling these avoids
950c349dbc7Sjsg * triggering the AML code doing the notifation, which may be
951c349dbc7Sjsg * broken as Windows also seems to disable these.
952c349dbc7Sjsg */
953c349dbc7Sjsg opregion->acpi->chpd = 1;
954c349dbc7Sjsg }
955c349dbc7Sjsg
956c349dbc7Sjsg if (mboxes & MBOX_SWSCI) {
9571bb76ff1Sjsg u8 major = opregion->header->over.major;
9581bb76ff1Sjsg
9591bb76ff1Sjsg if (major >= 3) {
9601bb76ff1Sjsg drm_err(&dev_priv->drm, "SWSCI Mailbox #2 present for opregion v3.x, ignoring\n");
9611bb76ff1Sjsg } else {
9621bb76ff1Sjsg if (major >= 2)
9631bb76ff1Sjsg drm_dbg(&dev_priv->drm, "SWSCI Mailbox #2 present for opregion v2.x\n");
964c349dbc7Sjsg drm_dbg(&dev_priv->drm, "SWSCI supported\n");
965c349dbc7Sjsg opregion->swsci = base + OPREGION_SWSCI_OFFSET;
966c349dbc7Sjsg swsci_setup(dev_priv);
967c349dbc7Sjsg }
9681bb76ff1Sjsg }
969c349dbc7Sjsg
970c349dbc7Sjsg if (mboxes & MBOX_ASLE) {
971c349dbc7Sjsg drm_dbg(&dev_priv->drm, "ASLE supported\n");
972c349dbc7Sjsg opregion->asle = base + OPREGION_ASLE_OFFSET;
973c349dbc7Sjsg
974c349dbc7Sjsg opregion->asle->ardy = ASLE_ARDY_NOT_READY;
975c349dbc7Sjsg }
976c349dbc7Sjsg
9771bb76ff1Sjsg if (mboxes & MBOX_ASLE_EXT) {
978c349dbc7Sjsg drm_dbg(&dev_priv->drm, "ASLE extension supported\n");
9791bb76ff1Sjsg opregion->asle_ext = base + OPREGION_ASLE_EXT_OFFSET;
9801bb76ff1Sjsg }
9811bb76ff1Sjsg
9821bb76ff1Sjsg if (mboxes & MBOX_BACKLIGHT) {
9831bb76ff1Sjsg drm_dbg(&dev_priv->drm, "Mailbox #2 for backlight present\n");
9841bb76ff1Sjsg }
985c349dbc7Sjsg
986c349dbc7Sjsg if (intel_load_vbt_firmware(dev_priv) == 0)
987c349dbc7Sjsg goto out;
988c349dbc7Sjsg
989c349dbc7Sjsg if (dmi_check_system(intel_no_opregion_vbt))
990c349dbc7Sjsg goto out;
991c349dbc7Sjsg
992c349dbc7Sjsg if (opregion->header->over.major >= 2 && opregion->asle &&
993c349dbc7Sjsg opregion->asle->rvda && opregion->asle->rvds) {
994c349dbc7Sjsg resource_size_t rvda = opregion->asle->rvda;
995c349dbc7Sjsg
996c349dbc7Sjsg /*
997c349dbc7Sjsg * opregion 2.0: rvda is the physical VBT address.
998c349dbc7Sjsg *
999c349dbc7Sjsg * opregion 2.1+: rvda is unsigned, relative offset from
1000c349dbc7Sjsg * opregion base, and should never point within opregion.
1001c349dbc7Sjsg */
1002c349dbc7Sjsg if (opregion->header->over.major > 2 ||
1003c349dbc7Sjsg opregion->header->over.minor >= 1) {
1004c349dbc7Sjsg drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE);
1005c349dbc7Sjsg
1006c349dbc7Sjsg rvda += asls;
1007c349dbc7Sjsg }
1008c349dbc7Sjsg
1009c349dbc7Sjsg #ifdef __linux__
1010c349dbc7Sjsg opregion->rvda = memremap(rvda, opregion->asle->rvds,
1011c349dbc7Sjsg MEMREMAP_WB);
1012c349dbc7Sjsg #else
1013ff927e35Sjcs if (bus_space_map(dev_priv->bst, rvda, opregion->asle->rvds,
1014ff927e35Sjcs BUS_SPACE_MAP_LINEAR, &dev_priv->opregion_rvda_ioh))
1015c349dbc7Sjsg return -ENOMEM;
1016c349dbc7Sjsg opregion->rvda = bus_space_vaddr(dev_priv->bst,
1017c349dbc7Sjsg dev_priv->opregion_rvda_ioh);
1018c349dbc7Sjsg dev_priv->opregion_rvda_size = opregion->asle->rvds;
1019c349dbc7Sjsg #endif
1020c349dbc7Sjsg
1021c349dbc7Sjsg vbt = opregion->rvda;
1022c349dbc7Sjsg vbt_size = opregion->asle->rvds;
1023c349dbc7Sjsg if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
1024c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
1025c349dbc7Sjsg "Found valid VBT in ACPI OpRegion (RVDA)\n");
1026c349dbc7Sjsg opregion->vbt = vbt;
1027c349dbc7Sjsg opregion->vbt_size = vbt_size;
1028c349dbc7Sjsg goto out;
1029c349dbc7Sjsg } else {
1030c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
1031c349dbc7Sjsg "Invalid VBT in ACPI OpRegion (RVDA)\n");
1032c349dbc7Sjsg #ifdef __linux__
1033c349dbc7Sjsg memunmap(opregion->rvda);
1034c349dbc7Sjsg #else
1035c349dbc7Sjsg bus_space_unmap(dev_priv->bst, dev_priv->opregion_rvda_ioh,
1036c349dbc7Sjsg dev_priv->opregion_rvda_size);
1037c349dbc7Sjsg #endif
1038c349dbc7Sjsg opregion->rvda = NULL;
1039c349dbc7Sjsg }
1040c349dbc7Sjsg }
1041c349dbc7Sjsg
1042c349dbc7Sjsg vbt = base + OPREGION_VBT_OFFSET;
1043c349dbc7Sjsg /*
1044c349dbc7Sjsg * The VBT specification says that if the ASLE ext mailbox is not used
1045c349dbc7Sjsg * its area is reserved, but on some CHT boards the VBT extends into the
1046c349dbc7Sjsg * ASLE ext area. Allow this even though it is against the spec, so we
1047c349dbc7Sjsg * do not end up rejecting the VBT on those boards (and end up not
1048c349dbc7Sjsg * finding the LCD panel because of this).
1049c349dbc7Sjsg */
1050c349dbc7Sjsg vbt_size = (mboxes & MBOX_ASLE_EXT) ?
1051c349dbc7Sjsg OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE;
1052c349dbc7Sjsg vbt_size -= OPREGION_VBT_OFFSET;
1053c349dbc7Sjsg if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
1054c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
1055c349dbc7Sjsg "Found valid VBT in ACPI OpRegion (Mailbox #4)\n");
1056c349dbc7Sjsg opregion->vbt = vbt;
1057c349dbc7Sjsg opregion->vbt_size = vbt_size;
1058c349dbc7Sjsg } else {
1059c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
1060c349dbc7Sjsg "Invalid VBT in ACPI OpRegion (Mailbox #4)\n");
1061c349dbc7Sjsg }
1062c349dbc7Sjsg
1063c349dbc7Sjsg out:
1064c349dbc7Sjsg return 0;
1065c349dbc7Sjsg
1066c349dbc7Sjsg err_out:
1067c349dbc7Sjsg #ifdef __linux__
1068c349dbc7Sjsg memunmap(base);
1069c349dbc7Sjsg #else
1070c349dbc7Sjsg bus_space_unmap(dev_priv->bst, dev_priv->opregion_ioh, OPREGION_SIZE);
1071c349dbc7Sjsg #endif
1072c349dbc7Sjsg return err;
1073c349dbc7Sjsg }
1074c349dbc7Sjsg
intel_use_opregion_panel_type_callback(const struct dmi_system_id * id)1075c349dbc7Sjsg static int intel_use_opregion_panel_type_callback(const struct dmi_system_id *id)
1076c349dbc7Sjsg {
1077c349dbc7Sjsg DRM_INFO("Using panel type from OpRegion on %s\n", id->ident);
1078c349dbc7Sjsg return 1;
1079c349dbc7Sjsg }
1080c349dbc7Sjsg
1081c349dbc7Sjsg static const struct dmi_system_id intel_use_opregion_panel_type[] = {
1082c349dbc7Sjsg {
1083c349dbc7Sjsg .callback = intel_use_opregion_panel_type_callback,
1084c349dbc7Sjsg .ident = "Conrac GmbH IX45GM2",
1085c349dbc7Sjsg .matches = {DMI_MATCH(DMI_SYS_VENDOR, "Conrac GmbH"),
1086c349dbc7Sjsg DMI_MATCH(DMI_PRODUCT_NAME, "IX45GM2"),
1087c349dbc7Sjsg },
1088c349dbc7Sjsg },
1089c349dbc7Sjsg { }
1090c349dbc7Sjsg };
1091c349dbc7Sjsg
1092c349dbc7Sjsg int
intel_opregion_get_panel_type(struct drm_i915_private * dev_priv)1093c349dbc7Sjsg intel_opregion_get_panel_type(struct drm_i915_private *dev_priv)
1094c349dbc7Sjsg {
1095c349dbc7Sjsg u32 panel_details;
1096c349dbc7Sjsg int ret;
1097c349dbc7Sjsg
1098c349dbc7Sjsg ret = swsci(dev_priv, SWSCI_GBDA_PANEL_DETAILS, 0x0, &panel_details);
10995ca02815Sjsg if (ret)
1100c349dbc7Sjsg return ret;
1101c349dbc7Sjsg
1102c349dbc7Sjsg ret = (panel_details >> 8) & 0xff;
1103c349dbc7Sjsg if (ret > 0x10) {
1104c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
1105c349dbc7Sjsg "Invalid OpRegion panel type 0x%x\n", ret);
1106c349dbc7Sjsg return -EINVAL;
1107c349dbc7Sjsg }
1108c349dbc7Sjsg
1109c349dbc7Sjsg /* fall back to VBT panel type? */
1110c349dbc7Sjsg if (ret == 0x0) {
1111c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm, "No panel type in OpRegion\n");
1112c349dbc7Sjsg return -ENODEV;
1113c349dbc7Sjsg }
1114c349dbc7Sjsg
1115c349dbc7Sjsg /*
1116c349dbc7Sjsg * So far we know that some machined must use it, others must not use it.
1117c349dbc7Sjsg * There doesn't seem to be any way to determine which way to go, except
1118c349dbc7Sjsg * via a quirk list :(
1119c349dbc7Sjsg */
1120c349dbc7Sjsg if (!dmi_check_system(intel_use_opregion_panel_type)) {
1121c349dbc7Sjsg drm_dbg_kms(&dev_priv->drm,
1122c349dbc7Sjsg "Ignoring OpRegion panel type (%d)\n", ret - 1);
1123c349dbc7Sjsg return -ENODEV;
1124c349dbc7Sjsg }
1125c349dbc7Sjsg
1126c349dbc7Sjsg return ret - 1;
1127c349dbc7Sjsg }
1128c349dbc7Sjsg
11291bb76ff1Sjsg /**
11301bb76ff1Sjsg * intel_opregion_get_edid - Fetch EDID from ACPI OpRegion mailbox #5
11311bb76ff1Sjsg * @intel_connector: eDP connector
11321bb76ff1Sjsg *
11331bb76ff1Sjsg * This reads the ACPI Opregion mailbox #5 to extract the EDID that is passed
11341bb76ff1Sjsg * to it.
11351bb76ff1Sjsg *
11361bb76ff1Sjsg * Returns:
11371bb76ff1Sjsg * The EDID in the OpRegion, or NULL if there is none or it's invalid.
11381bb76ff1Sjsg *
11391bb76ff1Sjsg */
intel_opregion_get_edid(struct intel_connector * intel_connector)1140*f005ef32Sjsg const struct drm_edid *intel_opregion_get_edid(struct intel_connector *intel_connector)
11411bb76ff1Sjsg {
11421bb76ff1Sjsg struct drm_connector *connector = &intel_connector->base;
11431bb76ff1Sjsg struct drm_i915_private *i915 = to_i915(connector->dev);
11441bb76ff1Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1145*f005ef32Sjsg const struct drm_edid *drm_edid;
1146*f005ef32Sjsg const void *edid;
11471bb76ff1Sjsg int len;
11481bb76ff1Sjsg
11491bb76ff1Sjsg if (!opregion->asle_ext)
11501bb76ff1Sjsg return NULL;
11511bb76ff1Sjsg
1152*f005ef32Sjsg edid = opregion->asle_ext->bddc;
11531bb76ff1Sjsg
11541bb76ff1Sjsg /* Validity corresponds to number of 128-byte blocks */
11551bb76ff1Sjsg len = (opregion->asle_ext->phed & ASLE_PHED_EDID_VALID_MASK) * 128;
1156*f005ef32Sjsg if (!len || !memchr_inv(edid, 0, len))
11571bb76ff1Sjsg return NULL;
11581bb76ff1Sjsg
1159*f005ef32Sjsg drm_edid = drm_edid_alloc(edid, len);
11601bb76ff1Sjsg
1161*f005ef32Sjsg if (!drm_edid_valid(drm_edid)) {
11621bb76ff1Sjsg drm_dbg_kms(&i915->drm, "Invalid EDID in ACPI OpRegion (Mailbox #5)\n");
1163*f005ef32Sjsg drm_edid_free(drm_edid);
1164*f005ef32Sjsg drm_edid = NULL;
11651bb76ff1Sjsg }
1166*f005ef32Sjsg
1167*f005ef32Sjsg return drm_edid;
11681bb76ff1Sjsg }
11691bb76ff1Sjsg
intel_opregion_headless_sku(struct drm_i915_private * i915)11701bb76ff1Sjsg bool intel_opregion_headless_sku(struct drm_i915_private *i915)
11711bb76ff1Sjsg {
11721bb76ff1Sjsg struct intel_opregion *opregion = &i915->display.opregion;
11731bb76ff1Sjsg struct opregion_header *header = opregion->header;
11741bb76ff1Sjsg
11751bb76ff1Sjsg if (!header || header->over.major < 2 ||
11761bb76ff1Sjsg (header->over.major == 2 && header->over.minor < 3))
11771bb76ff1Sjsg return false;
11781bb76ff1Sjsg
11791bb76ff1Sjsg return opregion->header->pcon & PCON_HEADLESS_SKU;
11801bb76ff1Sjsg }
11811bb76ff1Sjsg
intel_opregion_register(struct drm_i915_private * i915)1182c349dbc7Sjsg void intel_opregion_register(struct drm_i915_private *i915)
1183c349dbc7Sjsg {
11841bb76ff1Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1185c349dbc7Sjsg
1186c349dbc7Sjsg if (!opregion->header)
1187c349dbc7Sjsg return;
1188c349dbc7Sjsg
1189c349dbc7Sjsg if (opregion->acpi) {
1190c349dbc7Sjsg #ifdef notyet
1191c349dbc7Sjsg opregion->acpi_notifier.notifier_call =
1192c349dbc7Sjsg intel_opregion_video_event;
1193c349dbc7Sjsg register_acpi_notifier(&opregion->acpi_notifier);
1194c349dbc7Sjsg #endif
1195c349dbc7Sjsg }
1196c349dbc7Sjsg
1197c349dbc7Sjsg intel_opregion_resume(i915);
1198c349dbc7Sjsg }
1199c349dbc7Sjsg
intel_opregion_resume_display(struct drm_i915_private * i915)1200*f005ef32Sjsg static void intel_opregion_resume_display(struct drm_i915_private *i915)
1201c349dbc7Sjsg {
12021bb76ff1Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1203c349dbc7Sjsg
1204c349dbc7Sjsg if (opregion->acpi) {
1205c349dbc7Sjsg #ifdef notyet
1206c349dbc7Sjsg intel_didl_outputs(i915);
1207c349dbc7Sjsg intel_setup_cadls(i915);
1208c349dbc7Sjsg #endif
1209c349dbc7Sjsg
1210c349dbc7Sjsg /*
1211c349dbc7Sjsg * Notify BIOS we are ready to handle ACPI video ext notifs.
1212c349dbc7Sjsg * Right now, all the events are handled by the ACPI video
1213c349dbc7Sjsg * module. We don't actually need to do anything with them.
1214c349dbc7Sjsg */
1215c349dbc7Sjsg opregion->acpi->csts = 0;
1216c349dbc7Sjsg opregion->acpi->drdy = 1;
1217c349dbc7Sjsg }
1218c349dbc7Sjsg
1219c349dbc7Sjsg if (opregion->asle) {
1220c349dbc7Sjsg opregion->asle->tche = ASLE_TCHE_BLC_EN;
1221c349dbc7Sjsg opregion->asle->ardy = ASLE_ARDY_READY;
1222c349dbc7Sjsg }
1223c349dbc7Sjsg
12245ca02815Sjsg /* Some platforms abuse the _DSM to enable MUX */
12255ca02815Sjsg intel_dsm_get_bios_data_funcs_supported(i915);
1226*f005ef32Sjsg }
1227*f005ef32Sjsg
intel_opregion_resume(struct drm_i915_private * i915)1228*f005ef32Sjsg void intel_opregion_resume(struct drm_i915_private *i915)
1229*f005ef32Sjsg {
1230*f005ef32Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1231*f005ef32Sjsg
1232*f005ef32Sjsg if (!opregion->header)
1233*f005ef32Sjsg return;
1234*f005ef32Sjsg
1235*f005ef32Sjsg if (HAS_DISPLAY(i915))
1236*f005ef32Sjsg intel_opregion_resume_display(i915);
12375ca02815Sjsg
1238c349dbc7Sjsg intel_opregion_notify_adapter(i915, PCI_D0);
1239c349dbc7Sjsg }
1240c349dbc7Sjsg
intel_opregion_suspend_display(struct drm_i915_private * i915)1241*f005ef32Sjsg static void intel_opregion_suspend_display(struct drm_i915_private *i915)
1242*f005ef32Sjsg {
1243*f005ef32Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1244*f005ef32Sjsg
1245*f005ef32Sjsg if (opregion->asle)
1246*f005ef32Sjsg opregion->asle->ardy = ASLE_ARDY_NOT_READY;
1247*f005ef32Sjsg
1248*f005ef32Sjsg cancel_work_sync(&i915->display.opregion.asle_work);
1249*f005ef32Sjsg
1250*f005ef32Sjsg if (opregion->acpi)
1251*f005ef32Sjsg opregion->acpi->drdy = 0;
1252*f005ef32Sjsg }
1253*f005ef32Sjsg
intel_opregion_suspend(struct drm_i915_private * i915,pci_power_t state)1254c349dbc7Sjsg void intel_opregion_suspend(struct drm_i915_private *i915, pci_power_t state)
1255c349dbc7Sjsg {
12561bb76ff1Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1257c349dbc7Sjsg
1258c349dbc7Sjsg if (!opregion->header)
1259c349dbc7Sjsg return;
1260c349dbc7Sjsg
1261c349dbc7Sjsg intel_opregion_notify_adapter(i915, state);
1262c349dbc7Sjsg
1263*f005ef32Sjsg if (HAS_DISPLAY(i915))
1264*f005ef32Sjsg intel_opregion_suspend_display(i915);
1265c349dbc7Sjsg }
1266c349dbc7Sjsg
intel_opregion_unregister(struct drm_i915_private * i915)1267c349dbc7Sjsg void intel_opregion_unregister(struct drm_i915_private *i915)
1268c349dbc7Sjsg {
12691bb76ff1Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1270c349dbc7Sjsg
1271c349dbc7Sjsg intel_opregion_suspend(i915, PCI_D1);
1272c349dbc7Sjsg
1273c349dbc7Sjsg if (!opregion->header)
1274c349dbc7Sjsg return;
1275c349dbc7Sjsg
1276c349dbc7Sjsg if (opregion->acpi_notifier.notifier_call) {
1277c349dbc7Sjsg unregister_acpi_notifier(&opregion->acpi_notifier);
1278c349dbc7Sjsg opregion->acpi_notifier.notifier_call = NULL;
1279c349dbc7Sjsg }
1280*f005ef32Sjsg }
1281*f005ef32Sjsg
intel_opregion_cleanup(struct drm_i915_private * i915)1282*f005ef32Sjsg void intel_opregion_cleanup(struct drm_i915_private *i915)
1283*f005ef32Sjsg {
1284*f005ef32Sjsg struct intel_opregion *opregion = &i915->display.opregion;
1285*f005ef32Sjsg
1286*f005ef32Sjsg if (!opregion->header)
1287*f005ef32Sjsg return;
1288c349dbc7Sjsg
1289c349dbc7Sjsg /* just clear all opregion memory pointers now */
1290c349dbc7Sjsg #ifdef __linux__
1291c349dbc7Sjsg memunmap(opregion->header);
1292c349dbc7Sjsg if (opregion->rvda) {
1293c349dbc7Sjsg memunmap(opregion->rvda);
1294c349dbc7Sjsg opregion->rvda = NULL;
1295c349dbc7Sjsg }
1296c349dbc7Sjsg #else
1297c349dbc7Sjsg bus_space_unmap(i915->bst, i915->opregion_ioh, OPREGION_SIZE);
1298c349dbc7Sjsg if (opregion->rvda) {
1299c349dbc7Sjsg bus_space_unmap(i915->bst, i915->opregion_rvda_ioh,
1300c349dbc7Sjsg i915->opregion_rvda_size);
1301c349dbc7Sjsg opregion->rvda = NULL;
1302c349dbc7Sjsg }
1303c349dbc7Sjsg #endif
1304c349dbc7Sjsg if (opregion->vbt_firmware) {
1305c349dbc7Sjsg kfree(opregion->vbt_firmware);
1306c349dbc7Sjsg opregion->vbt_firmware = NULL;
1307c349dbc7Sjsg }
1308c349dbc7Sjsg opregion->header = NULL;
1309c349dbc7Sjsg opregion->acpi = NULL;
1310c349dbc7Sjsg opregion->swsci = NULL;
1311c349dbc7Sjsg opregion->asle = NULL;
13121bb76ff1Sjsg opregion->asle_ext = NULL;
1313c349dbc7Sjsg opregion->vbt = NULL;
1314c349dbc7Sjsg opregion->lid_state = NULL;
1315c349dbc7Sjsg }
1316