xref: /openbsd-src/sys/dev/pci/drm/amd/include/atomfirmwareid.h (revision fb4d85023675bc7da402da96b2bb84fd12905dbf)
1*fb4d8502Sjsg /****************************************************************************\
2*fb4d8502Sjsg *
3*fb4d8502Sjsg *  File Name      atomfirmwareid.h
4*fb4d8502Sjsg *
5*fb4d8502Sjsg *  Description    ATOM BIOS command/data table ID definition header file
6*fb4d8502Sjsg *
7*fb4d8502Sjsg *  Copyright 2016 Advanced Micro Devices, Inc.
8*fb4d8502Sjsg *
9*fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
10*fb4d8502Sjsg * and associated documentation files (the "Software"), to deal in the Software without restriction,
11*fb4d8502Sjsg * including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
12*fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so,
13*fb4d8502Sjsg * subject to the following conditions:
14*fb4d8502Sjsg *
15*fb4d8502Sjsg * The above copyright notice and this permission notice shall be included in all copies or substantial
16*fb4d8502Sjsg * portions of the Software.
17*fb4d8502Sjsg *
18*fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19*fb4d8502Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20*fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
21*fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
22*fb4d8502Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23*fb4d8502Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24*fb4d8502Sjsg * OTHER DEALINGS IN THE SOFTWARE.
25*fb4d8502Sjsg *
26*fb4d8502Sjsg \****************************************************************************/
27*fb4d8502Sjsg 
28*fb4d8502Sjsg #ifndef _ATOMFIRMWAREID_H_
29*fb4d8502Sjsg #define _ATOMFIRMWAREID_H_
30*fb4d8502Sjsg 
31*fb4d8502Sjsg enum atom_master_data_table_id
32*fb4d8502Sjsg {
33*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__UTILITY_PIPELINE,
34*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__MULTIMEDIA_INF,
35*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__FIRMWARE_INF,
36*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__LCD_INF,
37*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__SMU_INF,
38*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__VRAM_USAGE_BY_FIRMWARE,
39*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__GPIO_PIN_LUT,
40*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__GFX_INF,
41*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__POWER_PLAY_INF,
42*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__DISPLAY_OBJECT_INF,
43*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__INDIRECT_IO_ACCESS,
44*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__UMC_INF,
45*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__DCE_INF,
46*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__VRAM_INF,
47*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__INTEGRATED_SYS_INF,
48*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__ASIC_PROFILING_INF,
49*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__VOLTAGE_OBJ_INF,
50*fb4d8502Sjsg 
51*fb4d8502Sjsg     VBIOS_DATA_TBL_ID__UNDEFINED,
52*fb4d8502Sjsg };
53*fb4d8502Sjsg 
54*fb4d8502Sjsg enum atom_master_command_table_id
55*fb4d8502Sjsg {
56*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__ASIC_INIT,
57*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__DIGX_ENCODER_CONTROL,
58*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__SET_ENGINE_CLOCK,
59*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__SET_MEMORY_CLOCK,
60*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__SET_PIXEL_CLOCK,
61*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__ENABLE_DISP_POWER_GATING,
62*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__BLANK_CRTC,
63*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__ENABLE_CRTC,
64*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__GET_SMU_CLOCK_INFO,
65*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__SELECT_CRTC_SOURCE,
66*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__SET_DCE_CLOCK,
67*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__GET_MEMORY_CLOCK,
68*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__GET_ENGINE_CLOCK,
69*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__SET_CRTC_USING_DTD_TIMING,
70*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__EXTENAL_ENCODER_CONTROL,
71*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__PROCESS_I2C_CHANNEL_TRANSACTION,
72*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__COMPUTE_GPU_CLOCK_PARAM,
73*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__DYNAMIC_MEMORY_SETTINGS,
74*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__MEMORY_TRAINING,
75*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__SET_VOLTAGE,
76*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__DIG1_TRANSMITTER_CONTROL,
77*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__PROCESS_AUX_CHANNEL_TRANSACTION,
78*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__GET_VOLTAGE_INF,
79*fb4d8502Sjsg 
80*fb4d8502Sjsg     VBIOS_CMD_TBL_ID__UNDEFINED,
81*fb4d8502Sjsg };
82*fb4d8502Sjsg 
83*fb4d8502Sjsg 
84*fb4d8502Sjsg 
85*fb4d8502Sjsg #endif  /* _ATOMFIRMWAREID_H_  */
86*fb4d8502Sjsg /* ### EOF ### */
87