xref: /openbsd-src/sys/dev/pci/drm/amd/display/include/gpio_interface.h (revision c349dbc7938c71a30e13c1be4acc1976165f4630)
1fb4d8502Sjsg /*
2fb4d8502Sjsg  * Copyright 2012-15 Advanced Micro Devices, Inc.
3fb4d8502Sjsg  *
4fb4d8502Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
5fb4d8502Sjsg  * copy of this software and associated documentation files (the "Software"),
6fb4d8502Sjsg  * to deal in the Software without restriction, including without limitation
7fb4d8502Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8fb4d8502Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
9fb4d8502Sjsg  * Software is furnished to do so, subject to the following conditions:
10fb4d8502Sjsg  *
11fb4d8502Sjsg  * The above copyright notice and this permission notice shall be included in
12fb4d8502Sjsg  * all copies or substantial portions of the Software.
13fb4d8502Sjsg  *
14fb4d8502Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15fb4d8502Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16fb4d8502Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17fb4d8502Sjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18fb4d8502Sjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19fb4d8502Sjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20fb4d8502Sjsg  * OTHER DEALINGS IN THE SOFTWARE.
21fb4d8502Sjsg  *
22fb4d8502Sjsg  * Authors: AMD
23fb4d8502Sjsg  *
24fb4d8502Sjsg  */
25fb4d8502Sjsg 
26fb4d8502Sjsg #ifndef __DAL_GPIO_INTERFACE_H__
27fb4d8502Sjsg #define __DAL_GPIO_INTERFACE_H__
28fb4d8502Sjsg 
29fb4d8502Sjsg #include "gpio_types.h"
30fb4d8502Sjsg #include "grph_object_defs.h"
31fb4d8502Sjsg 
32fb4d8502Sjsg struct gpio;
33fb4d8502Sjsg 
34fb4d8502Sjsg /* Open the handle for future use */
35fb4d8502Sjsg enum gpio_result dal_gpio_open(
36fb4d8502Sjsg 	struct gpio *gpio,
37fb4d8502Sjsg 	enum gpio_mode mode);
38fb4d8502Sjsg 
39fb4d8502Sjsg enum gpio_result dal_gpio_open_ex(
40fb4d8502Sjsg 	struct gpio *gpio,
41fb4d8502Sjsg 	enum gpio_mode mode);
42fb4d8502Sjsg 
43fb4d8502Sjsg /* Get high or low from the pin */
44fb4d8502Sjsg enum gpio_result dal_gpio_get_value(
45fb4d8502Sjsg 	const struct gpio *gpio,
46fb4d8502Sjsg 	uint32_t *value);
47fb4d8502Sjsg 
48fb4d8502Sjsg /* Set pin high or low */
49fb4d8502Sjsg enum gpio_result dal_gpio_set_value(
50fb4d8502Sjsg 	const struct gpio *gpio,
51fb4d8502Sjsg 	uint32_t value);
52fb4d8502Sjsg 
53fb4d8502Sjsg /* Get current mode */
54fb4d8502Sjsg enum gpio_mode dal_gpio_get_mode(
55fb4d8502Sjsg 	const struct gpio *gpio);
56fb4d8502Sjsg 
57fb4d8502Sjsg /* Change mode of the handle */
58fb4d8502Sjsg enum gpio_result dal_gpio_change_mode(
59fb4d8502Sjsg 	struct gpio *gpio,
60fb4d8502Sjsg 	enum gpio_mode mode);
61fb4d8502Sjsg 
62*c349dbc7Sjsg /* Lock Pin */
63*c349dbc7Sjsg enum gpio_result dal_gpio_lock_pin(
64*c349dbc7Sjsg 	struct gpio *gpio);
65*c349dbc7Sjsg 
66*c349dbc7Sjsg /* Unlock Pin */
67*c349dbc7Sjsg enum gpio_result dal_gpio_unlock_pin(
68*c349dbc7Sjsg 	struct gpio *gpio);
69*c349dbc7Sjsg 
70fb4d8502Sjsg /* Get the GPIO id */
71fb4d8502Sjsg enum gpio_id dal_gpio_get_id(
72fb4d8502Sjsg 	const struct gpio *gpio);
73fb4d8502Sjsg 
74fb4d8502Sjsg /* Get the GPIO enum */
75fb4d8502Sjsg uint32_t dal_gpio_get_enum(
76fb4d8502Sjsg 	const struct gpio *gpio);
77fb4d8502Sjsg 
78fb4d8502Sjsg /* Set the GPIO pin configuration */
79fb4d8502Sjsg enum gpio_result dal_gpio_set_config(
80fb4d8502Sjsg 	struct gpio *gpio,
81fb4d8502Sjsg 	const struct gpio_config_data *config_data);
82fb4d8502Sjsg 
83fb4d8502Sjsg /* Obtain GPIO pin info */
84fb4d8502Sjsg enum gpio_result dal_gpio_get_pin_info(
85fb4d8502Sjsg 	const struct gpio *gpio,
86fb4d8502Sjsg 	struct gpio_pin_info *pin_info);
87fb4d8502Sjsg 
88fb4d8502Sjsg /* Obtain GPIO sync source */
89fb4d8502Sjsg enum sync_source dal_gpio_get_sync_source(
90fb4d8502Sjsg 	const struct gpio *gpio);
91fb4d8502Sjsg 
92fb4d8502Sjsg /* Obtain GPIO pin output state (active low or active high) */
93fb4d8502Sjsg enum gpio_pin_output_state dal_gpio_get_output_state(
94fb4d8502Sjsg 	const struct gpio *gpio);
95fb4d8502Sjsg 
96*c349dbc7Sjsg struct hw_ddc *dal_gpio_get_ddc(struct gpio *gpio);
97*c349dbc7Sjsg 
98*c349dbc7Sjsg struct hw_hpd *dal_gpio_get_hpd(struct gpio *gpio);
99*c349dbc7Sjsg 
100*c349dbc7Sjsg struct hw_generic *dal_gpio_get_generic(struct gpio *gpio);
101*c349dbc7Sjsg 
102fb4d8502Sjsg /* Close the handle */
103fb4d8502Sjsg void dal_gpio_close(
104fb4d8502Sjsg 	struct gpio *gpio);
105fb4d8502Sjsg 
106*c349dbc7Sjsg 
107*c349dbc7Sjsg 
108*c349dbc7Sjsg 
109fb4d8502Sjsg #endif
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