1*ad8b1aafSjsg /* 2*ad8b1aafSjsg * Copyright 2019 Advanced Micro Devices, Inc. 3*ad8b1aafSjsg * 4*ad8b1aafSjsg * Permission is hereby granted, free of charge, to any person obtaining a 5*ad8b1aafSjsg * copy of this software and associated documentation files (the "Software"), 6*ad8b1aafSjsg * to deal in the Software without restriction, including without limitation 7*ad8b1aafSjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*ad8b1aafSjsg * and/or sell copies of the Software, and to permit persons to whom the 9*ad8b1aafSjsg * Software is furnished to do so, subject to the following conditions: 10*ad8b1aafSjsg * 11*ad8b1aafSjsg * The above copyright notice and this permission notice shall be included in 12*ad8b1aafSjsg * all copies or substantial portions of the Software. 13*ad8b1aafSjsg * 14*ad8b1aafSjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*ad8b1aafSjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*ad8b1aafSjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*ad8b1aafSjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*ad8b1aafSjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*ad8b1aafSjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*ad8b1aafSjsg * OTHER DEALINGS IN THE SOFTWARE. 21*ad8b1aafSjsg * 22*ad8b1aafSjsg */ 23*ad8b1aafSjsg 24*ad8b1aafSjsg #ifndef __SDMA_COMMON_H__ 25*ad8b1aafSjsg #define __SDMA_COMMON_H__ 26*ad8b1aafSjsg 27*ad8b1aafSjsg enum sdma_utcl2_cache_read_policy { 28*ad8b1aafSjsg CACHE_READ_POLICY_L2__LRU = 0x00000000, 29*ad8b1aafSjsg CACHE_READ_POLICY_L2__STREAM = 0x00000001, 30*ad8b1aafSjsg CACHE_READ_POLICY_L2__NOA = 0x00000002, 31*ad8b1aafSjsg CACHE_READ_POLICY_L2__DEFAULT = CACHE_READ_POLICY_L2__NOA, 32*ad8b1aafSjsg }; 33*ad8b1aafSjsg 34*ad8b1aafSjsg enum sdma_utcl2_cache_write_policy { 35*ad8b1aafSjsg CACHE_WRITE_POLICY_L2__LRU = 0x00000000, 36*ad8b1aafSjsg CACHE_WRITE_POLICY_L2__STREAM = 0x00000001, 37*ad8b1aafSjsg CACHE_WRITE_POLICY_L2__NOA = 0x00000002, 38*ad8b1aafSjsg CACHE_WRITE_POLICY_L2__BYPASS = 0x00000003, 39*ad8b1aafSjsg CACHE_WRITE_POLICY_L2__DEFAULT = CACHE_WRITE_POLICY_L2__BYPASS, 40*ad8b1aafSjsg }; 41*ad8b1aafSjsg 42*ad8b1aafSjsg #endif /* __SDMA_COMMON_H__ */ 43