1fb4d8502Sjsg /* 2fb4d8502Sjsg * Copyright 2008 Advanced Micro Devices, Inc. 3fb4d8502Sjsg * 4fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5fb4d8502Sjsg * copy of this software and associated documentation files (the "Software"), 6fb4d8502Sjsg * to deal in the Software without restriction, including without limitation 7fb4d8502Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9fb4d8502Sjsg * Software is furnished to do so, subject to the following conditions: 10fb4d8502Sjsg * 11fb4d8502Sjsg * The above copyright notice and this permission notice shall be included in 12fb4d8502Sjsg * all copies or substantial portions of the Software. 13fb4d8502Sjsg * 14fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15fb4d8502Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18fb4d8502Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19fb4d8502Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20fb4d8502Sjsg * OTHER DEALINGS IN THE SOFTWARE. 21fb4d8502Sjsg * 22fb4d8502Sjsg * Author: Stanislaw Skowronek 23fb4d8502Sjsg */ 24fb4d8502Sjsg 25fb4d8502Sjsg #ifndef ATOM_H 26fb4d8502Sjsg #define ATOM_H 27fb4d8502Sjsg 28fb4d8502Sjsg #include <linux/types.h> 29c349dbc7Sjsg 30c349dbc7Sjsg struct drm_device; 31fb4d8502Sjsg 32fb4d8502Sjsg #define ATOM_BIOS_MAGIC 0xAA55 33fb4d8502Sjsg #define ATOM_ATI_MAGIC_PTR 0x30 34fb4d8502Sjsg #define ATOM_ATI_MAGIC " 761295520" 35fb4d8502Sjsg #define ATOM_ROM_TABLE_PTR 0x48 36fb4d8502Sjsg 37fb4d8502Sjsg #define ATOM_ROM_MAGIC "ATOM" 38fb4d8502Sjsg #define ATOM_ROM_MAGIC_PTR 4 39fb4d8502Sjsg 40fb4d8502Sjsg #define ATOM_ROM_MSG_PTR 0x10 41fb4d8502Sjsg #define ATOM_ROM_CMD_PTR 0x1E 42fb4d8502Sjsg #define ATOM_ROM_DATA_PTR 0x20 43fb4d8502Sjsg 44fb4d8502Sjsg #define ATOM_CMD_INIT 0 45fb4d8502Sjsg #define ATOM_CMD_SETSCLK 0x0A 46fb4d8502Sjsg #define ATOM_CMD_SETMCLK 0x0B 47fb4d8502Sjsg #define ATOM_CMD_SETPCLK 0x0C 48fb4d8502Sjsg #define ATOM_CMD_SPDFANCNTL 0x39 49fb4d8502Sjsg 50fb4d8502Sjsg #define ATOM_DATA_FWI_PTR 0xC 51fb4d8502Sjsg #define ATOM_DATA_IIO_PTR 0x32 52fb4d8502Sjsg 53fb4d8502Sjsg #define ATOM_FWI_DEFSCLK_PTR 8 54fb4d8502Sjsg #define ATOM_FWI_DEFMCLK_PTR 0xC 55fb4d8502Sjsg #define ATOM_FWI_MAXSCLK_PTR 0x24 56fb4d8502Sjsg #define ATOM_FWI_MAXMCLK_PTR 0x28 57fb4d8502Sjsg 58fb4d8502Sjsg #define ATOM_CT_SIZE_PTR 0 59fb4d8502Sjsg #define ATOM_CT_WS_PTR 4 60fb4d8502Sjsg #define ATOM_CT_PS_PTR 5 61fb4d8502Sjsg #define ATOM_CT_PS_MASK 0x7F 62fb4d8502Sjsg #define ATOM_CT_CODE_PTR 6 63fb4d8502Sjsg 64fb4d8502Sjsg #define ATOM_OP_CNT 127 65fb4d8502Sjsg #define ATOM_OP_EOT 91 66fb4d8502Sjsg 67fb4d8502Sjsg #define ATOM_CASE_MAGIC 0x63 68fb4d8502Sjsg #define ATOM_CASE_END 0x5A5A 69fb4d8502Sjsg 70fb4d8502Sjsg #define ATOM_ARG_REG 0 71fb4d8502Sjsg #define ATOM_ARG_PS 1 72fb4d8502Sjsg #define ATOM_ARG_WS 2 73fb4d8502Sjsg #define ATOM_ARG_FB 3 74fb4d8502Sjsg #define ATOM_ARG_ID 4 75fb4d8502Sjsg #define ATOM_ARG_IMM 5 76fb4d8502Sjsg #define ATOM_ARG_PLL 6 77fb4d8502Sjsg #define ATOM_ARG_MC 7 78fb4d8502Sjsg 79fb4d8502Sjsg #define ATOM_SRC_DWORD 0 80fb4d8502Sjsg #define ATOM_SRC_WORD0 1 81fb4d8502Sjsg #define ATOM_SRC_WORD8 2 82fb4d8502Sjsg #define ATOM_SRC_WORD16 3 83fb4d8502Sjsg #define ATOM_SRC_BYTE0 4 84fb4d8502Sjsg #define ATOM_SRC_BYTE8 5 85fb4d8502Sjsg #define ATOM_SRC_BYTE16 6 86fb4d8502Sjsg #define ATOM_SRC_BYTE24 7 87fb4d8502Sjsg 88fb4d8502Sjsg #define ATOM_WS_QUOTIENT 0x40 89fb4d8502Sjsg #define ATOM_WS_REMAINDER 0x41 90fb4d8502Sjsg #define ATOM_WS_DATAPTR 0x42 91fb4d8502Sjsg #define ATOM_WS_SHIFT 0x43 92fb4d8502Sjsg #define ATOM_WS_OR_MASK 0x44 93fb4d8502Sjsg #define ATOM_WS_AND_MASK 0x45 94fb4d8502Sjsg #define ATOM_WS_FB_WINDOW 0x46 95fb4d8502Sjsg #define ATOM_WS_ATTRIBUTES 0x47 96fb4d8502Sjsg #define ATOM_WS_REGPTR 0x48 97fb4d8502Sjsg 98fb4d8502Sjsg #define ATOM_IIO_NOP 0 99fb4d8502Sjsg #define ATOM_IIO_START 1 100fb4d8502Sjsg #define ATOM_IIO_READ 2 101fb4d8502Sjsg #define ATOM_IIO_WRITE 3 102fb4d8502Sjsg #define ATOM_IIO_CLEAR 4 103fb4d8502Sjsg #define ATOM_IIO_SET 5 104fb4d8502Sjsg #define ATOM_IIO_MOVE_INDEX 6 105fb4d8502Sjsg #define ATOM_IIO_MOVE_ATTR 7 106fb4d8502Sjsg #define ATOM_IIO_MOVE_DATA 8 107fb4d8502Sjsg #define ATOM_IIO_END 9 108fb4d8502Sjsg 109fb4d8502Sjsg #define ATOM_IO_MM 0 110fb4d8502Sjsg #define ATOM_IO_PCI 1 111fb4d8502Sjsg #define ATOM_IO_SYSIO 2 112fb4d8502Sjsg #define ATOM_IO_IIO 0x80 113fb4d8502Sjsg 1145ca02815Sjsg #define STRLEN_NORMAL 32 1155ca02815Sjsg #define STRLEN_LONG 64 1165ca02815Sjsg #define STRLEN_VERYLONG 254 1175ca02815Sjsg 118fb4d8502Sjsg struct card_info { 119fb4d8502Sjsg struct drm_device *dev; 120*f005ef32Sjsg void (*reg_write)(struct card_info *info, 121*f005ef32Sjsg u32 reg, uint32_t val); /* filled by driver */ 122*f005ef32Sjsg uint32_t (*reg_read)(struct card_info *info, uint32_t reg); /* filled by driver */ 123*f005ef32Sjsg void (*mc_write)(struct card_info *info, 124*f005ef32Sjsg u32 reg, uint32_t val); /* filled by driver */ 125*f005ef32Sjsg uint32_t (*mc_read)(struct card_info *info, uint32_t reg); /* filled by driver */ 126*f005ef32Sjsg void (*pll_write)(struct card_info *info, 127*f005ef32Sjsg u32 reg, uint32_t val); /* filled by driver */ 128*f005ef32Sjsg uint32_t (*pll_read)(struct card_info *info, uint32_t reg); /* filled by driver */ 129fb4d8502Sjsg }; 130fb4d8502Sjsg 131fb4d8502Sjsg struct atom_context { 132fb4d8502Sjsg struct card_info *card; 133fb4d8502Sjsg struct rwlock mutex; 134fb4d8502Sjsg void *bios; 135fb4d8502Sjsg uint32_t cmd_table, data_table; 136fb4d8502Sjsg uint16_t *iio; 137fb4d8502Sjsg 138fb4d8502Sjsg uint16_t data_block; 139fb4d8502Sjsg uint32_t fb_base; 140fb4d8502Sjsg uint32_t divmul[2]; 141fb4d8502Sjsg uint16_t io_attr; 142fb4d8502Sjsg uint16_t reg_block; 143fb4d8502Sjsg uint8_t shift; 144fb4d8502Sjsg int cs_equal, cs_above; 145fb4d8502Sjsg int io_mode; 146fb4d8502Sjsg uint32_t *scratch; 147fb4d8502Sjsg int scratch_size_bytes; 1485ca02815Sjsg 1495ca02815Sjsg uint8_t name[STRLEN_LONG]; 1505ca02815Sjsg uint8_t vbios_pn[STRLEN_LONG]; 1515ca02815Sjsg uint32_t version; 1525ca02815Sjsg uint8_t vbios_ver_str[STRLEN_NORMAL]; 1535ca02815Sjsg uint8_t date[STRLEN_NORMAL]; 154fb4d8502Sjsg }; 155fb4d8502Sjsg 156fb4d8502Sjsg extern int amdgpu_atom_debug; 157fb4d8502Sjsg 158*f005ef32Sjsg struct atom_context *amdgpu_atom_parse(struct card_info *card, void *bios); 159*f005ef32Sjsg int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params); 160*f005ef32Sjsg int amdgpu_atom_asic_init(struct atom_context *ctx); 161*f005ef32Sjsg void amdgpu_atom_destroy(struct atom_context *ctx); 162fb4d8502Sjsg bool amdgpu_atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, 163fb4d8502Sjsg uint8_t *frev, uint8_t *crev, uint16_t *data_start); 164fb4d8502Sjsg bool amdgpu_atom_parse_cmd_header(struct atom_context *ctx, int index, 165fb4d8502Sjsg uint8_t *frev, uint8_t *crev); 166fb4d8502Sjsg #include "atom-types.h" 167fb4d8502Sjsg #include "atombios.h" 168fb4d8502Sjsg #include "ObjectID.h" 169fb4d8502Sjsg 170fb4d8502Sjsg #endif 171