xref: /openbsd-src/sys/dev/pci/drm/amd/amdgpu/amdgpu_ioc32.c (revision 1bb76ff151c0aba8e3312a604e4cd2e5195cf4b7)
1*1bb76ff1Sjsg /*
2fb4d8502Sjsg  * \file amdgpu_ioc32.c
3fb4d8502Sjsg  *
4fb4d8502Sjsg  * 32-bit ioctl compatibility routines for the AMDGPU DRM.
5fb4d8502Sjsg  *
6fb4d8502Sjsg  * \author Paul Mackerras <paulus@samba.org>
7fb4d8502Sjsg  *
8fb4d8502Sjsg  * Copyright (C) Paul Mackerras 2005
9fb4d8502Sjsg  * All Rights Reserved.
10fb4d8502Sjsg  *
11fb4d8502Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
12fb4d8502Sjsg  * copy of this software and associated documentation files (the "Software"),
13fb4d8502Sjsg  * to deal in the Software without restriction, including without limitation
14fb4d8502Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
15fb4d8502Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
16fb4d8502Sjsg  * Software is furnished to do so, subject to the following conditions:
17fb4d8502Sjsg  *
18fb4d8502Sjsg  * The above copyright notice and this permission notice (including the next
19fb4d8502Sjsg  * paragraph) shall be included in all copies or substantial portions of the
20fb4d8502Sjsg  * Software.
21fb4d8502Sjsg  *
22fb4d8502Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23fb4d8502Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24fb4d8502Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
25fb4d8502Sjsg  * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
26fb4d8502Sjsg  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
27fb4d8502Sjsg  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
28fb4d8502Sjsg  * IN THE SOFTWARE.
29fb4d8502Sjsg  */
30fb4d8502Sjsg #include <linux/compat.h>
31fb4d8502Sjsg 
32fb4d8502Sjsg #include <drm/amdgpu_drm.h>
33c349dbc7Sjsg #include <drm/drm_ioctl.h>
34c349dbc7Sjsg 
35fb4d8502Sjsg #include "amdgpu_drv.h"
36fb4d8502Sjsg 
amdgpu_kms_compat_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)37fb4d8502Sjsg long amdgpu_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
38fb4d8502Sjsg {
39fb4d8502Sjsg 	unsigned int nr = DRM_IOCTL_NR(cmd);
40fb4d8502Sjsg 
41fb4d8502Sjsg 	if (nr < DRM_COMMAND_BASE)
42fb4d8502Sjsg 		return drm_compat_ioctl(filp, cmd, arg);
43fb4d8502Sjsg 
44*1bb76ff1Sjsg 	return amdgpu_drm_ioctl(filp, cmd, arg);
45fb4d8502Sjsg }
46