15ca02815Sjsg /* 25ca02815Sjsg * Copyright 2020 Advanced Micro Devices, Inc. 35ca02815Sjsg * 45ca02815Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 55ca02815Sjsg * copy of this software and associated documentation files (the "Software"), 65ca02815Sjsg * to deal in the Software without restriction, including without limitation 75ca02815Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 85ca02815Sjsg * and/or sell copies of the Software, and to permit persons to whom the 95ca02815Sjsg * Software is furnished to do so, subject to the following conditions: 105ca02815Sjsg * 115ca02815Sjsg * The above copyright notice and this permission notice shall be included in 125ca02815Sjsg * all copies or substantial portions of the Software. 135ca02815Sjsg * 145ca02815Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 155ca02815Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 165ca02815Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 175ca02815Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 185ca02815Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 195ca02815Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 205ca02815Sjsg * OTHER DEALINGS IN THE SOFTWARE. 215ca02815Sjsg * 225ca02815Sjsg */ 235ca02815Sjsg #ifndef __AMDGPU_HDP_H__ 245ca02815Sjsg #define __AMDGPU_HDP_H__ 251bb76ff1Sjsg #include "amdgpu_ras.h" 265ca02815Sjsg 271bb76ff1Sjsg struct amdgpu_hdp_ras { 281bb76ff1Sjsg struct amdgpu_ras_block_object ras_block; 295ca02815Sjsg }; 305ca02815Sjsg 315ca02815Sjsg struct amdgpu_hdp_funcs { 325ca02815Sjsg void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring); 335ca02815Sjsg void (*invalidate_hdp)(struct amdgpu_device *adev, 345ca02815Sjsg struct amdgpu_ring *ring); 355ca02815Sjsg void (*update_clock_gating)(struct amdgpu_device *adev, bool enable); 361bb76ff1Sjsg void (*get_clock_gating_state)(struct amdgpu_device *adev, u64 *flags); 375ca02815Sjsg void (*init_registers)(struct amdgpu_device *adev); 385ca02815Sjsg }; 395ca02815Sjsg 405ca02815Sjsg struct amdgpu_hdp { 415ca02815Sjsg struct ras_common_if *ras_if; 425ca02815Sjsg const struct amdgpu_hdp_funcs *funcs; 431bb76ff1Sjsg struct amdgpu_hdp_ras *ras; 445ca02815Sjsg }; 455ca02815Sjsg 46*f005ef32Sjsg int amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev); 475ca02815Sjsg #endif /* __AMDGPU_HDP_H__ */ 48