1fb4d8502Sjsg /*
2fb4d8502Sjsg * Copyright 2016 Advanced Micro Devices, Inc.
3fb4d8502Sjsg *
4fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a
5fb4d8502Sjsg * copy of this software and associated documentation files (the "Software"),
6fb4d8502Sjsg * to deal in the Software without restriction, including without limitation
7fb4d8502Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the
9fb4d8502Sjsg * Software is furnished to do so, subject to the following conditions:
10fb4d8502Sjsg *
11fb4d8502Sjsg * The above copyright notice and this permission notice shall be included in
12fb4d8502Sjsg * all copies or substantial portions of the Software.
13fb4d8502Sjsg *
14fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15fb4d8502Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18fb4d8502Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19fb4d8502Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20fb4d8502Sjsg * OTHER DEALINGS IN THE SOFTWARE.
21fb4d8502Sjsg *
22fb4d8502Sjsg * Authors: Christian König
23fb4d8502Sjsg */
24fb4d8502Sjsg
255ca02815Sjsg #include <drm/ttm/ttm_range_manager.h>
265ca02815Sjsg
27fb4d8502Sjsg #include "amdgpu.h"
28fb4d8502Sjsg
295ca02815Sjsg static inline struct amdgpu_gtt_mgr *
to_gtt_mgr(struct ttm_resource_manager * man)305ca02815Sjsg to_gtt_mgr(struct ttm_resource_manager *man)
31ad8b1aafSjsg {
32ad8b1aafSjsg return container_of(man, struct amdgpu_gtt_mgr, manager);
33ad8b1aafSjsg }
34fb4d8502Sjsg
35fb4d8502Sjsg /**
36c349dbc7Sjsg * DOC: mem_info_gtt_total
37c349dbc7Sjsg *
38c349dbc7Sjsg * The amdgpu driver provides a sysfs API for reporting current total size of
39c349dbc7Sjsg * the GTT.
40c349dbc7Sjsg * The file mem_info_gtt_total is used for this, and returns the total size of
41c349dbc7Sjsg * the GTT block, in bytes
42c349dbc7Sjsg */
amdgpu_mem_info_gtt_total_show(struct device * dev,struct device_attribute * attr,char * buf)43c349dbc7Sjsg static ssize_t amdgpu_mem_info_gtt_total_show(struct device *dev,
445ca02815Sjsg struct device_attribute *attr,
455ca02815Sjsg char *buf)
46c349dbc7Sjsg {
47c349dbc7Sjsg struct drm_device *ddev = dev_get_drvdata(dev);
48ad8b1aafSjsg struct amdgpu_device *adev = drm_to_adev(ddev);
495ca02815Sjsg struct ttm_resource_manager *man;
50c349dbc7Sjsg
515ca02815Sjsg man = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT);
521bb76ff1Sjsg return sysfs_emit(buf, "%llu\n", man->size);
53c349dbc7Sjsg }
54c349dbc7Sjsg
55c349dbc7Sjsg /**
56c349dbc7Sjsg * DOC: mem_info_gtt_used
57c349dbc7Sjsg *
58c349dbc7Sjsg * The amdgpu driver provides a sysfs API for reporting current total amount of
59c349dbc7Sjsg * used GTT.
60c349dbc7Sjsg * The file mem_info_gtt_used is used for this, and returns the current used
61c349dbc7Sjsg * size of the GTT block, in bytes
62c349dbc7Sjsg */
amdgpu_mem_info_gtt_used_show(struct device * dev,struct device_attribute * attr,char * buf)63c349dbc7Sjsg static ssize_t amdgpu_mem_info_gtt_used_show(struct device *dev,
645ca02815Sjsg struct device_attribute *attr,
655ca02815Sjsg char *buf)
66c349dbc7Sjsg {
67c349dbc7Sjsg struct drm_device *ddev = dev_get_drvdata(dev);
68ad8b1aafSjsg struct amdgpu_device *adev = drm_to_adev(ddev);
691bb76ff1Sjsg struct ttm_resource_manager *man = &adev->mman.gtt_mgr.manager;
70c349dbc7Sjsg
711bb76ff1Sjsg return sysfs_emit(buf, "%llu\n", ttm_resource_manager_usage(man));
72c349dbc7Sjsg }
73c349dbc7Sjsg
74c349dbc7Sjsg static DEVICE_ATTR(mem_info_gtt_total, S_IRUGO,
75c349dbc7Sjsg amdgpu_mem_info_gtt_total_show, NULL);
76c349dbc7Sjsg static DEVICE_ATTR(mem_info_gtt_used, S_IRUGO,
77c349dbc7Sjsg amdgpu_mem_info_gtt_used_show, NULL);
78c349dbc7Sjsg
795ca02815Sjsg static struct attribute *amdgpu_gtt_mgr_attributes[] = {
805ca02815Sjsg &dev_attr_mem_info_gtt_total.attr,
815ca02815Sjsg &dev_attr_mem_info_gtt_used.attr,
825ca02815Sjsg NULL
835ca02815Sjsg };
845ca02815Sjsg
855ca02815Sjsg const struct attribute_group amdgpu_gtt_mgr_attr_group = {
865ca02815Sjsg .attrs = amdgpu_gtt_mgr_attributes
875ca02815Sjsg };
885ca02815Sjsg
895ca02815Sjsg /**
905ca02815Sjsg * amdgpu_gtt_mgr_has_gart_addr - Check if mem has address space
915ca02815Sjsg *
925ca02815Sjsg * @res: the mem object to check
935ca02815Sjsg *
945ca02815Sjsg * Check if a mem object has already address space allocated.
955ca02815Sjsg */
amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource * res)965ca02815Sjsg bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res)
975ca02815Sjsg {
981bb76ff1Sjsg struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res);
995ca02815Sjsg
1001bb76ff1Sjsg return drm_mm_node_allocated(&node->mm_nodes[0]);
1015ca02815Sjsg }
1025ca02815Sjsg
1035ca02815Sjsg /**
1045ca02815Sjsg * amdgpu_gtt_mgr_new - allocate a new node
1055ca02815Sjsg *
1065ca02815Sjsg * @man: TTM memory type manager
1075ca02815Sjsg * @tbo: TTM BO we need this range for
1085ca02815Sjsg * @place: placement flags and restrictions
1095ca02815Sjsg * @res: the resulting mem object
1105ca02815Sjsg *
1115ca02815Sjsg * Dummy, allocate the node but no space for it yet.
1125ca02815Sjsg */
amdgpu_gtt_mgr_new(struct ttm_resource_manager * man,struct ttm_buffer_object * tbo,const struct ttm_place * place,struct ttm_resource ** res)1135ca02815Sjsg static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
1145ca02815Sjsg struct ttm_buffer_object *tbo,
1155ca02815Sjsg const struct ttm_place *place,
1165ca02815Sjsg struct ttm_resource **res)
1175ca02815Sjsg {
1185ca02815Sjsg struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
1195ca02815Sjsg uint32_t num_pages = PFN_UP(tbo->base.size);
1201bb76ff1Sjsg struct ttm_range_mgr_node *node;
1215ca02815Sjsg int r;
1225ca02815Sjsg
1231bb76ff1Sjsg node = kzalloc(struct_size(node, mm_nodes, 1), GFP_KERNEL);
1241bb76ff1Sjsg if (!node)
1251bb76ff1Sjsg return -ENOMEM;
1261bb76ff1Sjsg
1271bb76ff1Sjsg ttm_resource_init(tbo, place, &node->base);
1285ca02815Sjsg if (!(place->flags & TTM_PL_FLAG_TEMPORARY) &&
1291bb76ff1Sjsg ttm_resource_manager_usage(man) > man->size) {
1301bb76ff1Sjsg r = -ENOSPC;
1311bb76ff1Sjsg goto err_free;
1325ca02815Sjsg }
1335ca02815Sjsg
1345ca02815Sjsg if (place->lpfn) {
1355ca02815Sjsg spin_lock(&mgr->lock);
1361bb76ff1Sjsg r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0],
1375ca02815Sjsg num_pages, tbo->page_alignment,
1385ca02815Sjsg 0, place->fpfn, place->lpfn,
1395ca02815Sjsg DRM_MM_INSERT_BEST);
1405ca02815Sjsg spin_unlock(&mgr->lock);
1415ca02815Sjsg if (unlikely(r))
1425ca02815Sjsg goto err_free;
1435ca02815Sjsg
1441bb76ff1Sjsg node->base.start = node->mm_nodes[0].start;
1455ca02815Sjsg } else {
1461bb76ff1Sjsg node->mm_nodes[0].start = 0;
147*f005ef32Sjsg node->mm_nodes[0].size = PFN_UP(node->base.size);
1481bb76ff1Sjsg node->base.start = AMDGPU_BO_INVALID_OFFSET;
1495ca02815Sjsg }
1505ca02815Sjsg
1511bb76ff1Sjsg *res = &node->base;
1525ca02815Sjsg return 0;
1535ca02815Sjsg
1545ca02815Sjsg err_free:
1551bb76ff1Sjsg ttm_resource_fini(man, &node->base);
1565ca02815Sjsg kfree(node);
1575ca02815Sjsg return r;
1585ca02815Sjsg }
1595ca02815Sjsg
1605ca02815Sjsg /**
1615ca02815Sjsg * amdgpu_gtt_mgr_del - free ranges
1625ca02815Sjsg *
1635ca02815Sjsg * @man: TTM memory type manager
1645ca02815Sjsg * @res: TTM memory object
1655ca02815Sjsg *
1665ca02815Sjsg * Free the allocated GTT again.
1675ca02815Sjsg */
amdgpu_gtt_mgr_del(struct ttm_resource_manager * man,struct ttm_resource * res)1685ca02815Sjsg static void amdgpu_gtt_mgr_del(struct ttm_resource_manager *man,
1695ca02815Sjsg struct ttm_resource *res)
1705ca02815Sjsg {
1711bb76ff1Sjsg struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res);
1725ca02815Sjsg struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
1735ca02815Sjsg
1745ca02815Sjsg spin_lock(&mgr->lock);
1751bb76ff1Sjsg if (drm_mm_node_allocated(&node->mm_nodes[0]))
1761bb76ff1Sjsg drm_mm_remove_node(&node->mm_nodes[0]);
1775ca02815Sjsg spin_unlock(&mgr->lock);
1785ca02815Sjsg
1791bb76ff1Sjsg ttm_resource_fini(man, res);
1805ca02815Sjsg kfree(node);
1815ca02815Sjsg }
1825ca02815Sjsg
1835ca02815Sjsg /**
1845ca02815Sjsg * amdgpu_gtt_mgr_recover - re-init gart
1855ca02815Sjsg *
1861bb76ff1Sjsg * @mgr: amdgpu_gtt_mgr pointer
1875ca02815Sjsg *
1885ca02815Sjsg * Re-init the gart for each known BO in the GTT.
1895ca02815Sjsg */
amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr * mgr)1901bb76ff1Sjsg void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr)
1915ca02815Sjsg {
1921bb76ff1Sjsg struct ttm_range_mgr_node *node;
1935ca02815Sjsg struct drm_mm_node *mm_node;
1941bb76ff1Sjsg struct amdgpu_device *adev;
1955ca02815Sjsg
1965ca02815Sjsg adev = container_of(mgr, typeof(*adev), mman.gtt_mgr);
1975ca02815Sjsg spin_lock(&mgr->lock);
1985ca02815Sjsg drm_mm_for_each_node(mm_node, &mgr->mm) {
1991bb76ff1Sjsg node = container_of(mm_node, typeof(*node), mm_nodes[0]);
2001bb76ff1Sjsg amdgpu_ttm_recover_gart(node->base.bo);
2015ca02815Sjsg }
2025ca02815Sjsg spin_unlock(&mgr->lock);
2035ca02815Sjsg
2045ca02815Sjsg amdgpu_gart_invalidate_tlb(adev);
2051bb76ff1Sjsg }
2065ca02815Sjsg
2071bb76ff1Sjsg /**
2081bb76ff1Sjsg * amdgpu_gtt_mgr_intersects - test for intersection
2091bb76ff1Sjsg *
2101bb76ff1Sjsg * @man: Our manager object
2111bb76ff1Sjsg * @res: The resource to test
2121bb76ff1Sjsg * @place: The place for the new allocation
2131bb76ff1Sjsg * @size: The size of the new allocation
2141bb76ff1Sjsg *
2151bb76ff1Sjsg * Simplified intersection test, only interesting if we need GART or not.
2161bb76ff1Sjsg */
amdgpu_gtt_mgr_intersects(struct ttm_resource_manager * man,struct ttm_resource * res,const struct ttm_place * place,size_t size)2171bb76ff1Sjsg static bool amdgpu_gtt_mgr_intersects(struct ttm_resource_manager *man,
2181bb76ff1Sjsg struct ttm_resource *res,
2191bb76ff1Sjsg const struct ttm_place *place,
2201bb76ff1Sjsg size_t size)
2211bb76ff1Sjsg {
2221bb76ff1Sjsg return !place->lpfn || amdgpu_gtt_mgr_has_gart_addr(res);
2231bb76ff1Sjsg }
2241bb76ff1Sjsg
2251bb76ff1Sjsg /**
2261bb76ff1Sjsg * amdgpu_gtt_mgr_compatible - test for compatibility
2271bb76ff1Sjsg *
2281bb76ff1Sjsg * @man: Our manager object
2291bb76ff1Sjsg * @res: The resource to test
2301bb76ff1Sjsg * @place: The place for the new allocation
2311bb76ff1Sjsg * @size: The size of the new allocation
2321bb76ff1Sjsg *
2331bb76ff1Sjsg * Simplified compatibility test.
2341bb76ff1Sjsg */
amdgpu_gtt_mgr_compatible(struct ttm_resource_manager * man,struct ttm_resource * res,const struct ttm_place * place,size_t size)2351bb76ff1Sjsg static bool amdgpu_gtt_mgr_compatible(struct ttm_resource_manager *man,
2361bb76ff1Sjsg struct ttm_resource *res,
2371bb76ff1Sjsg const struct ttm_place *place,
2381bb76ff1Sjsg size_t size)
2391bb76ff1Sjsg {
2401bb76ff1Sjsg return !place->lpfn || amdgpu_gtt_mgr_has_gart_addr(res);
2415ca02815Sjsg }
2425ca02815Sjsg
2435ca02815Sjsg /**
2445ca02815Sjsg * amdgpu_gtt_mgr_debug - dump VRAM table
2455ca02815Sjsg *
2465ca02815Sjsg * @man: TTM memory type manager
2475ca02815Sjsg * @printer: DRM printer to use
2485ca02815Sjsg *
2495ca02815Sjsg * Dump the table content using printk.
2505ca02815Sjsg */
amdgpu_gtt_mgr_debug(struct ttm_resource_manager * man,struct drm_printer * printer)2515ca02815Sjsg static void amdgpu_gtt_mgr_debug(struct ttm_resource_manager *man,
2525ca02815Sjsg struct drm_printer *printer)
2535ca02815Sjsg {
2545ca02815Sjsg struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
2555ca02815Sjsg
2565ca02815Sjsg spin_lock(&mgr->lock);
2575ca02815Sjsg drm_mm_print(&mgr->mm, printer);
2585ca02815Sjsg spin_unlock(&mgr->lock);
2595ca02815Sjsg }
2605ca02815Sjsg
2615ca02815Sjsg static const struct ttm_resource_manager_func amdgpu_gtt_mgr_func = {
2625ca02815Sjsg .alloc = amdgpu_gtt_mgr_new,
2635ca02815Sjsg .free = amdgpu_gtt_mgr_del,
2641bb76ff1Sjsg .intersects = amdgpu_gtt_mgr_intersects,
2651bb76ff1Sjsg .compatible = amdgpu_gtt_mgr_compatible,
2665ca02815Sjsg .debug = amdgpu_gtt_mgr_debug
2675ca02815Sjsg };
2685ca02815Sjsg
269c349dbc7Sjsg /**
270fb4d8502Sjsg * amdgpu_gtt_mgr_init - init GTT manager and DRM MM
271fb4d8502Sjsg *
272ad8b1aafSjsg * @adev: amdgpu_device pointer
273ad8b1aafSjsg * @gtt_size: maximum size of GTT
274fb4d8502Sjsg *
275fb4d8502Sjsg * Allocate and initialize the GTT manager.
276fb4d8502Sjsg */
amdgpu_gtt_mgr_init(struct amdgpu_device * adev,uint64_t gtt_size)277ad8b1aafSjsg int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size)
278fb4d8502Sjsg {
279ad8b1aafSjsg struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr;
280ad8b1aafSjsg struct ttm_resource_manager *man = &mgr->manager;
281fb4d8502Sjsg uint64_t start, size;
282fb4d8502Sjsg
283ad8b1aafSjsg man->use_tt = true;
284ad8b1aafSjsg man->func = &amdgpu_gtt_mgr_func;
285ad8b1aafSjsg
2861bb76ff1Sjsg ttm_resource_manager_init(man, &adev->mman.bdev, gtt_size);
287fb4d8502Sjsg
288fb4d8502Sjsg start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
289fb4d8502Sjsg size = (adev->gmc.gart_size >> PAGE_SHIFT) - start;
290fb4d8502Sjsg drm_mm_init(&mgr->mm, start, size);
29163b35fb2Sjsg mtx_init(&mgr->lock, IPL_NONE);
292c349dbc7Sjsg
293ad8b1aafSjsg ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, &mgr->manager);
294ad8b1aafSjsg ttm_resource_manager_set_used(man, true);
295fb4d8502Sjsg return 0;
296fb4d8502Sjsg }
297fb4d8502Sjsg
298fb4d8502Sjsg /**
299fb4d8502Sjsg * amdgpu_gtt_mgr_fini - free and destroy GTT manager
300fb4d8502Sjsg *
301ad8b1aafSjsg * @adev: amdgpu_device pointer
302fb4d8502Sjsg *
303fb4d8502Sjsg * Destroy and free the GTT manager, returns -EBUSY if ranges are still
304fb4d8502Sjsg * allocated inside it.
305fb4d8502Sjsg */
amdgpu_gtt_mgr_fini(struct amdgpu_device * adev)306ad8b1aafSjsg void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev)
307fb4d8502Sjsg {
308ad8b1aafSjsg struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr;
309ad8b1aafSjsg struct ttm_resource_manager *man = &mgr->manager;
310ad8b1aafSjsg int ret;
311ad8b1aafSjsg
312ad8b1aafSjsg ttm_resource_manager_set_used(man, false);
313ad8b1aafSjsg
3145ca02815Sjsg ret = ttm_resource_manager_evict_all(&adev->mman.bdev, man);
315ad8b1aafSjsg if (ret)
316ad8b1aafSjsg return;
317ad8b1aafSjsg
318fb4d8502Sjsg spin_lock(&mgr->lock);
319fb4d8502Sjsg drm_mm_takedown(&mgr->mm);
320fb4d8502Sjsg spin_unlock(&mgr->lock);
321c349dbc7Sjsg
322ad8b1aafSjsg ttm_resource_manager_cleanup(man);
323ad8b1aafSjsg ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, NULL);
324fb4d8502Sjsg }
325