1ad8b1aafSjsg /* 2ad8b1aafSjsg * Copyright 2020 Advanced Micro Devices, Inc. 3ad8b1aafSjsg * 4ad8b1aafSjsg * Permission is hereby granted, free of charge, to any person obtaining a 5ad8b1aafSjsg * copy of this software and associated documentation files (the "Software"), 6ad8b1aafSjsg * to deal in the Software without restriction, including without limitation 7ad8b1aafSjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8ad8b1aafSjsg * and/or sell copies of the Software, and to permit persons to whom the 9ad8b1aafSjsg * Software is furnished to do so, subject to the following conditions: 10ad8b1aafSjsg * 11ad8b1aafSjsg * The above copyright notice and this permission notice shall be included in 12ad8b1aafSjsg * all copies or substantial portions of the Software. 13ad8b1aafSjsg * 14ad8b1aafSjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15ad8b1aafSjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16ad8b1aafSjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17ad8b1aafSjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18ad8b1aafSjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19ad8b1aafSjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20ad8b1aafSjsg * OTHER DEALINGS IN THE SOFTWARE. 21ad8b1aafSjsg * 22ad8b1aafSjsg */ 23ad8b1aafSjsg #ifndef __AMDGPU_GFXHUB_H__ 24ad8b1aafSjsg #define __AMDGPU_GFXHUB_H__ 25ad8b1aafSjsg 26ad8b1aafSjsg struct amdgpu_gfxhub_funcs { 27ad8b1aafSjsg u64 (*get_fb_location)(struct amdgpu_device *adev); 28ad8b1aafSjsg u64 (*get_mc_fb_offset)(struct amdgpu_device *adev); 29ad8b1aafSjsg void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid, 30ad8b1aafSjsg uint64_t page_table_base); 31ad8b1aafSjsg int (*gart_enable)(struct amdgpu_device *adev); 32ad8b1aafSjsg 33ad8b1aafSjsg void (*gart_disable)(struct amdgpu_device *adev); 34ad8b1aafSjsg void (*set_fault_enable_default)(struct amdgpu_device *adev, bool value); 35ad8b1aafSjsg void (*init)(struct amdgpu_device *adev); 36ad8b1aafSjsg int (*get_xgmi_info)(struct amdgpu_device *adev); 375ca02815Sjsg void (*utcl2_harvest)(struct amdgpu_device *adev); 38*1bb76ff1Sjsg void (*mode2_save_regs)(struct amdgpu_device *adev); 39*1bb76ff1Sjsg void (*mode2_restore_regs)(struct amdgpu_device *adev); 40*1bb76ff1Sjsg void (*halt)(struct amdgpu_device *adev); 41ad8b1aafSjsg }; 42ad8b1aafSjsg 43ad8b1aafSjsg struct amdgpu_gfxhub { 44ad8b1aafSjsg const struct amdgpu_gfxhub_funcs *funcs; 45ad8b1aafSjsg }; 46ad8b1aafSjsg 47ad8b1aafSjsg #endif 48