xref: /openbsd-src/sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.h (revision 1bb76ff151c0aba8e3312a604e4cd2e5195cf4b7)
1fb4d8502Sjsg /*
2fb4d8502Sjsg  * Copyright 2014 Advanced Micro Devices, Inc.
3fb4d8502Sjsg  *
4fb4d8502Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
5fb4d8502Sjsg  * copy of this software and associated documentation files (the "Software"),
6fb4d8502Sjsg  * to deal in the Software without restriction, including without limitation
7fb4d8502Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8fb4d8502Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
9fb4d8502Sjsg  * Software is furnished to do so, subject to the following conditions:
10fb4d8502Sjsg  *
11fb4d8502Sjsg  * The above copyright notice and this permission notice shall be included in
12fb4d8502Sjsg  * all copies or substantial portions of the Software.
13fb4d8502Sjsg  *
14fb4d8502Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15fb4d8502Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16fb4d8502Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17fb4d8502Sjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18fb4d8502Sjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19fb4d8502Sjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20fb4d8502Sjsg  * OTHER DEALINGS IN THE SOFTWARE.
21fb4d8502Sjsg  *
22fb4d8502Sjsg  */
23fb4d8502Sjsg 
24fb4d8502Sjsg #ifndef __AMDGPU_ATOMFIRMWARE_H__
25fb4d8502Sjsg #define __AMDGPU_ATOMFIRMWARE_H__
26fb4d8502Sjsg 
27c349dbc7Sjsg #define get_index_into_master_table(master_table, table_name) (offsetof(struct master_table, table_name) / sizeof(uint16_t))
28c349dbc7Sjsg 
295ca02815Sjsg uint32_t amdgpu_atomfirmware_query_firmware_capability(struct amdgpu_device *adev);
305ca02815Sjsg bool amdgpu_atomfirmware_gpu_virtualization_supported(struct amdgpu_device *adev);
31fb4d8502Sjsg void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
32fb4d8502Sjsg int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
33c349dbc7Sjsg int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
34c349dbc7Sjsg 	int *vram_width, int *vram_type, int *vram_vendor);
35fb4d8502Sjsg int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
36fb4d8502Sjsg int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
37c349dbc7Sjsg bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
38c349dbc7Sjsg bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev);
395ca02815Sjsg bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address);
405ca02815Sjsg bool amdgpu_atomfirmware_mem_training_supported(struct amdgpu_device *adev);
415ca02815Sjsg bool amdgpu_atomfirmware_dynamic_boot_config_supported(struct amdgpu_device *adev);
42ad8b1aafSjsg int amdgpu_atomfirmware_get_fw_reserved_fb_size(struct amdgpu_device *adev);
43*1bb76ff1Sjsg int amdgpu_atomfirmware_asic_init(struct amdgpu_device *adev, bool fb_reset);
44fb4d8502Sjsg 
45fb4d8502Sjsg #endif
46