1*61519934Smiod /* $OpenBSD: vgareg.h,v 1.5 2009/02/01 14:37:22 miod Exp $ */ 27694ef9eSaaron /* $NetBSD: vgareg.h,v 1.2 1998/05/28 16:48:41 drochner Exp $ */ 37694ef9eSaaron 47694ef9eSaaron /* 57694ef9eSaaron * Copyright (c) 1998 67694ef9eSaaron * Matthias Drochner. All rights reserved. 77694ef9eSaaron * 87694ef9eSaaron * Redistribution and use in source and binary forms, with or without 97694ef9eSaaron * modification, are permitted provided that the following conditions 107694ef9eSaaron * are met: 117694ef9eSaaron * 1. Redistributions of source code must retain the above copyright 127694ef9eSaaron * notice, this list of conditions and the following disclaimer. 137694ef9eSaaron * 2. Redistributions in binary form must reproduce the above copyright 147694ef9eSaaron * notice, this list of conditions and the following disclaimer in the 157694ef9eSaaron * documentation and/or other materials provided with the distribution. 167694ef9eSaaron * 177694ef9eSaaron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 187694ef9eSaaron * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 197694ef9eSaaron * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 207694ef9eSaaron * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 217694ef9eSaaron * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 227694ef9eSaaron * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 237694ef9eSaaron * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 247694ef9eSaaron * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 257694ef9eSaaron * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 267694ef9eSaaron * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 277694ef9eSaaron * 287694ef9eSaaron */ 297694ef9eSaaron 307694ef9eSaaron struct reg_vgaattr { /* indexed via port 0x3c0 */ 31036ed616Smickey u_int8_t palette[16]; 32036ed616Smickey u_int8_t mode, overscan, colplen, horpixpan; 33036ed616Smickey u_int8_t colreset, misc; 34e7940adfSderaadt } __packed; 357694ef9eSaaron #define VGA_ATC_INDEX 0 367694ef9eSaaron #define VGA_ATC_DATAW 0 377694ef9eSaaron #define VGA_ATC_DATAR 1 387694ef9eSaaron 397694ef9eSaaron struct reg_vgats { /* indexed via port 0x3c4 */ 40036ed616Smickey u_int8_t syncreset, mode, wrplmask, fontsel, memmode; 41e7940adfSderaadt } __packed; 427694ef9eSaaron #define VGA_TS_INDEX 4 437694ef9eSaaron #define VGA_TS_DATA 5 447694ef9eSaaron 457694ef9eSaaron struct reg_vgagdc { /* indexed via port 0x3ce */ 46036ed616Smickey u_int8_t setres, ensetres, colorcomp, rotfunc; 47036ed616Smickey u_int8_t rdplanesel, mode, misc, colorcare; 48036ed616Smickey u_int8_t bitmask; 49e7940adfSderaadt } __packed; 507694ef9eSaaron #define VGA_GDC_INDEX 0xe 517694ef9eSaaron #define VGA_GDC_DATA 0xf 52*61519934Smiod 53*61519934Smiod #define VGA_DAC_MASK 0x06 /* pixel write mask */ 54*61519934Smiod #define VGA_DAC_READ 0x07 /* palette read address */ 55*61519934Smiod #define VGA_DAC_WRITE 0x08 /* palette write address */ 56*61519934Smiod #define VGA_DAC_DATA 0x09 /* palette data register */ 57