1 /* $OpenBSD: mpi.c,v 1.195 2014/09/03 00:46:04 dlg Exp $ */ 2 3 /* 4 * Copyright (c) 2005, 2006, 2009 David Gwynne <dlg@openbsd.org> 5 * Copyright (c) 2005, 2008, 2009 Marco Peereboom <marco@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include "bio.h" 21 22 #include <sys/param.h> 23 #include <sys/systm.h> 24 #include <sys/buf.h> 25 #include <sys/device.h> 26 #include <sys/ioctl.h> 27 #include <sys/proc.h> 28 #include <sys/malloc.h> 29 #include <sys/kernel.h> 30 #include <sys/mutex.h> 31 #include <sys/rwlock.h> 32 #include <sys/sensors.h> 33 #include <sys/dkio.h> 34 #include <sys/task.h> 35 36 #include <machine/bus.h> 37 38 #include <scsi/scsi_all.h> 39 #include <scsi/scsiconf.h> 40 41 #include <dev/biovar.h> 42 #include <dev/ic/mpireg.h> 43 #include <dev/ic/mpivar.h> 44 45 #ifdef MPI_DEBUG 46 uint32_t mpi_debug = 0 47 /* | MPI_D_CMD */ 48 /* | MPI_D_INTR */ 49 /* | MPI_D_MISC */ 50 /* | MPI_D_DMA */ 51 /* | MPI_D_IOCTL */ 52 /* | MPI_D_RW */ 53 /* | MPI_D_MEM */ 54 /* | MPI_D_CCB */ 55 /* | MPI_D_PPR */ 56 /* | MPI_D_RAID */ 57 /* | MPI_D_EVT */ 58 ; 59 #endif 60 61 struct cfdriver mpi_cd = { 62 NULL, 63 "mpi", 64 DV_DULL 65 }; 66 67 void mpi_scsi_cmd(struct scsi_xfer *); 68 void mpi_scsi_cmd_done(struct mpi_ccb *); 69 void mpi_minphys(struct buf *bp, struct scsi_link *sl); 70 int mpi_scsi_probe(struct scsi_link *); 71 int mpi_scsi_ioctl(struct scsi_link *, u_long, caddr_t, 72 int); 73 74 struct scsi_adapter mpi_switch = { 75 mpi_scsi_cmd, 76 mpi_minphys, 77 mpi_scsi_probe, 78 NULL, 79 mpi_scsi_ioctl 80 }; 81 82 struct mpi_dmamem *mpi_dmamem_alloc(struct mpi_softc *, size_t); 83 void mpi_dmamem_free(struct mpi_softc *, 84 struct mpi_dmamem *); 85 int mpi_alloc_ccbs(struct mpi_softc *); 86 void *mpi_get_ccb(void *); 87 void mpi_put_ccb(void *, void *); 88 int mpi_alloc_replies(struct mpi_softc *); 89 void mpi_push_replies(struct mpi_softc *); 90 void mpi_push_reply(struct mpi_softc *, struct mpi_rcb *); 91 92 void mpi_start(struct mpi_softc *, struct mpi_ccb *); 93 int mpi_poll(struct mpi_softc *, struct mpi_ccb *, int); 94 void mpi_poll_done(struct mpi_ccb *); 95 void mpi_reply(struct mpi_softc *, u_int32_t); 96 97 void mpi_wait(struct mpi_softc *sc, struct mpi_ccb *); 98 void mpi_wait_done(struct mpi_ccb *); 99 100 int mpi_cfg_spi_port(struct mpi_softc *); 101 void mpi_squash_ppr(struct mpi_softc *); 102 void mpi_run_ppr(struct mpi_softc *); 103 int mpi_ppr(struct mpi_softc *, struct scsi_link *, 104 struct mpi_cfg_raid_physdisk *, int, int, int); 105 int mpi_inq(struct mpi_softc *, u_int16_t, int); 106 107 int mpi_cfg_sas(struct mpi_softc *); 108 int mpi_cfg_fc(struct mpi_softc *); 109 110 void mpi_timeout_xs(void *); 111 int mpi_load_xs(struct mpi_ccb *); 112 113 u_int32_t mpi_read(struct mpi_softc *, bus_size_t); 114 void mpi_write(struct mpi_softc *, bus_size_t, u_int32_t); 115 int mpi_wait_eq(struct mpi_softc *, bus_size_t, u_int32_t, 116 u_int32_t); 117 int mpi_wait_ne(struct mpi_softc *, bus_size_t, u_int32_t, 118 u_int32_t); 119 120 int mpi_init(struct mpi_softc *); 121 int mpi_reset_soft(struct mpi_softc *); 122 int mpi_reset_hard(struct mpi_softc *); 123 124 int mpi_handshake_send(struct mpi_softc *, void *, size_t); 125 int mpi_handshake_recv_dword(struct mpi_softc *, 126 u_int32_t *); 127 int mpi_handshake_recv(struct mpi_softc *, void *, size_t); 128 129 void mpi_empty_done(struct mpi_ccb *); 130 131 int mpi_iocinit(struct mpi_softc *); 132 int mpi_iocfacts(struct mpi_softc *); 133 int mpi_portfacts(struct mpi_softc *); 134 int mpi_portenable(struct mpi_softc *); 135 int mpi_cfg_coalescing(struct mpi_softc *); 136 void mpi_get_raid(struct mpi_softc *); 137 int mpi_fwupload(struct mpi_softc *); 138 int mpi_manufacturing(struct mpi_softc *); 139 int mpi_scsi_probe_virtual(struct scsi_link *); 140 141 int mpi_eventnotify(struct mpi_softc *); 142 void mpi_eventnotify_done(struct mpi_ccb *); 143 void mpi_eventnotify_free(struct mpi_softc *, 144 struct mpi_rcb *); 145 void mpi_eventack(void *, void *); 146 void mpi_eventack_done(struct mpi_ccb *); 147 int mpi_evt_sas(struct mpi_softc *, struct mpi_rcb *); 148 void mpi_evt_sas_detach(void *, void *); 149 void mpi_evt_sas_detach_done(struct mpi_ccb *); 150 void mpi_fc_rescan(void *, void *); 151 152 int mpi_req_cfg_header(struct mpi_softc *, u_int8_t, 153 u_int8_t, u_int32_t, int, void *); 154 int mpi_req_cfg_page(struct mpi_softc *, u_int32_t, int, 155 void *, int, void *, size_t); 156 157 int mpi_ioctl_cache(struct scsi_link *, u_long, 158 struct dk_cache *); 159 160 #if NBIO > 0 161 int mpi_bio_get_pg0_raid(struct mpi_softc *, int); 162 int mpi_ioctl(struct device *, u_long, caddr_t); 163 int mpi_ioctl_inq(struct mpi_softc *, struct bioc_inq *); 164 int mpi_ioctl_vol(struct mpi_softc *, struct bioc_vol *); 165 int mpi_ioctl_disk(struct mpi_softc *, struct bioc_disk *); 166 int mpi_ioctl_setstate(struct mpi_softc *, struct bioc_setstate *); 167 #ifndef SMALL_KERNEL 168 int mpi_create_sensors(struct mpi_softc *); 169 void mpi_refresh_sensors(void *); 170 #endif /* SMALL_KERNEL */ 171 #endif /* NBIO > 0 */ 172 173 #define DEVNAME(s) ((s)->sc_dev.dv_xname) 174 175 #define dwordsof(s) (sizeof(s) / sizeof(u_int32_t)) 176 177 #define mpi_read_db(s) mpi_read((s), MPI_DOORBELL) 178 #define mpi_write_db(s, v) mpi_write((s), MPI_DOORBELL, (v)) 179 #define mpi_read_intr(s) bus_space_read_4((s)->sc_iot, (s)->sc_ioh, \ 180 MPI_INTR_STATUS) 181 #define mpi_write_intr(s, v) mpi_write((s), MPI_INTR_STATUS, (v)) 182 #define mpi_pop_reply(s) bus_space_read_4((s)->sc_iot, (s)->sc_ioh, \ 183 MPI_REPLY_QUEUE) 184 #define mpi_push_reply_db(s, v) bus_space_write_4((s)->sc_iot, (s)->sc_ioh, \ 185 MPI_REPLY_QUEUE, (v)) 186 187 #define mpi_wait_db_int(s) mpi_wait_ne((s), MPI_INTR_STATUS, \ 188 MPI_INTR_STATUS_DOORBELL, 0) 189 #define mpi_wait_db_ack(s) mpi_wait_eq((s), MPI_INTR_STATUS, \ 190 MPI_INTR_STATUS_IOCDOORBELL, 0) 191 192 #define MPI_PG_EXTENDED (1<<0) 193 #define MPI_PG_POLL (1<<1) 194 #define MPI_PG_FMT "\020" "\002POLL" "\001EXTENDED" 195 196 #define mpi_cfg_header(_s, _t, _n, _a, _h) \ 197 mpi_req_cfg_header((_s), (_t), (_n), (_a), \ 198 MPI_PG_POLL, (_h)) 199 #define mpi_ecfg_header(_s, _t, _n, _a, _h) \ 200 mpi_req_cfg_header((_s), (_t), (_n), (_a), \ 201 MPI_PG_POLL|MPI_PG_EXTENDED, (_h)) 202 203 #define mpi_cfg_page(_s, _a, _h, _r, _p, _l) \ 204 mpi_req_cfg_page((_s), (_a), MPI_PG_POLL, \ 205 (_h), (_r), (_p), (_l)) 206 #define mpi_ecfg_page(_s, _a, _h, _r, _p, _l) \ 207 mpi_req_cfg_page((_s), (_a), MPI_PG_POLL|MPI_PG_EXTENDED, \ 208 (_h), (_r), (_p), (_l)) 209 210 static inline void 211 mpi_dvatosge(struct mpi_sge *sge, u_int64_t dva) 212 { 213 htolem32(&sge->sg_addr_lo, dva); 214 htolem32(&sge->sg_addr_hi, dva >> 32); 215 } 216 217 int 218 mpi_attach(struct mpi_softc *sc) 219 { 220 struct scsibus_attach_args saa; 221 struct mpi_ccb *ccb; 222 223 printf("\n"); 224 225 rw_init(&sc->sc_lock, "mpi_lock"); 226 task_set(&sc->sc_evt_rescan, mpi_fc_rescan, sc, NULL); 227 228 /* disable interrupts */ 229 mpi_write(sc, MPI_INTR_MASK, 230 MPI_INTR_MASK_REPLY | MPI_INTR_MASK_DOORBELL); 231 232 if (mpi_init(sc) != 0) { 233 printf("%s: unable to initialise\n", DEVNAME(sc)); 234 return (1); 235 } 236 237 if (mpi_iocfacts(sc) != 0) { 238 printf("%s: unable to get iocfacts\n", DEVNAME(sc)); 239 return (1); 240 } 241 242 if (mpi_alloc_ccbs(sc) != 0) { 243 /* error already printed */ 244 return (1); 245 } 246 247 if (mpi_alloc_replies(sc) != 0) { 248 printf("%s: unable to allocate reply space\n", DEVNAME(sc)); 249 goto free_ccbs; 250 } 251 252 if (mpi_iocinit(sc) != 0) { 253 printf("%s: unable to send iocinit\n", DEVNAME(sc)); 254 goto free_ccbs; 255 } 256 257 /* spin until we're operational */ 258 if (mpi_wait_eq(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 259 MPI_DOORBELL_STATE_OPER) != 0) { 260 printf("%s: state: 0x%08x\n", DEVNAME(sc), 261 mpi_read_db(sc) & MPI_DOORBELL_STATE); 262 printf("%s: operational state timeout\n", DEVNAME(sc)); 263 goto free_ccbs; 264 } 265 266 mpi_push_replies(sc); 267 268 if (mpi_portfacts(sc) != 0) { 269 printf("%s: unable to get portfacts\n", DEVNAME(sc)); 270 goto free_replies; 271 } 272 273 if (mpi_cfg_coalescing(sc) != 0) { 274 printf("%s: unable to configure coalescing\n", DEVNAME(sc)); 275 goto free_replies; 276 } 277 278 switch (sc->sc_porttype) { 279 case MPI_PORTFACTS_PORTTYPE_SAS: 280 SIMPLEQ_INIT(&sc->sc_evt_scan_queue); 281 mtx_init(&sc->sc_evt_scan_mtx, IPL_BIO); 282 scsi_ioh_set(&sc->sc_evt_scan_handler, &sc->sc_iopool, 283 mpi_evt_sas_detach, sc); 284 /* FALLTHROUGH */ 285 case MPI_PORTFACTS_PORTTYPE_FC: 286 if (mpi_eventnotify(sc) != 0) { 287 printf("%s: unable to enable events\n", DEVNAME(sc)); 288 goto free_replies; 289 } 290 break; 291 } 292 293 if (mpi_portenable(sc) != 0) { 294 printf("%s: unable to enable port\n", DEVNAME(sc)); 295 goto free_replies; 296 } 297 298 if (mpi_fwupload(sc) != 0) { 299 printf("%s: unable to upload firmware\n", DEVNAME(sc)); 300 goto free_replies; 301 } 302 303 if (mpi_manufacturing(sc) != 0) { 304 printf("%s: unable to fetch manufacturing info\n", DEVNAME(sc)); goto free_replies; 305 } 306 307 switch (sc->sc_porttype) { 308 case MPI_PORTFACTS_PORTTYPE_SCSI: 309 if (mpi_cfg_spi_port(sc) != 0) { 310 printf("%s: unable to configure spi\n", DEVNAME(sc)); 311 goto free_replies; 312 } 313 mpi_squash_ppr(sc); 314 break; 315 case MPI_PORTFACTS_PORTTYPE_SAS: 316 if (mpi_cfg_sas(sc) != 0) { 317 printf("%s: unable to configure sas\n", DEVNAME(sc)); 318 goto free_replies; 319 } 320 break; 321 case MPI_PORTFACTS_PORTTYPE_FC: 322 if (mpi_cfg_fc(sc) != 0) { 323 printf("%s: unable to configure fc\n", DEVNAME(sc)); 324 goto free_replies; 325 } 326 break; 327 } 328 329 /* get raid pages */ 330 mpi_get_raid(sc); 331 #if NBIO > 0 332 if (sc->sc_flags & MPI_F_RAID) { 333 if (bio_register(&sc->sc_dev, mpi_ioctl) != 0) 334 panic("%s: controller registration failed", 335 DEVNAME(sc)); 336 else { 337 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 338 2, 0, &sc->sc_cfg_hdr) != 0) { 339 panic("%s: can't get IOC page 2 hdr", 340 DEVNAME(sc)); 341 } 342 343 sc->sc_vol_page = mallocarray(sc->sc_cfg_hdr.page_length, 344 4, M_TEMP, M_WAITOK | M_CANFAIL); 345 if (sc->sc_vol_page == NULL) { 346 panic("%s: can't get memory for IOC page 2, " 347 "bio disabled", DEVNAME(sc)); 348 } 349 350 if (mpi_cfg_page(sc, 0, &sc->sc_cfg_hdr, 1, 351 sc->sc_vol_page, 352 sc->sc_cfg_hdr.page_length * 4) != 0) { 353 panic("%s: can't get IOC page 2", DEVNAME(sc)); 354 } 355 356 sc->sc_vol_list = (struct mpi_cfg_raid_vol *) 357 (sc->sc_vol_page + 1); 358 359 sc->sc_ioctl = mpi_ioctl; 360 } 361 } 362 #endif /* NBIO > 0 */ 363 364 /* we should be good to go now, attach scsibus */ 365 sc->sc_link.adapter = &mpi_switch; 366 sc->sc_link.adapter_softc = sc; 367 sc->sc_link.adapter_target = sc->sc_target; 368 sc->sc_link.adapter_buswidth = sc->sc_buswidth; 369 sc->sc_link.openings = MAX(sc->sc_maxcmds / sc->sc_buswidth, 16); 370 sc->sc_link.pool = &sc->sc_iopool; 371 372 memset(&saa, 0, sizeof(saa)); 373 saa.saa_sc_link = &sc->sc_link; 374 375 /* config_found() returns the scsibus attached to us */ 376 sc->sc_scsibus = (struct scsibus_softc *) config_found(&sc->sc_dev, 377 &saa, scsiprint); 378 379 /* do domain validation */ 380 if (sc->sc_porttype == MPI_PORTFACTS_PORTTYPE_SCSI) 381 mpi_run_ppr(sc); 382 383 /* enable interrupts */ 384 mpi_write(sc, MPI_INTR_MASK, MPI_INTR_MASK_DOORBELL); 385 386 #if NBIO > 0 387 #ifndef SMALL_KERNEL 388 mpi_create_sensors(sc); 389 #endif /* SMALL_KERNEL */ 390 #endif /* NBIO > 0 */ 391 392 return (0); 393 394 free_replies: 395 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_replies), 0, 396 sc->sc_repq * MPI_REPLY_SIZE, BUS_DMASYNC_POSTREAD); 397 mpi_dmamem_free(sc, sc->sc_replies); 398 free_ccbs: 399 while ((ccb = mpi_get_ccb(sc)) != NULL) 400 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 401 mpi_dmamem_free(sc, sc->sc_requests); 402 free(sc->sc_ccbs, M_DEVBUF, 0); 403 404 return(1); 405 } 406 407 int 408 mpi_cfg_spi_port(struct mpi_softc *sc) 409 { 410 struct mpi_cfg_hdr hdr; 411 struct mpi_cfg_spi_port_pg1 port; 412 413 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_PORT, 1, 0x0, 414 &hdr) != 0) 415 return (1); 416 417 if (mpi_cfg_page(sc, 0x0, &hdr, 1, &port, sizeof(port)) != 0) 418 return (1); 419 420 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_spi_port_pg1\n", DEVNAME(sc)); 421 DNPRINTF(MPI_D_MISC, "%s: port_scsi_id: %d port_resp_ids 0x%04x\n", 422 DEVNAME(sc), port.port_scsi_id, letoh16(port.port_resp_ids)); 423 DNPRINTF(MPI_D_MISC, "%s: on_bus_timer_value: 0x%08x\n", DEVNAME(sc), 424 letoh32(port.port_scsi_id)); 425 DNPRINTF(MPI_D_MISC, "%s: target_config: 0x%02x id_config: 0x%04x\n", 426 DEVNAME(sc), port.target_config, letoh16(port.id_config)); 427 428 if (port.port_scsi_id == sc->sc_target && 429 port.port_resp_ids == htole16(1 << sc->sc_target) && 430 port.on_bus_timer_value != htole32(0x0)) 431 return (0); 432 433 DNPRINTF(MPI_D_MISC, "%s: setting port scsi id to %d\n", DEVNAME(sc), 434 sc->sc_target); 435 port.port_scsi_id = sc->sc_target; 436 port.port_resp_ids = htole16(1 << sc->sc_target); 437 port.on_bus_timer_value = htole32(0x07000000); /* XXX magic */ 438 439 if (mpi_cfg_page(sc, 0x0, &hdr, 0, &port, sizeof(port)) != 0) { 440 printf("%s: unable to configure port scsi id\n", DEVNAME(sc)); 441 return (1); 442 } 443 444 return (0); 445 } 446 447 void 448 mpi_squash_ppr(struct mpi_softc *sc) 449 { 450 struct mpi_cfg_hdr hdr; 451 struct mpi_cfg_spi_dev_pg1 page; 452 int i; 453 454 DNPRINTF(MPI_D_PPR, "%s: mpi_squash_ppr\n", DEVNAME(sc)); 455 456 for (i = 0; i < sc->sc_buswidth; i++) { 457 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 458 1, i, &hdr) != 0) 459 return; 460 461 if (mpi_cfg_page(sc, i, &hdr, 1, &page, sizeof(page)) != 0) 462 return; 463 464 DNPRINTF(MPI_D_PPR, "%s: target: %d req_params1: 0x%02x " 465 "req_offset: 0x%02x req_period: 0x%02x " 466 "req_params2: 0x%02x conf: 0x%08x\n", DEVNAME(sc), i, 467 page.req_params1, page.req_offset, page.req_period, 468 page.req_params2, letoh32(page.configuration)); 469 470 page.req_params1 = 0x0; 471 page.req_offset = 0x0; 472 page.req_period = 0x0; 473 page.req_params2 = 0x0; 474 page.configuration = htole32(0x0); 475 476 if (mpi_cfg_page(sc, i, &hdr, 0, &page, sizeof(page)) != 0) 477 return; 478 } 479 } 480 481 void 482 mpi_run_ppr(struct mpi_softc *sc) 483 { 484 struct mpi_cfg_hdr hdr; 485 struct mpi_cfg_spi_port_pg0 port_pg; 486 struct mpi_cfg_ioc_pg3 *physdisk_pg; 487 struct mpi_cfg_raid_physdisk *physdisk_list, *physdisk; 488 size_t pagelen; 489 struct scsi_link *link; 490 int i, tries; 491 492 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_PORT, 0, 0x0, 493 &hdr) != 0) { 494 DNPRINTF(MPI_D_PPR, "%s: mpi_run_ppr unable to fetch header\n", 495 DEVNAME(sc)); 496 return; 497 } 498 499 if (mpi_cfg_page(sc, 0x0, &hdr, 1, &port_pg, sizeof(port_pg)) != 0) { 500 DNPRINTF(MPI_D_PPR, "%s: mpi_run_ppr unable to fetch page\n", 501 DEVNAME(sc)); 502 return; 503 } 504 505 for (i = 0; i < sc->sc_buswidth; i++) { 506 link = scsi_get_link(sc->sc_scsibus, i, 0); 507 if (link == NULL) 508 continue; 509 510 /* do not ppr volumes */ 511 if (link->flags & SDEV_VIRTUAL) 512 continue; 513 514 tries = 0; 515 while (mpi_ppr(sc, link, NULL, port_pg.min_period, 516 port_pg.max_offset, tries) == EAGAIN) 517 tries++; 518 } 519 520 if ((sc->sc_flags & MPI_F_RAID) == 0) 521 return; 522 523 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 3, 0x0, 524 &hdr) != 0) { 525 DNPRINTF(MPI_D_RAID|MPI_D_PPR, "%s: mpi_run_ppr unable to " 526 "fetch ioc pg 3 header\n", DEVNAME(sc)); 527 return; 528 } 529 530 pagelen = hdr.page_length * 4; /* dwords to bytes */ 531 physdisk_pg = malloc(pagelen, M_TEMP, M_WAITOK|M_CANFAIL); 532 if (physdisk_pg == NULL) { 533 DNPRINTF(MPI_D_RAID|MPI_D_PPR, "%s: mpi_run_ppr unable to " 534 "allocate ioc pg 3\n", DEVNAME(sc)); 535 return; 536 } 537 physdisk_list = (struct mpi_cfg_raid_physdisk *)(physdisk_pg + 1); 538 539 if (mpi_cfg_page(sc, 0, &hdr, 1, physdisk_pg, pagelen) != 0) { 540 DNPRINTF(MPI_D_PPR|MPI_D_PPR, "%s: mpi_run_ppr unable to " 541 "fetch ioc page 3\n", DEVNAME(sc)); 542 goto out; 543 } 544 545 DNPRINTF(MPI_D_PPR|MPI_D_PPR, "%s: no_phys_disks: %d\n", DEVNAME(sc), 546 physdisk_pg->no_phys_disks); 547 548 for (i = 0; i < physdisk_pg->no_phys_disks; i++) { 549 physdisk = &physdisk_list[i]; 550 551 DNPRINTF(MPI_D_PPR|MPI_D_PPR, "%s: id: %d bus: %d ioc: %d " 552 "num: %d\n", DEVNAME(sc), physdisk->phys_disk_id, 553 physdisk->phys_disk_bus, physdisk->phys_disk_ioc, 554 physdisk->phys_disk_num); 555 556 if (physdisk->phys_disk_ioc != sc->sc_ioc_number) 557 continue; 558 559 tries = 0; 560 while (mpi_ppr(sc, NULL, physdisk, port_pg.min_period, 561 port_pg.max_offset, tries) == EAGAIN) 562 tries++; 563 } 564 565 out: 566 free(physdisk_pg, M_TEMP, 0); 567 } 568 569 int 570 mpi_ppr(struct mpi_softc *sc, struct scsi_link *link, 571 struct mpi_cfg_raid_physdisk *physdisk, int period, int offset, int try) 572 { 573 struct mpi_cfg_hdr hdr0, hdr1; 574 struct mpi_cfg_spi_dev_pg0 pg0; 575 struct mpi_cfg_spi_dev_pg1 pg1; 576 u_int32_t address; 577 int id; 578 int raid = 0; 579 580 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr period: %d offset: %d try: %d " 581 "link quirks: 0x%x\n", DEVNAME(sc), period, offset, try, 582 link->quirks); 583 584 if (try >= 3) 585 return (EIO); 586 587 if (physdisk == NULL) { 588 if ((link->inqdata.device & SID_TYPE) == T_PROCESSOR) 589 return (EIO); 590 591 address = link->target; 592 id = link->target; 593 } else { 594 raid = 1; 595 address = (physdisk->phys_disk_bus << 8) | 596 (physdisk->phys_disk_id); 597 id = physdisk->phys_disk_num; 598 } 599 600 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 0, 601 address, &hdr0) != 0) { 602 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch header 0\n", 603 DEVNAME(sc)); 604 return (EIO); 605 } 606 607 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 1, 608 address, &hdr1) != 0) { 609 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch header 1\n", 610 DEVNAME(sc)); 611 return (EIO); 612 } 613 614 #ifdef MPI_DEBUG 615 if (mpi_cfg_page(sc, address, &hdr0, 1, &pg0, sizeof(pg0)) != 0) { 616 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch page 0\n", 617 DEVNAME(sc)); 618 return (EIO); 619 } 620 621 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 0 neg_params1: 0x%02x " 622 "neg_offset: %d neg_period: 0x%02x neg_params2: 0x%02x " 623 "info: 0x%08x\n", DEVNAME(sc), pg0.neg_params1, pg0.neg_offset, 624 pg0.neg_period, pg0.neg_params2, letoh32(pg0.information)); 625 #endif 626 627 if (mpi_cfg_page(sc, address, &hdr1, 1, &pg1, sizeof(pg1)) != 0) { 628 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch page 1\n", 629 DEVNAME(sc)); 630 return (EIO); 631 } 632 633 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 1 req_params1: 0x%02x " 634 "req_offset: 0x%02x req_period: 0x%02x req_params2: 0x%02x " 635 "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset, 636 pg1.req_period, pg1.req_params2, letoh32(pg1.configuration)); 637 638 pg1.req_params1 = 0; 639 pg1.req_offset = offset; 640 pg1.req_period = period; 641 pg1.req_params2 &= ~MPI_CFG_SPI_DEV_1_REQPARAMS_WIDTH; 642 643 if (raid || !(link->quirks & SDEV_NOSYNC)) { 644 pg1.req_params2 |= MPI_CFG_SPI_DEV_1_REQPARAMS_WIDTH_WIDE; 645 646 switch (try) { 647 case 0: /* U320 */ 648 break; 649 case 1: /* U160 */ 650 pg1.req_period = 0x09; 651 break; 652 case 2: /* U80 */ 653 pg1.req_period = 0x0a; 654 break; 655 } 656 657 if (pg1.req_period < 0x09) { 658 /* Ultra320: enable QAS & PACKETIZED */ 659 pg1.req_params1 |= MPI_CFG_SPI_DEV_1_REQPARAMS_QAS | 660 MPI_CFG_SPI_DEV_1_REQPARAMS_PACKETIZED; 661 } 662 if (pg1.req_period < 0xa) { 663 /* >= Ultra160: enable dual xfers */ 664 pg1.req_params1 |= 665 MPI_CFG_SPI_DEV_1_REQPARAMS_DUALXFERS; 666 } 667 } 668 669 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 1 req_params1: 0x%02x " 670 "req_offset: 0x%02x req_period: 0x%02x req_params2: 0x%02x " 671 "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset, 672 pg1.req_period, pg1.req_params2, letoh32(pg1.configuration)); 673 674 if (mpi_cfg_page(sc, address, &hdr1, 0, &pg1, sizeof(pg1)) != 0) { 675 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to write page 1\n", 676 DEVNAME(sc)); 677 return (EIO); 678 } 679 680 if (mpi_cfg_page(sc, address, &hdr1, 1, &pg1, sizeof(pg1)) != 0) { 681 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to read page 1\n", 682 DEVNAME(sc)); 683 return (EIO); 684 } 685 686 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 1 req_params1: 0x%02x " 687 "req_offset: 0x%02x req_period: 0x%02x req_params2: 0x%02x " 688 "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset, 689 pg1.req_period, pg1.req_params2, letoh32(pg1.configuration)); 690 691 if (mpi_inq(sc, id, raid) != 0) { 692 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to do inquiry against " 693 "target %d\n", DEVNAME(sc), link->target); 694 return (EIO); 695 } 696 697 if (mpi_cfg_page(sc, address, &hdr0, 1, &pg0, sizeof(pg0)) != 0) { 698 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to read page 0 after " 699 "inquiry\n", DEVNAME(sc)); 700 return (EIO); 701 } 702 703 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 0 neg_params1: 0x%02x " 704 "neg_offset: %d neg_period: 0x%02x neg_params2: 0x%02x " 705 "info: 0x%08x\n", DEVNAME(sc), pg0.neg_params1, pg0.neg_offset, 706 pg0.neg_period, pg0.neg_params2, letoh32(pg0.information)); 707 708 if (!(lemtoh32(&pg0.information) & 0x07) && (try == 0)) { 709 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr U320 ppr rejected\n", 710 DEVNAME(sc)); 711 return (EAGAIN); 712 } 713 714 if ((((lemtoh32(&pg0.information) >> 8) & 0xff) > 0x09) && (try == 1)) { 715 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr U160 ppr rejected\n", 716 DEVNAME(sc)); 717 return (EAGAIN); 718 } 719 720 if (lemtoh32(&pg0.information) & 0x0e) { 721 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr ppr rejected: %0x\n", 722 DEVNAME(sc), lemtoh32(&pg0.information)); 723 return (EAGAIN); 724 } 725 726 switch(pg0.neg_period) { 727 case 0x08: 728 period = 160; 729 break; 730 case 0x09: 731 period = 80; 732 break; 733 case 0x0a: 734 period = 40; 735 break; 736 case 0x0b: 737 period = 20; 738 break; 739 case 0x0c: 740 period = 10; 741 break; 742 default: 743 period = 0; 744 break; 745 } 746 747 printf("%s: %s %d %s at %dMHz width %dbit offset %d " 748 "QAS %d DT %d IU %d\n", DEVNAME(sc), raid ? "phys disk" : "target", 749 id, period ? "Sync" : "Async", period, 750 (pg0.neg_params2 & MPI_CFG_SPI_DEV_0_NEGPARAMS_WIDTH_WIDE) ? 16 : 8, 751 pg0.neg_offset, 752 (pg0.neg_params1 & MPI_CFG_SPI_DEV_0_NEGPARAMS_QAS) ? 1 : 0, 753 (pg0.neg_params1 & MPI_CFG_SPI_DEV_0_NEGPARAMS_DUALXFERS) ? 1 : 0, 754 (pg0.neg_params1 & MPI_CFG_SPI_DEV_0_NEGPARAMS_PACKETIZED) ? 1 : 0); 755 756 return (0); 757 } 758 759 int 760 mpi_inq(struct mpi_softc *sc, u_int16_t target, int physdisk) 761 { 762 struct mpi_ccb *ccb; 763 struct scsi_inquiry inq; 764 struct { 765 struct mpi_msg_scsi_io io; 766 struct mpi_sge sge; 767 struct scsi_inquiry_data inqbuf; 768 struct scsi_sense_data sense; 769 } __packed *bundle; 770 struct mpi_msg_scsi_io *io; 771 struct mpi_sge *sge; 772 773 DNPRINTF(MPI_D_PPR, "%s: mpi_inq\n", DEVNAME(sc)); 774 775 memset(&inq, 0, sizeof(inq)); 776 inq.opcode = INQUIRY; 777 _lto2b(sizeof(struct scsi_inquiry_data), inq.length); 778 779 ccb = scsi_io_get(&sc->sc_iopool, SCSI_NOSLEEP); 780 if (ccb == NULL) 781 return (1); 782 783 ccb->ccb_done = mpi_empty_done; 784 785 bundle = ccb->ccb_cmd; 786 io = &bundle->io; 787 sge = &bundle->sge; 788 789 io->function = physdisk ? MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH : 790 MPI_FUNCTION_SCSI_IO_REQUEST; 791 /* 792 * bus is always 0 793 * io->bus = htole16(sc->sc_bus); 794 */ 795 io->target_id = target; 796 797 io->cdb_length = sizeof(inq); 798 io->sense_buf_len = sizeof(struct scsi_sense_data); 799 io->msg_flags = MPI_SCSIIO_SENSE_BUF_ADDR_WIDTH_64; 800 801 /* 802 * always lun 0 803 * io->lun[0] = htobe16(link->lun); 804 */ 805 806 io->direction = MPI_SCSIIO_DIR_READ; 807 io->tagging = MPI_SCSIIO_ATTR_NO_DISCONNECT; 808 809 memcpy(io->cdb, &inq, sizeof(inq)); 810 811 htolem32(&io->data_length, sizeof(struct scsi_inquiry_data)); 812 813 htolem32(&io->sense_buf_low_addr, ccb->ccb_cmd_dva + 814 ((u_int8_t *)&bundle->sense - (u_int8_t *)bundle)); 815 816 htolem32(&sge->sg_hdr, MPI_SGE_FL_TYPE_SIMPLE | MPI_SGE_FL_SIZE_64 | 817 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL | 818 (u_int32_t)sizeof(inq)); 819 820 mpi_dvatosge(sge, ccb->ccb_cmd_dva + 821 ((u_int8_t *)&bundle->inqbuf - (u_int8_t *)bundle)); 822 823 if (mpi_poll(sc, ccb, 5000) != 0) 824 return (1); 825 826 if (ccb->ccb_rcb != NULL) 827 mpi_push_reply(sc, ccb->ccb_rcb); 828 829 scsi_io_put(&sc->sc_iopool, ccb); 830 831 return (0); 832 } 833 834 int 835 mpi_cfg_sas(struct mpi_softc *sc) 836 { 837 struct mpi_ecfg_hdr ehdr; 838 struct mpi_cfg_sas_iou_pg1 *pg; 839 size_t pagelen; 840 int rv = 0; 841 842 if (mpi_ecfg_header(sc, MPI_CONFIG_REQ_EXTPAGE_TYPE_SAS_IO_UNIT, 1, 0, 843 &ehdr) != 0) 844 return (0); 845 846 pagelen = lemtoh16(&ehdr.ext_page_length) * 4; 847 pg = malloc(pagelen, M_TEMP, M_NOWAIT | M_ZERO); 848 if (pg == NULL) 849 return (ENOMEM); 850 851 if (mpi_ecfg_page(sc, 0, &ehdr, 1, pg, pagelen) != 0) 852 goto out; 853 854 if (pg->max_sata_q_depth != 32) { 855 pg->max_sata_q_depth = 32; 856 857 if (mpi_ecfg_page(sc, 0, &ehdr, 0, pg, pagelen) != 0) 858 goto out; 859 } 860 861 out: 862 free(pg, M_TEMP, 0); 863 return (rv); 864 } 865 866 int 867 mpi_cfg_fc(struct mpi_softc *sc) 868 { 869 struct mpi_cfg_hdr hdr; 870 struct mpi_cfg_fc_port_pg0 pg0; 871 struct mpi_cfg_fc_port_pg1 pg1; 872 873 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_FC_PORT, 0, 0, 874 &hdr) != 0) { 875 printf("%s: unable to fetch FC port header 0\n", DEVNAME(sc)); 876 return (1); 877 } 878 879 if (mpi_cfg_page(sc, 0, &hdr, 1, &pg0, sizeof(pg0)) != 0) { 880 printf("%s: unable to fetch FC port page 0\n", DEVNAME(sc)); 881 return (1); 882 } 883 884 sc->sc_link.port_wwn = letoh64(pg0.wwpn); 885 sc->sc_link.node_wwn = letoh64(pg0.wwnn); 886 887 /* configure port config more to our liking */ 888 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_FC_PORT, 1, 0, 889 &hdr) != 0) { 890 printf("%s: unable to fetch FC port header 1\n", DEVNAME(sc)); 891 return (1); 892 } 893 894 if (mpi_cfg_page(sc, 0, &hdr, 1, &pg1, sizeof(pg1)) != 0) { 895 printf("%s: unable to fetch FC port page 1\n", DEVNAME(sc)); 896 return (1); 897 } 898 899 SET(pg1.flags, htole32(MPI_CFG_FC_PORT_0_FLAGS_IMMEDIATE_ERROR | 900 MPI_CFG_FC_PORT_0_FLAGS_VERBOSE_RESCAN)); 901 902 if (mpi_cfg_page(sc, 0, &hdr, 0, &pg1, sizeof(pg1)) != 0) { 903 printf("%s: unable to set FC port page 1\n", DEVNAME(sc)); 904 return (1); 905 } 906 907 return (0); 908 } 909 910 void 911 mpi_detach(struct mpi_softc *sc) 912 { 913 914 } 915 916 int 917 mpi_intr(void *arg) 918 { 919 struct mpi_softc *sc = arg; 920 u_int32_t reg; 921 int rv = 0; 922 923 if ((mpi_read_intr(sc) & MPI_INTR_STATUS_REPLY) == 0) 924 return (rv); 925 926 while ((reg = mpi_pop_reply(sc)) != 0xffffffff) { 927 mpi_reply(sc, reg); 928 rv = 1; 929 } 930 931 return (rv); 932 } 933 934 void 935 mpi_reply(struct mpi_softc *sc, u_int32_t reg) 936 { 937 struct mpi_ccb *ccb; 938 struct mpi_rcb *rcb = NULL; 939 struct mpi_msg_reply *reply = NULL; 940 u_int32_t reply_dva; 941 int id; 942 int i; 943 944 DNPRINTF(MPI_D_INTR, "%s: mpi_reply reg: 0x%08x\n", DEVNAME(sc), reg); 945 946 if (reg & MPI_REPLY_QUEUE_ADDRESS) { 947 reply_dva = (reg & MPI_REPLY_QUEUE_ADDRESS_MASK) << 1; 948 i = (reply_dva - (u_int32_t)MPI_DMA_DVA(sc->sc_replies)) / 949 MPI_REPLY_SIZE; 950 rcb = &sc->sc_rcbs[i]; 951 952 bus_dmamap_sync(sc->sc_dmat, 953 MPI_DMA_MAP(sc->sc_replies), rcb->rcb_offset, 954 MPI_REPLY_SIZE, BUS_DMASYNC_POSTREAD); 955 956 reply = rcb->rcb_reply; 957 958 id = lemtoh32(&reply->msg_context); 959 } else { 960 switch (reg & MPI_REPLY_QUEUE_TYPE_MASK) { 961 case MPI_REPLY_QUEUE_TYPE_INIT: 962 id = reg & MPI_REPLY_QUEUE_CONTEXT; 963 break; 964 965 default: 966 panic("%s: unsupported context reply", 967 DEVNAME(sc)); 968 } 969 } 970 971 DNPRINTF(MPI_D_INTR, "%s: mpi_reply id: %d reply: %p\n", 972 DEVNAME(sc), id, reply); 973 974 ccb = &sc->sc_ccbs[id]; 975 976 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_requests), 977 ccb->ccb_offset, MPI_REQUEST_SIZE, 978 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 979 ccb->ccb_state = MPI_CCB_READY; 980 ccb->ccb_rcb = rcb; 981 982 ccb->ccb_done(ccb); 983 } 984 985 struct mpi_dmamem * 986 mpi_dmamem_alloc(struct mpi_softc *sc, size_t size) 987 { 988 struct mpi_dmamem *mdm; 989 int nsegs; 990 991 mdm = malloc(sizeof(struct mpi_dmamem), M_DEVBUF, M_NOWAIT | M_ZERO); 992 if (mdm == NULL) 993 return (NULL); 994 995 mdm->mdm_size = size; 996 997 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 998 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &mdm->mdm_map) != 0) 999 goto mdmfree; 1000 1001 if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mdm->mdm_seg, 1002 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO) != 0) 1003 goto destroy; 1004 1005 if (bus_dmamem_map(sc->sc_dmat, &mdm->mdm_seg, nsegs, size, 1006 &mdm->mdm_kva, BUS_DMA_NOWAIT) != 0) 1007 goto free; 1008 1009 if (bus_dmamap_load(sc->sc_dmat, mdm->mdm_map, mdm->mdm_kva, size, 1010 NULL, BUS_DMA_NOWAIT) != 0) 1011 goto unmap; 1012 1013 DNPRINTF(MPI_D_MEM, "%s: mpi_dmamem_alloc size: %d mdm: %#x " 1014 "map: %#x nsegs: %d segs: %#x kva: %x\n", 1015 DEVNAME(sc), size, mdm->mdm_map, nsegs, mdm->mdm_seg, mdm->mdm_kva); 1016 1017 return (mdm); 1018 1019 unmap: 1020 bus_dmamem_unmap(sc->sc_dmat, mdm->mdm_kva, size); 1021 free: 1022 bus_dmamem_free(sc->sc_dmat, &mdm->mdm_seg, 1); 1023 destroy: 1024 bus_dmamap_destroy(sc->sc_dmat, mdm->mdm_map); 1025 mdmfree: 1026 free(mdm, M_DEVBUF, 0); 1027 1028 return (NULL); 1029 } 1030 1031 void 1032 mpi_dmamem_free(struct mpi_softc *sc, struct mpi_dmamem *mdm) 1033 { 1034 DNPRINTF(MPI_D_MEM, "%s: mpi_dmamem_free %#x\n", DEVNAME(sc), mdm); 1035 1036 bus_dmamap_unload(sc->sc_dmat, mdm->mdm_map); 1037 bus_dmamem_unmap(sc->sc_dmat, mdm->mdm_kva, mdm->mdm_size); 1038 bus_dmamem_free(sc->sc_dmat, &mdm->mdm_seg, 1); 1039 bus_dmamap_destroy(sc->sc_dmat, mdm->mdm_map); 1040 free(mdm, M_DEVBUF, 0); 1041 } 1042 1043 int 1044 mpi_alloc_ccbs(struct mpi_softc *sc) 1045 { 1046 struct mpi_ccb *ccb; 1047 u_int8_t *cmd; 1048 int i; 1049 1050 SLIST_INIT(&sc->sc_ccb_free); 1051 mtx_init(&sc->sc_ccb_mtx, IPL_BIO); 1052 1053 sc->sc_ccbs = mallocarray(sc->sc_maxcmds, sizeof(struct mpi_ccb), 1054 M_DEVBUF, M_WAITOK | M_CANFAIL | M_ZERO); 1055 if (sc->sc_ccbs == NULL) { 1056 printf("%s: unable to allocate ccbs\n", DEVNAME(sc)); 1057 return (1); 1058 } 1059 1060 sc->sc_requests = mpi_dmamem_alloc(sc, 1061 MPI_REQUEST_SIZE * sc->sc_maxcmds); 1062 if (sc->sc_requests == NULL) { 1063 printf("%s: unable to allocate ccb dmamem\n", DEVNAME(sc)); 1064 goto free_ccbs; 1065 } 1066 cmd = MPI_DMA_KVA(sc->sc_requests); 1067 memset(cmd, 0, MPI_REQUEST_SIZE * sc->sc_maxcmds); 1068 1069 for (i = 0; i < sc->sc_maxcmds; i++) { 1070 ccb = &sc->sc_ccbs[i]; 1071 1072 if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, 1073 sc->sc_max_sgl_len, MAXPHYS, 0, 1074 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1075 &ccb->ccb_dmamap) != 0) { 1076 printf("%s: unable to create dma map\n", DEVNAME(sc)); 1077 goto free_maps; 1078 } 1079 1080 ccb->ccb_sc = sc; 1081 ccb->ccb_id = i; 1082 ccb->ccb_offset = MPI_REQUEST_SIZE * i; 1083 ccb->ccb_state = MPI_CCB_READY; 1084 1085 ccb->ccb_cmd = &cmd[ccb->ccb_offset]; 1086 ccb->ccb_cmd_dva = (u_int32_t)MPI_DMA_DVA(sc->sc_requests) + 1087 ccb->ccb_offset; 1088 1089 DNPRINTF(MPI_D_CCB, "%s: mpi_alloc_ccbs(%d) ccb: %#x map: %#x " 1090 "sc: %#x id: %#x offs: %#x cmd: %#x dva: %#x\n", 1091 DEVNAME(sc), i, ccb, ccb->ccb_dmamap, ccb->ccb_sc, 1092 ccb->ccb_id, ccb->ccb_offset, ccb->ccb_cmd, 1093 ccb->ccb_cmd_dva); 1094 1095 mpi_put_ccb(sc, ccb); 1096 } 1097 1098 scsi_iopool_init(&sc->sc_iopool, sc, mpi_get_ccb, mpi_put_ccb); 1099 1100 return (0); 1101 1102 free_maps: 1103 while ((ccb = mpi_get_ccb(sc)) != NULL) 1104 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 1105 1106 mpi_dmamem_free(sc, sc->sc_requests); 1107 free_ccbs: 1108 free(sc->sc_ccbs, M_DEVBUF, 0); 1109 1110 return (1); 1111 } 1112 1113 void * 1114 mpi_get_ccb(void *xsc) 1115 { 1116 struct mpi_softc *sc = xsc; 1117 struct mpi_ccb *ccb; 1118 1119 mtx_enter(&sc->sc_ccb_mtx); 1120 ccb = SLIST_FIRST(&sc->sc_ccb_free); 1121 if (ccb != NULL) { 1122 SLIST_REMOVE_HEAD(&sc->sc_ccb_free, ccb_link); 1123 ccb->ccb_state = MPI_CCB_READY; 1124 } 1125 mtx_leave(&sc->sc_ccb_mtx); 1126 1127 DNPRINTF(MPI_D_CCB, "%s: mpi_get_ccb %p\n", DEVNAME(sc), ccb); 1128 1129 return (ccb); 1130 } 1131 1132 void 1133 mpi_put_ccb(void *xsc, void *io) 1134 { 1135 struct mpi_softc *sc = xsc; 1136 struct mpi_ccb *ccb = io; 1137 1138 DNPRINTF(MPI_D_CCB, "%s: mpi_put_ccb %p\n", DEVNAME(sc), ccb); 1139 1140 #ifdef DIAGNOSTIC 1141 if (ccb->ccb_state == MPI_CCB_FREE) 1142 panic("mpi_put_ccb: double free"); 1143 #endif 1144 1145 ccb->ccb_state = MPI_CCB_FREE; 1146 ccb->ccb_cookie = NULL; 1147 ccb->ccb_done = NULL; 1148 memset(ccb->ccb_cmd, 0, MPI_REQUEST_SIZE); 1149 mtx_enter(&sc->sc_ccb_mtx); 1150 SLIST_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_link); 1151 mtx_leave(&sc->sc_ccb_mtx); 1152 } 1153 1154 int 1155 mpi_alloc_replies(struct mpi_softc *sc) 1156 { 1157 DNPRINTF(MPI_D_MISC, "%s: mpi_alloc_replies\n", DEVNAME(sc)); 1158 1159 sc->sc_rcbs = mallocarray(sc->sc_repq, sizeof(struct mpi_rcb), M_DEVBUF, 1160 M_WAITOK|M_CANFAIL); 1161 if (sc->sc_rcbs == NULL) 1162 return (1); 1163 1164 sc->sc_replies = mpi_dmamem_alloc(sc, sc->sc_repq * MPI_REPLY_SIZE); 1165 if (sc->sc_replies == NULL) { 1166 free(sc->sc_rcbs, M_DEVBUF, 0); 1167 return (1); 1168 } 1169 1170 return (0); 1171 } 1172 1173 void 1174 mpi_push_reply(struct mpi_softc *sc, struct mpi_rcb *rcb) 1175 { 1176 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_replies), 1177 rcb->rcb_offset, MPI_REPLY_SIZE, BUS_DMASYNC_PREREAD); 1178 mpi_push_reply_db(sc, rcb->rcb_reply_dva); 1179 } 1180 1181 void 1182 mpi_push_replies(struct mpi_softc *sc) 1183 { 1184 struct mpi_rcb *rcb; 1185 char *kva = MPI_DMA_KVA(sc->sc_replies); 1186 int i; 1187 1188 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_replies), 0, 1189 sc->sc_repq * MPI_REPLY_SIZE, BUS_DMASYNC_PREREAD); 1190 1191 for (i = 0; i < sc->sc_repq; i++) { 1192 rcb = &sc->sc_rcbs[i]; 1193 1194 rcb->rcb_reply = kva + MPI_REPLY_SIZE * i; 1195 rcb->rcb_offset = MPI_REPLY_SIZE * i; 1196 rcb->rcb_reply_dva = (u_int32_t)MPI_DMA_DVA(sc->sc_replies) + 1197 MPI_REPLY_SIZE * i; 1198 mpi_push_reply_db(sc, rcb->rcb_reply_dva); 1199 } 1200 } 1201 1202 void 1203 mpi_start(struct mpi_softc *sc, struct mpi_ccb *ccb) 1204 { 1205 struct mpi_msg_request *msg; 1206 1207 DNPRINTF(MPI_D_RW, "%s: mpi_start %#x\n", DEVNAME(sc), 1208 ccb->ccb_cmd_dva); 1209 1210 msg = ccb->ccb_cmd; 1211 htolem32(&msg->msg_context, ccb->ccb_id); 1212 1213 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_requests), 1214 ccb->ccb_offset, MPI_REQUEST_SIZE, 1215 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1216 1217 ccb->ccb_state = MPI_CCB_QUEUED; 1218 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 1219 MPI_REQ_QUEUE, ccb->ccb_cmd_dva); 1220 } 1221 1222 int 1223 mpi_poll(struct mpi_softc *sc, struct mpi_ccb *ccb, int timeout) 1224 { 1225 void (*done)(struct mpi_ccb *); 1226 void *cookie; 1227 int rv = 1; 1228 u_int32_t reg; 1229 1230 DNPRINTF(MPI_D_INTR, "%s: mpi_poll timeout %d\n", DEVNAME(sc), 1231 timeout); 1232 1233 done = ccb->ccb_done; 1234 cookie = ccb->ccb_cookie; 1235 1236 ccb->ccb_done = mpi_poll_done; 1237 ccb->ccb_cookie = &rv; 1238 1239 mpi_start(sc, ccb); 1240 while (rv == 1) { 1241 reg = mpi_pop_reply(sc); 1242 if (reg == 0xffffffff) { 1243 if (timeout-- == 0) { 1244 printf("%s: timeout\n", DEVNAME(sc)); 1245 goto timeout; 1246 } 1247 1248 delay(1000); 1249 continue; 1250 } 1251 1252 mpi_reply(sc, reg); 1253 } 1254 1255 ccb->ccb_cookie = cookie; 1256 done(ccb); 1257 1258 timeout: 1259 return (rv); 1260 } 1261 1262 void 1263 mpi_poll_done(struct mpi_ccb *ccb) 1264 { 1265 int *rv = ccb->ccb_cookie; 1266 1267 *rv = 0; 1268 } 1269 1270 void 1271 mpi_wait(struct mpi_softc *sc, struct mpi_ccb *ccb) 1272 { 1273 struct mutex cookie = MUTEX_INITIALIZER(IPL_BIO); 1274 void (*done)(struct mpi_ccb *); 1275 1276 done = ccb->ccb_done; 1277 ccb->ccb_done = mpi_wait_done; 1278 ccb->ccb_cookie = &cookie; 1279 1280 /* XXX this will wait forever for the ccb to complete */ 1281 1282 mpi_start(sc, ccb); 1283 1284 mtx_enter(&cookie); 1285 while (ccb->ccb_cookie != NULL) 1286 msleep(ccb, &cookie, PRIBIO, "mpiwait", 0); 1287 mtx_leave(&cookie); 1288 1289 done(ccb); 1290 } 1291 1292 void 1293 mpi_wait_done(struct mpi_ccb *ccb) 1294 { 1295 struct mutex *cookie = ccb->ccb_cookie; 1296 1297 mtx_enter(cookie); 1298 ccb->ccb_cookie = NULL; 1299 wakeup_one(ccb); 1300 mtx_leave(cookie); 1301 } 1302 1303 void 1304 mpi_scsi_cmd(struct scsi_xfer *xs) 1305 { 1306 struct scsi_link *link = xs->sc_link; 1307 struct mpi_softc *sc = link->adapter_softc; 1308 struct mpi_ccb *ccb; 1309 struct mpi_ccb_bundle *mcb; 1310 struct mpi_msg_scsi_io *io; 1311 1312 DNPRINTF(MPI_D_CMD, "%s: mpi_scsi_cmd\n", DEVNAME(sc)); 1313 1314 if (xs->cmdlen > MPI_CDB_LEN) { 1315 DNPRINTF(MPI_D_CMD, "%s: CBD too big %d\n", 1316 DEVNAME(sc), xs->cmdlen); 1317 memset(&xs->sense, 0, sizeof(xs->sense)); 1318 xs->sense.error_code = SSD_ERRCODE_VALID | SSD_ERRCODE_CURRENT; 1319 xs->sense.flags = SKEY_ILLEGAL_REQUEST; 1320 xs->sense.add_sense_code = 0x20; 1321 xs->error = XS_SENSE; 1322 scsi_done(xs); 1323 return; 1324 } 1325 1326 ccb = xs->io; 1327 1328 DNPRINTF(MPI_D_CMD, "%s: ccb_id: %d xs->flags: 0x%x\n", 1329 DEVNAME(sc), ccb->ccb_id, xs->flags); 1330 1331 ccb->ccb_cookie = xs; 1332 ccb->ccb_done = mpi_scsi_cmd_done; 1333 1334 mcb = ccb->ccb_cmd; 1335 io = &mcb->mcb_io; 1336 1337 io->function = MPI_FUNCTION_SCSI_IO_REQUEST; 1338 /* 1339 * bus is always 0 1340 * io->bus = htole16(sc->sc_bus); 1341 */ 1342 io->target_id = link->target; 1343 1344 io->cdb_length = xs->cmdlen; 1345 io->sense_buf_len = sizeof(xs->sense); 1346 io->msg_flags = MPI_SCSIIO_SENSE_BUF_ADDR_WIDTH_64; 1347 1348 htobem16(&io->lun[0], link->lun); 1349 1350 switch (xs->flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) { 1351 case SCSI_DATA_IN: 1352 io->direction = MPI_SCSIIO_DIR_READ; 1353 break; 1354 case SCSI_DATA_OUT: 1355 io->direction = MPI_SCSIIO_DIR_WRITE; 1356 break; 1357 default: 1358 io->direction = MPI_SCSIIO_DIR_NONE; 1359 break; 1360 } 1361 1362 if (sc->sc_porttype != MPI_PORTFACTS_PORTTYPE_SCSI && 1363 (link->quirks & SDEV_NOTAGS)) 1364 io->tagging = MPI_SCSIIO_ATTR_UNTAGGED; 1365 else 1366 io->tagging = MPI_SCSIIO_ATTR_SIMPLE_Q; 1367 1368 memcpy(io->cdb, xs->cmd, xs->cmdlen); 1369 1370 htolem32(&io->data_length, xs->datalen); 1371 1372 htolem32(&io->sense_buf_low_addr, ccb->ccb_cmd_dva + 1373 ((u_int8_t *)&mcb->mcb_sense - (u_int8_t *)mcb)); 1374 1375 if (mpi_load_xs(ccb) != 0) { 1376 xs->error = XS_DRIVER_STUFFUP; 1377 scsi_done(xs); 1378 return; 1379 } 1380 1381 timeout_set(&xs->stimeout, mpi_timeout_xs, ccb); 1382 1383 if (xs->flags & SCSI_POLL) { 1384 if (mpi_poll(sc, ccb, xs->timeout) != 0) { 1385 xs->error = XS_DRIVER_STUFFUP; 1386 scsi_done(xs); 1387 } 1388 return; 1389 } 1390 1391 mpi_start(sc, ccb); 1392 } 1393 1394 void 1395 mpi_scsi_cmd_done(struct mpi_ccb *ccb) 1396 { 1397 struct mpi_softc *sc = ccb->ccb_sc; 1398 struct scsi_xfer *xs = ccb->ccb_cookie; 1399 struct mpi_ccb_bundle *mcb = ccb->ccb_cmd; 1400 bus_dmamap_t dmap = ccb->ccb_dmamap; 1401 struct mpi_msg_scsi_io_error *sie; 1402 1403 if (xs->datalen != 0) { 1404 bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize, 1405 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD : 1406 BUS_DMASYNC_POSTWRITE); 1407 1408 bus_dmamap_unload(sc->sc_dmat, dmap); 1409 } 1410 1411 /* timeout_del */ 1412 xs->error = XS_NOERROR; 1413 xs->resid = 0; 1414 1415 if (ccb->ccb_rcb == NULL) { 1416 /* no scsi error, we're ok so drop out early */ 1417 xs->status = SCSI_OK; 1418 scsi_done(xs); 1419 return; 1420 } 1421 1422 sie = ccb->ccb_rcb->rcb_reply; 1423 1424 DNPRINTF(MPI_D_CMD, "%s: mpi_scsi_cmd_done xs cmd: 0x%02x len: %d " 1425 "flags 0x%x\n", DEVNAME(sc), xs->cmd->opcode, xs->datalen, 1426 xs->flags); 1427 DNPRINTF(MPI_D_CMD, "%s: target_id: %d bus: %d msg_length: %d " 1428 "function: 0x%02x\n", DEVNAME(sc), sie->target_id, sie->bus, 1429 sie->msg_length, sie->function); 1430 DNPRINTF(MPI_D_CMD, "%s: cdb_length: %d sense_buf_length: %d " 1431 "msg_flags: 0x%02x\n", DEVNAME(sc), sie->cdb_length, 1432 sie->sense_buf_len, sie->msg_flags); 1433 DNPRINTF(MPI_D_CMD, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 1434 letoh32(sie->msg_context)); 1435 DNPRINTF(MPI_D_CMD, "%s: scsi_status: 0x%02x scsi_state: 0x%02x " 1436 "ioc_status: 0x%04x\n", DEVNAME(sc), sie->scsi_status, 1437 sie->scsi_state, letoh16(sie->ioc_status)); 1438 DNPRINTF(MPI_D_CMD, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 1439 letoh32(sie->ioc_loginfo)); 1440 DNPRINTF(MPI_D_CMD, "%s: transfer_count: %d\n", DEVNAME(sc), 1441 letoh32(sie->transfer_count)); 1442 DNPRINTF(MPI_D_CMD, "%s: sense_count: %d\n", DEVNAME(sc), 1443 letoh32(sie->sense_count)); 1444 DNPRINTF(MPI_D_CMD, "%s: response_info: 0x%08x\n", DEVNAME(sc), 1445 letoh32(sie->response_info)); 1446 DNPRINTF(MPI_D_CMD, "%s: tag: 0x%04x\n", DEVNAME(sc), 1447 letoh16(sie->tag)); 1448 1449 xs->status = sie->scsi_status; 1450 switch (lemtoh16(&sie->ioc_status)) { 1451 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: 1452 xs->resid = xs->datalen - lemtoh32(&sie->transfer_count); 1453 if (sie->scsi_state & MPI_SCSIIO_ERR_STATE_NO_SCSI_STATUS) { 1454 xs->error = XS_DRIVER_STUFFUP; 1455 break; 1456 } 1457 /* FALLTHROUGH */ 1458 case MPI_IOCSTATUS_SUCCESS: 1459 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: 1460 switch (xs->status) { 1461 case SCSI_OK: 1462 xs->resid = 0; 1463 break; 1464 1465 case SCSI_CHECK: 1466 xs->error = XS_SENSE; 1467 break; 1468 1469 case SCSI_BUSY: 1470 case SCSI_QUEUE_FULL: 1471 xs->error = XS_BUSY; 1472 break; 1473 1474 default: 1475 xs->error = XS_DRIVER_STUFFUP; 1476 break; 1477 } 1478 break; 1479 1480 case MPI_IOCSTATUS_BUSY: 1481 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: 1482 xs->error = XS_BUSY; 1483 break; 1484 1485 case MPI_IOCSTATUS_SCSI_INVALID_BUS: 1486 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: 1487 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 1488 xs->error = XS_SELTIMEOUT; 1489 break; 1490 1491 case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: 1492 case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: 1493 xs->error = XS_RESET; 1494 break; 1495 1496 default: 1497 xs->error = XS_DRIVER_STUFFUP; 1498 break; 1499 } 1500 1501 if (sie->scsi_state & MPI_SCSIIO_ERR_STATE_AUTOSENSE_VALID) 1502 memcpy(&xs->sense, &mcb->mcb_sense, sizeof(xs->sense)); 1503 1504 DNPRINTF(MPI_D_CMD, "%s: xs err: 0x%02x status: %d\n", DEVNAME(sc), 1505 xs->error, xs->status); 1506 1507 mpi_push_reply(sc, ccb->ccb_rcb); 1508 KERNEL_LOCK(); 1509 scsi_done(xs); 1510 KERNEL_UNLOCK(); 1511 } 1512 1513 void 1514 mpi_timeout_xs(void *arg) 1515 { 1516 /* XXX */ 1517 } 1518 1519 int 1520 mpi_load_xs(struct mpi_ccb *ccb) 1521 { 1522 struct mpi_softc *sc = ccb->ccb_sc; 1523 struct scsi_xfer *xs = ccb->ccb_cookie; 1524 struct mpi_ccb_bundle *mcb = ccb->ccb_cmd; 1525 struct mpi_msg_scsi_io *io = &mcb->mcb_io; 1526 struct mpi_sge *sge, *nsge = &mcb->mcb_sgl[0]; 1527 struct mpi_sge *ce = NULL, *nce; 1528 bus_dmamap_t dmap = ccb->ccb_dmamap; 1529 u_int32_t addr, flags; 1530 int i, error; 1531 1532 if (xs->datalen == 0) { 1533 htolem32(&nsge->sg_hdr, MPI_SGE_FL_TYPE_SIMPLE | 1534 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL); 1535 return (0); 1536 } 1537 1538 error = bus_dmamap_load(sc->sc_dmat, dmap, 1539 xs->data, xs->datalen, NULL, BUS_DMA_STREAMING | 1540 (xs->flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 1541 if (error) { 1542 printf("%s: error %d loading dmamap\n", DEVNAME(sc), error); 1543 return (1); 1544 } 1545 1546 flags = MPI_SGE_FL_TYPE_SIMPLE | MPI_SGE_FL_SIZE_64; 1547 if (xs->flags & SCSI_DATA_OUT) 1548 flags |= MPI_SGE_FL_DIR_OUT; 1549 1550 if (dmap->dm_nsegs > sc->sc_first_sgl_len) { 1551 ce = &mcb->mcb_sgl[sc->sc_first_sgl_len - 1]; 1552 io->chain_offset = (u_int32_t *)ce - (u_int32_t *)io; 1553 } 1554 1555 for (i = 0; i < dmap->dm_nsegs; i++) { 1556 1557 if (nsge == ce) { 1558 nsge++; 1559 sge->sg_hdr |= htole32(MPI_SGE_FL_LAST); 1560 1561 if ((dmap->dm_nsegs - i) > sc->sc_chain_len) { 1562 nce = &nsge[sc->sc_chain_len - 1]; 1563 addr = (u_int32_t *)nce - (u_int32_t *)nsge; 1564 addr = addr << 16 | 1565 sizeof(struct mpi_sge) * sc->sc_chain_len; 1566 } else { 1567 nce = NULL; 1568 addr = sizeof(struct mpi_sge) * 1569 (dmap->dm_nsegs - i); 1570 } 1571 1572 ce->sg_hdr = htole32(MPI_SGE_FL_TYPE_CHAIN | 1573 MPI_SGE_FL_SIZE_64 | addr); 1574 1575 mpi_dvatosge(ce, ccb->ccb_cmd_dva + 1576 ((u_int8_t *)nsge - (u_int8_t *)mcb)); 1577 1578 ce = nce; 1579 } 1580 1581 DNPRINTF(MPI_D_DMA, "%s: %d: %d 0x%016llx\n", DEVNAME(sc), 1582 i, dmap->dm_segs[i].ds_len, 1583 (u_int64_t)dmap->dm_segs[i].ds_addr); 1584 1585 sge = nsge++; 1586 1587 sge->sg_hdr = htole32(flags | dmap->dm_segs[i].ds_len); 1588 mpi_dvatosge(sge, dmap->dm_segs[i].ds_addr); 1589 } 1590 1591 /* terminate list */ 1592 sge->sg_hdr |= htole32(MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | 1593 MPI_SGE_FL_EOL); 1594 1595 bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize, 1596 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD : 1597 BUS_DMASYNC_PREWRITE); 1598 1599 return (0); 1600 } 1601 1602 void 1603 mpi_minphys(struct buf *bp, struct scsi_link *sl) 1604 { 1605 /* XXX */ 1606 if (bp->b_bcount > MAXPHYS) 1607 bp->b_bcount = MAXPHYS; 1608 minphys(bp); 1609 } 1610 1611 int 1612 mpi_scsi_probe_virtual(struct scsi_link *link) 1613 { 1614 struct mpi_softc *sc = link->adapter_softc; 1615 struct mpi_cfg_hdr hdr; 1616 struct mpi_cfg_raid_vol_pg0 *rp0; 1617 int len; 1618 int rv; 1619 1620 if (!ISSET(sc->sc_flags, MPI_F_RAID)) 1621 return (0); 1622 1623 if (link->lun > 0) 1624 return (0); 1625 1626 rv = mpi_req_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_RAID_VOL, 1627 0, link->target, MPI_PG_POLL, &hdr); 1628 if (rv != 0) 1629 return (0); 1630 1631 len = hdr.page_length * 4; 1632 rp0 = malloc(len, M_TEMP, M_NOWAIT); 1633 if (rp0 == NULL) 1634 return (ENOMEM); 1635 1636 rv = mpi_req_cfg_page(sc, link->target, MPI_PG_POLL, &hdr, 1, rp0, len); 1637 if (rv == 0) 1638 SET(link->flags, SDEV_VIRTUAL); 1639 1640 free(rp0, M_TEMP, 0); 1641 return (0); 1642 } 1643 1644 int 1645 mpi_scsi_probe(struct scsi_link *link) 1646 { 1647 struct mpi_softc *sc = link->adapter_softc; 1648 struct mpi_ecfg_hdr ehdr; 1649 struct mpi_cfg_sas_dev_pg0 pg0; 1650 u_int32_t address; 1651 int rv; 1652 1653 rv = mpi_scsi_probe_virtual(link); 1654 if (rv != 0) 1655 return (rv); 1656 1657 if (ISSET(link->flags, SDEV_VIRTUAL)) 1658 return (0); 1659 1660 if (sc->sc_porttype != MPI_PORTFACTS_PORTTYPE_SAS) 1661 return (0); 1662 1663 address = MPI_CFG_SAS_DEV_ADDR_BUS | link->target; 1664 1665 if (mpi_ecfg_header(sc, MPI_CONFIG_REQ_EXTPAGE_TYPE_SAS_DEVICE, 0, 1666 address, &ehdr) != 0) 1667 return (EIO); 1668 1669 if (mpi_ecfg_page(sc, address, &ehdr, 1, &pg0, sizeof(pg0)) != 0) 1670 return (0); 1671 1672 DNPRINTF(MPI_D_MISC, "%s: mpi_scsi_probe sas dev pg 0 for target %d:\n", 1673 DEVNAME(sc), link->target); 1674 DNPRINTF(MPI_D_MISC, "%s: slot: 0x%04x enc_handle: 0x%04x\n", 1675 DEVNAME(sc), letoh16(pg0.slot), letoh16(pg0.enc_handle)); 1676 DNPRINTF(MPI_D_MISC, "%s: sas_addr: 0x%016llx\n", DEVNAME(sc), 1677 letoh64(pg0.sas_addr)); 1678 DNPRINTF(MPI_D_MISC, "%s: parent_dev_handle: 0x%04x phy_num: 0x%02x " 1679 "access_status: 0x%02x\n", DEVNAME(sc), 1680 letoh16(pg0.parent_dev_handle), pg0.phy_num, pg0.access_status); 1681 DNPRINTF(MPI_D_MISC, "%s: dev_handle: 0x%04x " 1682 "bus: 0x%02x target: 0x%02x\n", DEVNAME(sc), 1683 letoh16(pg0.dev_handle), pg0.bus, pg0.target); 1684 DNPRINTF(MPI_D_MISC, "%s: device_info: 0x%08x\n", DEVNAME(sc), 1685 letoh32(pg0.device_info)); 1686 DNPRINTF(MPI_D_MISC, "%s: flags: 0x%04x physical_port: 0x%02x\n", 1687 DEVNAME(sc), letoh16(pg0.flags), pg0.physical_port); 1688 1689 if (ISSET(lemtoh32(&pg0.device_info), 1690 MPI_CFG_SAS_DEV_0_DEVINFO_ATAPI_DEVICE)) { 1691 DNPRINTF(MPI_D_MISC, "%s: target %d is an ATAPI device\n", 1692 DEVNAME(sc), link->target); 1693 link->flags |= SDEV_ATAPI; 1694 link->quirks |= SDEV_ONLYBIG; 1695 } 1696 1697 return (0); 1698 } 1699 1700 u_int32_t 1701 mpi_read(struct mpi_softc *sc, bus_size_t r) 1702 { 1703 u_int32_t rv; 1704 1705 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1706 BUS_SPACE_BARRIER_READ); 1707 rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r); 1708 1709 DNPRINTF(MPI_D_RW, "%s: mpi_read %#x %#x\n", DEVNAME(sc), r, rv); 1710 1711 return (rv); 1712 } 1713 1714 void 1715 mpi_write(struct mpi_softc *sc, bus_size_t r, u_int32_t v) 1716 { 1717 DNPRINTF(MPI_D_RW, "%s: mpi_write %#x %#x\n", DEVNAME(sc), r, v); 1718 1719 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 1720 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1721 BUS_SPACE_BARRIER_WRITE); 1722 } 1723 1724 int 1725 mpi_wait_eq(struct mpi_softc *sc, bus_size_t r, u_int32_t mask, 1726 u_int32_t target) 1727 { 1728 int i; 1729 1730 DNPRINTF(MPI_D_RW, "%s: mpi_wait_eq %#x %#x %#x\n", DEVNAME(sc), r, 1731 mask, target); 1732 1733 for (i = 0; i < 10000; i++) { 1734 if ((mpi_read(sc, r) & mask) == target) 1735 return (0); 1736 delay(1000); 1737 } 1738 1739 return (1); 1740 } 1741 1742 int 1743 mpi_wait_ne(struct mpi_softc *sc, bus_size_t r, u_int32_t mask, 1744 u_int32_t target) 1745 { 1746 int i; 1747 1748 DNPRINTF(MPI_D_RW, "%s: mpi_wait_ne %#x %#x %#x\n", DEVNAME(sc), r, 1749 mask, target); 1750 1751 for (i = 0; i < 10000; i++) { 1752 if ((mpi_read(sc, r) & mask) != target) 1753 return (0); 1754 delay(1000); 1755 } 1756 1757 return (1); 1758 } 1759 1760 int 1761 mpi_init(struct mpi_softc *sc) 1762 { 1763 u_int32_t db; 1764 int i; 1765 1766 /* spin until the IOC leaves the RESET state */ 1767 if (mpi_wait_ne(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 1768 MPI_DOORBELL_STATE_RESET) != 0) { 1769 DNPRINTF(MPI_D_MISC, "%s: mpi_init timeout waiting to leave " 1770 "reset state\n", DEVNAME(sc)); 1771 return (1); 1772 } 1773 1774 /* check current ownership */ 1775 db = mpi_read_db(sc); 1776 if ((db & MPI_DOORBELL_WHOINIT) == MPI_DOORBELL_WHOINIT_PCIPEER) { 1777 DNPRINTF(MPI_D_MISC, "%s: mpi_init initialised by pci peer\n", 1778 DEVNAME(sc)); 1779 return (0); 1780 } 1781 1782 for (i = 0; i < 5; i++) { 1783 switch (db & MPI_DOORBELL_STATE) { 1784 case MPI_DOORBELL_STATE_READY: 1785 DNPRINTF(MPI_D_MISC, "%s: mpi_init ioc is ready\n", 1786 DEVNAME(sc)); 1787 return (0); 1788 1789 case MPI_DOORBELL_STATE_OPER: 1790 case MPI_DOORBELL_STATE_FAULT: 1791 DNPRINTF(MPI_D_MISC, "%s: mpi_init ioc is being " 1792 "reset\n" , DEVNAME(sc)); 1793 if (mpi_reset_soft(sc) != 0) 1794 mpi_reset_hard(sc); 1795 break; 1796 1797 case MPI_DOORBELL_STATE_RESET: 1798 DNPRINTF(MPI_D_MISC, "%s: mpi_init waiting to come " 1799 "out of reset\n", DEVNAME(sc)); 1800 if (mpi_wait_ne(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 1801 MPI_DOORBELL_STATE_RESET) != 0) 1802 return (1); 1803 break; 1804 } 1805 db = mpi_read_db(sc); 1806 } 1807 1808 return (1); 1809 } 1810 1811 int 1812 mpi_reset_soft(struct mpi_softc *sc) 1813 { 1814 DNPRINTF(MPI_D_MISC, "%s: mpi_reset_soft\n", DEVNAME(sc)); 1815 1816 if (mpi_read_db(sc) & MPI_DOORBELL_INUSE) 1817 return (1); 1818 1819 mpi_write_db(sc, 1820 MPI_DOORBELL_FUNCTION(MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET)); 1821 if (mpi_wait_eq(sc, MPI_INTR_STATUS, 1822 MPI_INTR_STATUS_IOCDOORBELL, 0) != 0) 1823 return (1); 1824 1825 if (mpi_wait_eq(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 1826 MPI_DOORBELL_STATE_READY) != 0) 1827 return (1); 1828 1829 return (0); 1830 } 1831 1832 int 1833 mpi_reset_hard(struct mpi_softc *sc) 1834 { 1835 DNPRINTF(MPI_D_MISC, "%s: mpi_reset_hard\n", DEVNAME(sc)); 1836 1837 /* enable diagnostic register */ 1838 mpi_write(sc, MPI_WRITESEQ, 0xff); 1839 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_1); 1840 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_2); 1841 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_3); 1842 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_4); 1843 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_5); 1844 1845 /* reset ioc */ 1846 mpi_write(sc, MPI_HOSTDIAG, MPI_HOSTDIAG_RESET_ADAPTER); 1847 1848 delay(10000); 1849 1850 /* disable diagnostic register */ 1851 mpi_write(sc, MPI_WRITESEQ, 0xff); 1852 1853 /* restore pci bits? */ 1854 1855 /* firmware bits? */ 1856 return (0); 1857 } 1858 1859 int 1860 mpi_handshake_send(struct mpi_softc *sc, void *buf, size_t dwords) 1861 { 1862 u_int32_t *query = buf; 1863 int i; 1864 1865 /* make sure the doorbell is not in use. */ 1866 if (mpi_read_db(sc) & MPI_DOORBELL_INUSE) 1867 return (1); 1868 1869 /* clear pending doorbell interrupts */ 1870 if (mpi_read_intr(sc) & MPI_INTR_STATUS_DOORBELL) 1871 mpi_write_intr(sc, 0); 1872 1873 /* 1874 * first write the doorbell with the handshake function and the 1875 * dword count. 1876 */ 1877 mpi_write_db(sc, MPI_DOORBELL_FUNCTION(MPI_FUNCTION_HANDSHAKE) | 1878 MPI_DOORBELL_DWORDS(dwords)); 1879 1880 /* 1881 * the doorbell used bit will be set because a doorbell function has 1882 * started. Wait for the interrupt and then ack it. 1883 */ 1884 if (mpi_wait_db_int(sc) != 0) 1885 return (1); 1886 mpi_write_intr(sc, 0); 1887 1888 /* poll for the acknowledgement. */ 1889 if (mpi_wait_db_ack(sc) != 0) 1890 return (1); 1891 1892 /* write the query through the doorbell. */ 1893 for (i = 0; i < dwords; i++) { 1894 mpi_write_db(sc, htole32(query[i])); 1895 if (mpi_wait_db_ack(sc) != 0) 1896 return (1); 1897 } 1898 1899 return (0); 1900 } 1901 1902 int 1903 mpi_handshake_recv_dword(struct mpi_softc *sc, u_int32_t *dword) 1904 { 1905 u_int16_t *words = (u_int16_t *)dword; 1906 int i; 1907 1908 for (i = 0; i < 2; i++) { 1909 if (mpi_wait_db_int(sc) != 0) 1910 return (1); 1911 words[i] = letoh16(mpi_read_db(sc) & MPI_DOORBELL_DATA_MASK); 1912 mpi_write_intr(sc, 0); 1913 } 1914 1915 return (0); 1916 } 1917 1918 int 1919 mpi_handshake_recv(struct mpi_softc *sc, void *buf, size_t dwords) 1920 { 1921 struct mpi_msg_reply *reply = buf; 1922 u_int32_t *dbuf = buf, dummy; 1923 int i; 1924 1925 /* get the first dword so we can read the length out of the header. */ 1926 if (mpi_handshake_recv_dword(sc, &dbuf[0]) != 0) 1927 return (1); 1928 1929 DNPRINTF(MPI_D_CMD, "%s: mpi_handshake_recv dwords: %d reply: %d\n", 1930 DEVNAME(sc), dwords, reply->msg_length); 1931 1932 /* 1933 * the total length, in dwords, is in the message length field of the 1934 * reply header. 1935 */ 1936 for (i = 1; i < MIN(dwords, reply->msg_length); i++) { 1937 if (mpi_handshake_recv_dword(sc, &dbuf[i]) != 0) 1938 return (1); 1939 } 1940 1941 /* if there's extra stuff to come off the ioc, discard it */ 1942 while (i++ < reply->msg_length) { 1943 if (mpi_handshake_recv_dword(sc, &dummy) != 0) 1944 return (1); 1945 DNPRINTF(MPI_D_CMD, "%s: mpi_handshake_recv dummy read: " 1946 "0x%08x\n", DEVNAME(sc), dummy); 1947 } 1948 1949 /* wait for the doorbell used bit to be reset and clear the intr */ 1950 if (mpi_wait_db_int(sc) != 0) 1951 return (1); 1952 mpi_write_intr(sc, 0); 1953 1954 return (0); 1955 } 1956 1957 void 1958 mpi_empty_done(struct mpi_ccb *ccb) 1959 { 1960 /* nothing to do */ 1961 } 1962 1963 int 1964 mpi_iocfacts(struct mpi_softc *sc) 1965 { 1966 struct mpi_msg_iocfacts_request ifq; 1967 struct mpi_msg_iocfacts_reply ifp; 1968 1969 DNPRINTF(MPI_D_MISC, "%s: mpi_iocfacts\n", DEVNAME(sc)); 1970 1971 memset(&ifq, 0, sizeof(ifq)); 1972 memset(&ifp, 0, sizeof(ifp)); 1973 1974 ifq.function = MPI_FUNCTION_IOC_FACTS; 1975 ifq.chain_offset = 0; 1976 ifq.msg_flags = 0; 1977 ifq.msg_context = htole32(0xdeadbeef); 1978 1979 if (mpi_handshake_send(sc, &ifq, dwordsof(ifq)) != 0) { 1980 DNPRINTF(MPI_D_MISC, "%s: mpi_iocfacts send failed\n", 1981 DEVNAME(sc)); 1982 return (1); 1983 } 1984 1985 if (mpi_handshake_recv(sc, &ifp, dwordsof(ifp)) != 0) { 1986 DNPRINTF(MPI_D_MISC, "%s: mpi_iocfacts recv failed\n", 1987 DEVNAME(sc)); 1988 return (1); 1989 } 1990 1991 DNPRINTF(MPI_D_MISC, "%s: func: 0x%02x len: %d msgver: %d.%d\n", 1992 DEVNAME(sc), ifp.function, ifp.msg_length, 1993 ifp.msg_version_maj, ifp.msg_version_min); 1994 DNPRINTF(MPI_D_MISC, "%s: msgflags: 0x%02x iocnumber: 0x%02x " 1995 "hdrver: %d.%d\n", DEVNAME(sc), ifp.msg_flags, 1996 ifp.ioc_number, ifp.header_version_maj, 1997 ifp.header_version_min); 1998 DNPRINTF(MPI_D_MISC, "%s: message context: 0x%08x\n", DEVNAME(sc), 1999 letoh32(ifp.msg_context)); 2000 DNPRINTF(MPI_D_MISC, "%s: iocstatus: 0x%04x ioexcept: 0x%04x\n", 2001 DEVNAME(sc), letoh16(ifp.ioc_status), 2002 letoh16(ifp.ioc_exceptions)); 2003 DNPRINTF(MPI_D_MISC, "%s: iocloginfo: 0x%08x\n", DEVNAME(sc), 2004 letoh32(ifp.ioc_loginfo)); 2005 DNPRINTF(MPI_D_MISC, "%s: flags: 0x%02x blocksize: %d whoinit: 0x%02x " 2006 "maxchdepth: %d\n", DEVNAME(sc), ifp.flags, 2007 ifp.block_size, ifp.whoinit, ifp.max_chain_depth); 2008 DNPRINTF(MPI_D_MISC, "%s: reqfrsize: %d replyqdepth: %d\n", 2009 DEVNAME(sc), letoh16(ifp.request_frame_size), 2010 letoh16(ifp.reply_queue_depth)); 2011 DNPRINTF(MPI_D_MISC, "%s: productid: 0x%04x\n", DEVNAME(sc), 2012 letoh16(ifp.product_id)); 2013 DNPRINTF(MPI_D_MISC, "%s: hostmfahiaddr: 0x%08x\n", DEVNAME(sc), 2014 letoh32(ifp.current_host_mfa_hi_addr)); 2015 DNPRINTF(MPI_D_MISC, "%s: event_state: 0x%02x number_of_ports: %d " 2016 "global_credits: %d\n", 2017 DEVNAME(sc), ifp.event_state, ifp.number_of_ports, 2018 letoh16(ifp.global_credits)); 2019 DNPRINTF(MPI_D_MISC, "%s: sensebufhiaddr: 0x%08x\n", DEVNAME(sc), 2020 letoh32(ifp.current_sense_buffer_hi_addr)); 2021 DNPRINTF(MPI_D_MISC, "%s: maxbus: %d maxdev: %d replyfrsize: %d\n", 2022 DEVNAME(sc), ifp.max_buses, ifp.max_devices, 2023 letoh16(ifp.current_reply_frame_size)); 2024 DNPRINTF(MPI_D_MISC, "%s: fw_image_size: %d\n", DEVNAME(sc), 2025 letoh32(ifp.fw_image_size)); 2026 DNPRINTF(MPI_D_MISC, "%s: ioc_capabilities: 0x%08x\n", DEVNAME(sc), 2027 letoh32(ifp.ioc_capabilities)); 2028 DNPRINTF(MPI_D_MISC, "%s: fw_version: %d.%d fw_version_unit: 0x%02x " 2029 "fw_version_dev: 0x%02x\n", DEVNAME(sc), 2030 ifp.fw_version_maj, ifp.fw_version_min, 2031 ifp.fw_version_unit, ifp.fw_version_dev); 2032 DNPRINTF(MPI_D_MISC, "%s: hi_priority_queue_depth: 0x%04x\n", 2033 DEVNAME(sc), letoh16(ifp.hi_priority_queue_depth)); 2034 DNPRINTF(MPI_D_MISC, "%s: host_page_buffer_sge: hdr: 0x%08x " 2035 "addr 0x%08lx%08lx\n", DEVNAME(sc), 2036 letoh32(ifp.host_page_buffer_sge.sg_hdr), 2037 letoh32(ifp.host_page_buffer_sge.sg_addr_hi), 2038 letoh32(ifp.host_page_buffer_sge.sg_addr_lo)); 2039 2040 sc->sc_fw_maj = ifp.fw_version_maj; 2041 sc->sc_fw_min = ifp.fw_version_min; 2042 sc->sc_fw_unit = ifp.fw_version_unit; 2043 sc->sc_fw_dev = ifp.fw_version_dev; 2044 2045 sc->sc_maxcmds = lemtoh16(&ifp.global_credits); 2046 sc->sc_maxchdepth = ifp.max_chain_depth; 2047 sc->sc_ioc_number = ifp.ioc_number; 2048 if (sc->sc_flags & MPI_F_SPI) 2049 sc->sc_buswidth = 16; 2050 else 2051 sc->sc_buswidth = 2052 (ifp.max_devices == 0) ? 256 : ifp.max_devices; 2053 if (ifp.flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) 2054 sc->sc_fw_len = lemtoh32(&ifp.fw_image_size); 2055 2056 sc->sc_repq = MIN(MPI_REPLYQ_DEPTH, lemtoh16(&ifp.reply_queue_depth)); 2057 2058 /* 2059 * you can fit sg elements on the end of the io cmd if they fit in the 2060 * request frame size. 2061 */ 2062 sc->sc_first_sgl_len = ((lemtoh16(&ifp.request_frame_size) * 4) - 2063 sizeof(struct mpi_msg_scsi_io)) / sizeof(struct mpi_sge); 2064 DNPRINTF(MPI_D_MISC, "%s: first sgl len: %d\n", DEVNAME(sc), 2065 sc->sc_first_sgl_len); 2066 2067 sc->sc_chain_len = (lemtoh16(&ifp.request_frame_size) * 4) / 2068 sizeof(struct mpi_sge); 2069 DNPRINTF(MPI_D_MISC, "%s: chain len: %d\n", DEVNAME(sc), 2070 sc->sc_chain_len); 2071 2072 /* the sgl tailing the io cmd loses an entry to the chain element. */ 2073 sc->sc_max_sgl_len = MPI_MAX_SGL - 1; 2074 /* the sgl chains lose an entry for each chain element */ 2075 sc->sc_max_sgl_len -= (MPI_MAX_SGL - sc->sc_first_sgl_len) / 2076 sc->sc_chain_len; 2077 DNPRINTF(MPI_D_MISC, "%s: max sgl len: %d\n", DEVNAME(sc), 2078 sc->sc_max_sgl_len); 2079 2080 /* XXX we're ignoring the max chain depth */ 2081 2082 return (0); 2083 } 2084 2085 int 2086 mpi_iocinit(struct mpi_softc *sc) 2087 { 2088 struct mpi_msg_iocinit_request iiq; 2089 struct mpi_msg_iocinit_reply iip; 2090 u_int32_t hi_addr; 2091 2092 DNPRINTF(MPI_D_MISC, "%s: mpi_iocinit\n", DEVNAME(sc)); 2093 2094 memset(&iiq, 0, sizeof(iiq)); 2095 memset(&iip, 0, sizeof(iip)); 2096 2097 iiq.function = MPI_FUNCTION_IOC_INIT; 2098 iiq.whoinit = MPI_WHOINIT_HOST_DRIVER; 2099 2100 iiq.max_devices = (sc->sc_buswidth == 256) ? 0 : sc->sc_buswidth; 2101 iiq.max_buses = 1; 2102 2103 iiq.msg_context = htole32(0xd00fd00f); 2104 2105 iiq.reply_frame_size = htole16(MPI_REPLY_SIZE); 2106 2107 hi_addr = (u_int32_t)(MPI_DMA_DVA(sc->sc_requests) >> 32); 2108 htolem32(&iiq.host_mfa_hi_addr, hi_addr); 2109 htolem32(&iiq.sense_buffer_hi_addr, hi_addr); 2110 2111 iiq.msg_version_maj = 0x01; 2112 iiq.msg_version_min = 0x02; 2113 2114 iiq.hdr_version_unit = 0x0d; 2115 iiq.hdr_version_dev = 0x00; 2116 2117 if (mpi_handshake_send(sc, &iiq, dwordsof(iiq)) != 0) { 2118 DNPRINTF(MPI_D_MISC, "%s: mpi_iocinit send failed\n", 2119 DEVNAME(sc)); 2120 return (1); 2121 } 2122 2123 if (mpi_handshake_recv(sc, &iip, dwordsof(iip)) != 0) { 2124 DNPRINTF(MPI_D_MISC, "%s: mpi_iocinit recv failed\n", 2125 DEVNAME(sc)); 2126 return (1); 2127 } 2128 2129 DNPRINTF(MPI_D_MISC, "%s: function: 0x%02x msg_length: %d " 2130 "whoinit: 0x%02x\n", DEVNAME(sc), iip.function, 2131 iip.msg_length, iip.whoinit); 2132 DNPRINTF(MPI_D_MISC, "%s: msg_flags: 0x%02x max_buses: %d " 2133 "max_devices: %d flags: 0x%02x\n", DEVNAME(sc), iip.msg_flags, 2134 iip.max_buses, iip.max_devices, iip.flags); 2135 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 2136 letoh32(iip.msg_context)); 2137 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 2138 letoh16(iip.ioc_status)); 2139 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 2140 letoh32(iip.ioc_loginfo)); 2141 2142 return (0); 2143 } 2144 2145 int 2146 mpi_portfacts(struct mpi_softc *sc) 2147 { 2148 struct mpi_ccb *ccb; 2149 struct mpi_msg_portfacts_request *pfq; 2150 volatile struct mpi_msg_portfacts_reply *pfp; 2151 int rv = 1; 2152 2153 DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts\n", DEVNAME(sc)); 2154 2155 ccb = scsi_io_get(&sc->sc_iopool, SCSI_NOSLEEP); 2156 if (ccb == NULL) { 2157 DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts ccb_get\n", 2158 DEVNAME(sc)); 2159 return (rv); 2160 } 2161 2162 ccb->ccb_done = mpi_empty_done; 2163 pfq = ccb->ccb_cmd; 2164 2165 pfq->function = MPI_FUNCTION_PORT_FACTS; 2166 pfq->chain_offset = 0; 2167 pfq->msg_flags = 0; 2168 pfq->port_number = 0; 2169 2170 if (mpi_poll(sc, ccb, 50000) != 0) { 2171 DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts poll\n", DEVNAME(sc)); 2172 goto err; 2173 } 2174 2175 if (ccb->ccb_rcb == NULL) { 2176 DNPRINTF(MPI_D_MISC, "%s: empty portfacts reply\n", 2177 DEVNAME(sc)); 2178 goto err; 2179 } 2180 pfp = ccb->ccb_rcb->rcb_reply; 2181 2182 DNPRINTF(MPI_D_MISC, "%s: function: 0x%02x msg_length: %d\n", 2183 DEVNAME(sc), pfp->function, pfp->msg_length); 2184 DNPRINTF(MPI_D_MISC, "%s: msg_flags: 0x%02x port_number: %d\n", 2185 DEVNAME(sc), pfp->msg_flags, pfp->port_number); 2186 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 2187 letoh32(pfp->msg_context)); 2188 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 2189 letoh16(pfp->ioc_status)); 2190 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 2191 letoh32(pfp->ioc_loginfo)); 2192 DNPRINTF(MPI_D_MISC, "%s: max_devices: %d port_type: 0x%02x\n", 2193 DEVNAME(sc), letoh16(pfp->max_devices), pfp->port_type); 2194 DNPRINTF(MPI_D_MISC, "%s: protocol_flags: 0x%04x port_scsi_id: %d\n", 2195 DEVNAME(sc), letoh16(pfp->protocol_flags), 2196 letoh16(pfp->port_scsi_id)); 2197 DNPRINTF(MPI_D_MISC, "%s: max_persistent_ids: %d " 2198 "max_posted_cmd_buffers: %d\n", DEVNAME(sc), 2199 letoh16(pfp->max_persistent_ids), 2200 letoh16(pfp->max_posted_cmd_buffers)); 2201 DNPRINTF(MPI_D_MISC, "%s: max_lan_buckets: %d\n", DEVNAME(sc), 2202 letoh16(pfp->max_lan_buckets)); 2203 2204 sc->sc_porttype = pfp->port_type; 2205 if (sc->sc_target == -1) 2206 sc->sc_target = lemtoh16(&pfp->port_scsi_id); 2207 2208 mpi_push_reply(sc, ccb->ccb_rcb); 2209 rv = 0; 2210 err: 2211 scsi_io_put(&sc->sc_iopool, ccb); 2212 2213 return (rv); 2214 } 2215 2216 int 2217 mpi_cfg_coalescing(struct mpi_softc *sc) 2218 { 2219 struct mpi_cfg_hdr hdr; 2220 struct mpi_cfg_ioc_pg1 pg; 2221 u_int32_t flags; 2222 2223 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 1, 0, &hdr) != 0) { 2224 DNPRINTF(MPI_D_MISC, "%s: unable to fetch IOC page 1 header\n", 2225 DEVNAME(sc)); 2226 return (1); 2227 } 2228 2229 if (mpi_cfg_page(sc, 0, &hdr, 1, &pg, sizeof(pg)) != 0) { 2230 DNPRINTF(MPI_D_MISC, "%s: unable to fetch IOC page 1\n", 2231 DEVNAME(sc)); 2232 return (1); 2233 } 2234 2235 DNPRINTF(MPI_D_MISC, "%s: IOC page 1\n", DEVNAME(sc)); 2236 DNPRINTF(MPI_D_MISC, "%s: flags: 0x%08x\n", DEVNAME(sc), 2237 letoh32(pg.flags)); 2238 DNPRINTF(MPI_D_MISC, "%s: coalescing_timeout: %d\n", DEVNAME(sc), 2239 letoh32(pg.coalescing_timeout)); 2240 DNPRINTF(MPI_D_MISC, "%s: coalescing_depth: %d pci_slot_num: %d\n", 2241 DEVNAME(sc), pg.coalescing_depth, pg.pci_slot_num); 2242 2243 flags = lemtoh32(&pg.flags); 2244 if (!ISSET(flags, MPI_CFG_IOC_1_REPLY_COALESCING)) 2245 return (0); 2246 2247 CLR(pg.flags, htole32(MPI_CFG_IOC_1_REPLY_COALESCING)); 2248 if (mpi_cfg_page(sc, 0, &hdr, 0, &pg, sizeof(pg)) != 0) { 2249 DNPRINTF(MPI_D_MISC, "%s: unable to clear coalescing\n", 2250 DEVNAME(sc)); 2251 return (1); 2252 } 2253 2254 return (0); 2255 } 2256 2257 int 2258 mpi_eventnotify(struct mpi_softc *sc) 2259 { 2260 struct mpi_ccb *ccb; 2261 struct mpi_msg_event_request *enq; 2262 2263 ccb = scsi_io_get(&sc->sc_iopool, SCSI_NOSLEEP); 2264 if (ccb == NULL) { 2265 DNPRINTF(MPI_D_MISC, "%s: mpi_eventnotify ccb_get\n", 2266 DEVNAME(sc)); 2267 return (1); 2268 } 2269 2270 sc->sc_evt_ccb = ccb; 2271 SIMPLEQ_INIT(&sc->sc_evt_ack_queue); 2272 mtx_init(&sc->sc_evt_ack_mtx, IPL_BIO); 2273 scsi_ioh_set(&sc->sc_evt_ack_handler, &sc->sc_iopool, 2274 mpi_eventack, sc); 2275 2276 ccb->ccb_done = mpi_eventnotify_done; 2277 enq = ccb->ccb_cmd; 2278 2279 enq->function = MPI_FUNCTION_EVENT_NOTIFICATION; 2280 enq->chain_offset = 0; 2281 enq->event_switch = MPI_EVENT_SWITCH_ON; 2282 2283 mpi_start(sc, ccb); 2284 return (0); 2285 } 2286 2287 void 2288 mpi_eventnotify_done(struct mpi_ccb *ccb) 2289 { 2290 struct mpi_softc *sc = ccb->ccb_sc; 2291 struct mpi_rcb *rcb = ccb->ccb_rcb; 2292 struct mpi_msg_event_reply *enp = rcb->rcb_reply; 2293 2294 DNPRINTF(MPI_D_EVT, "%s: mpi_eventnotify_done\n", DEVNAME(sc)); 2295 2296 DNPRINTF(MPI_D_EVT, "%s: function: 0x%02x msg_length: %d " 2297 "data_length: %d\n", DEVNAME(sc), enp->function, enp->msg_length, 2298 letoh16(enp->data_length)); 2299 DNPRINTF(MPI_D_EVT, "%s: ack_required: %d msg_flags 0x%02x\n", 2300 DEVNAME(sc), enp->ack_required, enp->msg_flags); 2301 DNPRINTF(MPI_D_EVT, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 2302 letoh32(enp->msg_context)); 2303 DNPRINTF(MPI_D_EVT, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 2304 letoh16(enp->ioc_status)); 2305 DNPRINTF(MPI_D_EVT, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 2306 letoh32(enp->ioc_loginfo)); 2307 DNPRINTF(MPI_D_EVT, "%s: event: 0x%08x\n", DEVNAME(sc), 2308 letoh32(enp->event)); 2309 DNPRINTF(MPI_D_EVT, "%s: event_context: 0x%08x\n", DEVNAME(sc), 2310 letoh32(enp->event_context)); 2311 2312 switch (lemtoh32(&enp->event)) { 2313 /* ignore these */ 2314 case MPI_EVENT_EVENT_CHANGE: 2315 case MPI_EVENT_SAS_PHY_LINK_STATUS: 2316 break; 2317 2318 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 2319 if (sc->sc_scsibus == NULL) 2320 break; 2321 2322 if (mpi_evt_sas(sc, rcb) != 0) { 2323 /* reply is freed later on */ 2324 return; 2325 } 2326 break; 2327 2328 case MPI_EVENT_RESCAN: 2329 if (sc->sc_scsibus != NULL && 2330 sc->sc_porttype == MPI_PORTFACTS_PORTTYPE_FC) 2331 task_add(systq, &sc->sc_evt_rescan); 2332 break; 2333 2334 default: 2335 DNPRINTF(MPI_D_EVT, "%s: unhandled event 0x%02x\n", 2336 DEVNAME(sc), lemtoh32(&enp->event)); 2337 break; 2338 } 2339 2340 mpi_eventnotify_free(sc, rcb); 2341 } 2342 2343 void 2344 mpi_eventnotify_free(struct mpi_softc *sc, struct mpi_rcb *rcb) 2345 { 2346 struct mpi_msg_event_reply *enp = rcb->rcb_reply; 2347 2348 if (enp->ack_required) { 2349 mtx_enter(&sc->sc_evt_ack_mtx); 2350 SIMPLEQ_INSERT_TAIL(&sc->sc_evt_ack_queue, rcb, rcb_link); 2351 mtx_leave(&sc->sc_evt_ack_mtx); 2352 scsi_ioh_add(&sc->sc_evt_ack_handler); 2353 } else 2354 mpi_push_reply(sc, rcb); 2355 } 2356 2357 int 2358 mpi_evt_sas(struct mpi_softc *sc, struct mpi_rcb *rcb) 2359 { 2360 struct mpi_evt_sas_change *ch; 2361 u_int8_t *data; 2362 2363 data = rcb->rcb_reply; 2364 data += sizeof(struct mpi_msg_event_reply); 2365 ch = (struct mpi_evt_sas_change *)data; 2366 2367 if (ch->bus != 0) 2368 return (0); 2369 2370 switch (ch->reason) { 2371 case MPI_EVT_SASCH_REASON_ADDED: 2372 case MPI_EVT_SASCH_REASON_NO_PERSIST_ADDED: 2373 if (scsi_req_probe(sc->sc_scsibus, ch->target, -1) != 0) { 2374 printf("%s: unable to request attach of %d\n", 2375 DEVNAME(sc), ch->target); 2376 } 2377 break; 2378 2379 case MPI_EVT_SASCH_REASON_NOT_RESPONDING: 2380 scsi_activate(sc->sc_scsibus, ch->target, -1, DVACT_DEACTIVATE); 2381 2382 mtx_enter(&sc->sc_evt_scan_mtx); 2383 SIMPLEQ_INSERT_TAIL(&sc->sc_evt_scan_queue, rcb, rcb_link); 2384 mtx_leave(&sc->sc_evt_scan_mtx); 2385 scsi_ioh_add(&sc->sc_evt_scan_handler); 2386 2387 /* we'll handle event ack later on */ 2388 return (1); 2389 2390 case MPI_EVT_SASCH_REASON_SMART_DATA: 2391 case MPI_EVT_SASCH_REASON_UNSUPPORTED: 2392 case MPI_EVT_SASCH_REASON_INTERNAL_RESET: 2393 break; 2394 default: 2395 printf("%s: unknown reason for SAS device status change: " 2396 "0x%02x\n", DEVNAME(sc), ch->reason); 2397 break; 2398 } 2399 2400 return (0); 2401 } 2402 2403 void 2404 mpi_evt_sas_detach(void *cookie, void *io) 2405 { 2406 struct mpi_softc *sc = cookie; 2407 struct mpi_ccb *ccb = io; 2408 struct mpi_rcb *rcb, *next; 2409 struct mpi_msg_event_reply *enp; 2410 struct mpi_evt_sas_change *ch; 2411 struct mpi_msg_scsi_task_request *str; 2412 2413 DNPRINTF(MPI_D_EVT, "%s: event sas detach handler\n", DEVNAME(sc)); 2414 2415 mtx_enter(&sc->sc_evt_scan_mtx); 2416 rcb = SIMPLEQ_FIRST(&sc->sc_evt_scan_queue); 2417 if (rcb != NULL) { 2418 next = SIMPLEQ_NEXT(rcb, rcb_link); 2419 SIMPLEQ_REMOVE_HEAD(&sc->sc_evt_scan_queue, rcb_link); 2420 } 2421 mtx_leave(&sc->sc_evt_scan_mtx); 2422 2423 if (rcb == NULL) { 2424 scsi_io_put(&sc->sc_iopool, ccb); 2425 return; 2426 } 2427 2428 enp = rcb->rcb_reply; 2429 ch = (struct mpi_evt_sas_change *)(enp + 1); 2430 2431 ccb->ccb_done = mpi_evt_sas_detach_done; 2432 str = ccb->ccb_cmd; 2433 2434 str->target_id = ch->target; 2435 str->bus = 0; 2436 str->function = MPI_FUNCTION_SCSI_TASK_MGMT; 2437 2438 str->task_type = MPI_MSG_SCSI_TASK_TYPE_TARGET_RESET; 2439 2440 mpi_eventnotify_free(sc, rcb); 2441 2442 mpi_start(sc, ccb); 2443 2444 if (next != NULL) 2445 scsi_ioh_add(&sc->sc_evt_scan_handler); 2446 } 2447 2448 void 2449 mpi_evt_sas_detach_done(struct mpi_ccb *ccb) 2450 { 2451 struct mpi_softc *sc = ccb->ccb_sc; 2452 struct mpi_msg_scsi_task_reply *r = ccb->ccb_rcb->rcb_reply; 2453 2454 if (scsi_req_detach(sc->sc_scsibus, r->target_id, -1, 2455 DETACH_FORCE) != 0) { 2456 printf("%s: unable to request detach of %d\n", 2457 DEVNAME(sc), r->target_id); 2458 } 2459 2460 mpi_push_reply(sc, ccb->ccb_rcb); 2461 scsi_io_put(&sc->sc_iopool, ccb); 2462 } 2463 2464 void 2465 mpi_fc_rescan(void *xsc, void *null) 2466 { 2467 struct mpi_softc *sc = xsc; 2468 struct mpi_cfg_hdr hdr; 2469 struct mpi_cfg_fc_device_pg0 pg; 2470 struct scsi_link *link; 2471 u_int8_t devmap[256 / NBBY]; 2472 u_int32_t id = 0xffffff; 2473 int i; 2474 2475 memset(devmap, 0, sizeof(devmap)); 2476 2477 do { 2478 if (mpi_req_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_FC_DEV, 0, 2479 id, 0, &hdr) != 0) { 2480 printf("%s: header get for rescan of 0x%08x failed\n", 2481 DEVNAME(sc), id); 2482 return; 2483 } 2484 2485 memset(&pg, 0, sizeof(pg)); 2486 if (mpi_req_cfg_page(sc, id, 0, &hdr, 1, &pg, sizeof(pg)) != 0) 2487 break; 2488 2489 if (ISSET(pg.flags, MPI_CFG_FC_DEV_0_FLAGS_BUSADDR_VALID) && 2490 pg.current_bus == 0) 2491 setbit(devmap, pg.current_target_id); 2492 2493 id = lemtoh32(&pg.port_id); 2494 } while (id <= 0xff0000); 2495 2496 for (i = 0; i < sc->sc_buswidth; i++) { 2497 link = scsi_get_link(sc->sc_scsibus, i, 0); 2498 2499 if (isset(devmap, i)) { 2500 if (link == NULL) 2501 scsi_probe_target(sc->sc_scsibus, i); 2502 } else { 2503 if (link != NULL) { 2504 scsi_activate(sc->sc_scsibus, i, -1, 2505 DVACT_DEACTIVATE); 2506 scsi_detach_target(sc->sc_scsibus, i, 2507 DETACH_FORCE); 2508 } 2509 } 2510 } 2511 } 2512 2513 void 2514 mpi_eventack(void *cookie, void *io) 2515 { 2516 struct mpi_softc *sc = cookie; 2517 struct mpi_ccb *ccb = io; 2518 struct mpi_rcb *rcb, *next; 2519 struct mpi_msg_event_reply *enp; 2520 struct mpi_msg_eventack_request *eaq; 2521 2522 DNPRINTF(MPI_D_EVT, "%s: event ack\n", DEVNAME(sc)); 2523 2524 mtx_enter(&sc->sc_evt_ack_mtx); 2525 rcb = SIMPLEQ_FIRST(&sc->sc_evt_ack_queue); 2526 if (rcb != NULL) { 2527 next = SIMPLEQ_NEXT(rcb, rcb_link); 2528 SIMPLEQ_REMOVE_HEAD(&sc->sc_evt_ack_queue, rcb_link); 2529 } 2530 mtx_leave(&sc->sc_evt_ack_mtx); 2531 2532 if (rcb == NULL) { 2533 scsi_io_put(&sc->sc_iopool, ccb); 2534 return; 2535 } 2536 2537 enp = rcb->rcb_reply; 2538 2539 ccb->ccb_done = mpi_eventack_done; 2540 eaq = ccb->ccb_cmd; 2541 2542 eaq->function = MPI_FUNCTION_EVENT_ACK; 2543 2544 eaq->event = enp->event; 2545 eaq->event_context = enp->event_context; 2546 2547 mpi_push_reply(sc, rcb); 2548 mpi_start(sc, ccb); 2549 2550 if (next != NULL) 2551 scsi_ioh_add(&sc->sc_evt_ack_handler); 2552 } 2553 2554 void 2555 mpi_eventack_done(struct mpi_ccb *ccb) 2556 { 2557 struct mpi_softc *sc = ccb->ccb_sc; 2558 2559 DNPRINTF(MPI_D_EVT, "%s: event ack done\n", DEVNAME(sc)); 2560 2561 mpi_push_reply(sc, ccb->ccb_rcb); 2562 scsi_io_put(&sc->sc_iopool, ccb); 2563 } 2564 2565 int 2566 mpi_portenable(struct mpi_softc *sc) 2567 { 2568 struct mpi_ccb *ccb; 2569 struct mpi_msg_portenable_request *peq; 2570 int rv = 0; 2571 2572 DNPRINTF(MPI_D_MISC, "%s: mpi_portenable\n", DEVNAME(sc)); 2573 2574 ccb = scsi_io_get(&sc->sc_iopool, SCSI_NOSLEEP); 2575 if (ccb == NULL) { 2576 DNPRINTF(MPI_D_MISC, "%s: mpi_portenable ccb_get\n", 2577 DEVNAME(sc)); 2578 return (1); 2579 } 2580 2581 ccb->ccb_done = mpi_empty_done; 2582 peq = ccb->ccb_cmd; 2583 2584 peq->function = MPI_FUNCTION_PORT_ENABLE; 2585 peq->port_number = 0; 2586 2587 if (mpi_poll(sc, ccb, 50000) != 0) { 2588 DNPRINTF(MPI_D_MISC, "%s: mpi_portenable poll\n", DEVNAME(sc)); 2589 return (1); 2590 } 2591 2592 if (ccb->ccb_rcb == NULL) { 2593 DNPRINTF(MPI_D_MISC, "%s: empty portenable reply\n", 2594 DEVNAME(sc)); 2595 rv = 1; 2596 } else 2597 mpi_push_reply(sc, ccb->ccb_rcb); 2598 2599 scsi_io_put(&sc->sc_iopool, ccb); 2600 2601 return (rv); 2602 } 2603 2604 int 2605 mpi_fwupload(struct mpi_softc *sc) 2606 { 2607 struct mpi_ccb *ccb; 2608 struct { 2609 struct mpi_msg_fwupload_request req; 2610 struct mpi_sge sge; 2611 } __packed *bundle; 2612 struct mpi_msg_fwupload_reply *upp; 2613 int rv = 0; 2614 2615 if (sc->sc_fw_len == 0) 2616 return (0); 2617 2618 DNPRINTF(MPI_D_MISC, "%s: mpi_fwupload\n", DEVNAME(sc)); 2619 2620 sc->sc_fw = mpi_dmamem_alloc(sc, sc->sc_fw_len); 2621 if (sc->sc_fw == NULL) { 2622 DNPRINTF(MPI_D_MISC, "%s: mpi_fwupload unable to allocate %d\n", 2623 DEVNAME(sc), sc->sc_fw_len); 2624 return (1); 2625 } 2626 2627 ccb = scsi_io_get(&sc->sc_iopool, SCSI_NOSLEEP); 2628 if (ccb == NULL) { 2629 DNPRINTF(MPI_D_MISC, "%s: mpi_fwupload ccb_get\n", 2630 DEVNAME(sc)); 2631 goto err; 2632 } 2633 2634 ccb->ccb_done = mpi_empty_done; 2635 bundle = ccb->ccb_cmd; 2636 2637 bundle->req.function = MPI_FUNCTION_FW_UPLOAD; 2638 2639 bundle->req.image_type = MPI_FWUPLOAD_IMAGETYPE_IOC_FW; 2640 2641 bundle->req.tce.details_length = 12; 2642 htolem32(&bundle->req.tce.image_size, sc->sc_fw_len); 2643 2644 htolem32(&bundle->sge.sg_hdr, MPI_SGE_FL_TYPE_SIMPLE | 2645 MPI_SGE_FL_SIZE_64 | MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | 2646 MPI_SGE_FL_EOL | (u_int32_t)sc->sc_fw_len); 2647 mpi_dvatosge(&bundle->sge, MPI_DMA_DVA(sc->sc_fw)); 2648 2649 if (mpi_poll(sc, ccb, 50000) != 0) { 2650 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header poll\n", DEVNAME(sc)); 2651 goto err; 2652 } 2653 2654 if (ccb->ccb_rcb == NULL) 2655 panic("%s: unable to do fw upload", DEVNAME(sc)); 2656 upp = ccb->ccb_rcb->rcb_reply; 2657 2658 if (lemtoh16(&upp->ioc_status) != MPI_IOCSTATUS_SUCCESS) 2659 rv = 1; 2660 2661 mpi_push_reply(sc, ccb->ccb_rcb); 2662 scsi_io_put(&sc->sc_iopool, ccb); 2663 2664 return (rv); 2665 2666 err: 2667 mpi_dmamem_free(sc, sc->sc_fw); 2668 return (1); 2669 } 2670 2671 int 2672 mpi_manufacturing(struct mpi_softc *sc) 2673 { 2674 char board_name[33]; 2675 struct mpi_cfg_hdr hdr; 2676 struct mpi_cfg_manufacturing_pg0 *pg; 2677 size_t pagelen; 2678 int rv = 1; 2679 2680 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_MANUFACTURING, 2681 0, 0, &hdr) != 0) 2682 return (1); 2683 2684 pagelen = hdr.page_length * 4; /* dwords to bytes */ 2685 if (pagelen < sizeof(*pg)) 2686 return (1); 2687 2688 pg = malloc(pagelen, M_TEMP, M_WAITOK|M_CANFAIL); 2689 if (pg == NULL) 2690 return (1); 2691 2692 if (mpi_cfg_page(sc, 0, &hdr, 1, pg, pagelen) != 0) 2693 goto out; 2694 2695 scsi_strvis(board_name, pg->board_name, sizeof(pg->board_name)); 2696 2697 printf("%s: %s, firmware %d.%d.%d.%d\n", DEVNAME(sc), board_name, 2698 sc->sc_fw_maj, sc->sc_fw_min, sc->sc_fw_unit, sc->sc_fw_dev); 2699 2700 rv = 0; 2701 2702 out: 2703 free(pg, M_TEMP, 0); 2704 return (rv); 2705 } 2706 2707 void 2708 mpi_get_raid(struct mpi_softc *sc) 2709 { 2710 struct mpi_cfg_hdr hdr; 2711 struct mpi_cfg_ioc_pg2 *vol_page; 2712 size_t pagelen; 2713 u_int32_t capabilities; 2714 2715 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid\n", DEVNAME(sc)); 2716 2717 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 2, 0, &hdr) != 0) { 2718 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid unable to fetch header" 2719 "for IOC page 2\n", DEVNAME(sc)); 2720 return; 2721 } 2722 2723 pagelen = hdr.page_length * 4; /* dwords to bytes */ 2724 vol_page = malloc(pagelen, M_TEMP, M_WAITOK|M_CANFAIL); 2725 if (vol_page == NULL) { 2726 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid unable to allocate " 2727 "space for ioc config page 2\n", DEVNAME(sc)); 2728 return; 2729 } 2730 2731 if (mpi_cfg_page(sc, 0, &hdr, 1, vol_page, pagelen) != 0) { 2732 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid unable to fetch IOC " 2733 "page 2\n", DEVNAME(sc)); 2734 goto out; 2735 } 2736 2737 capabilities = lemtoh32(&vol_page->capabilities); 2738 2739 DNPRINTF(MPI_D_RAID, "%s: capabilities: 0x08%x\n", DEVNAME(sc), 2740 letoh32(vol_page->capabilities)); 2741 DNPRINTF(MPI_D_RAID, "%s: active_vols: %d max_vols: %d " 2742 "active_physdisks: %d max_physdisks: %d\n", DEVNAME(sc), 2743 vol_page->active_vols, vol_page->max_vols, 2744 vol_page->active_physdisks, vol_page->max_physdisks); 2745 2746 /* don't walk list if there are no RAID capability */ 2747 if (capabilities == 0xdeadbeef) { 2748 printf("%s: deadbeef in raid configuration\n", DEVNAME(sc)); 2749 goto out; 2750 } 2751 2752 if (ISSET(capabilities, MPI_CFG_IOC_2_CAPABILITIES_RAID)) 2753 sc->sc_flags |= MPI_F_RAID; 2754 2755 out: 2756 free(vol_page, M_TEMP, 0); 2757 } 2758 2759 int 2760 mpi_req_cfg_header(struct mpi_softc *sc, u_int8_t type, u_int8_t number, 2761 u_int32_t address, int flags, void *p) 2762 { 2763 struct mpi_ccb *ccb; 2764 struct mpi_msg_config_request *cq; 2765 struct mpi_msg_config_reply *cp; 2766 struct mpi_cfg_hdr *hdr = p; 2767 struct mpi_ecfg_hdr *ehdr = p; 2768 int etype = 0; 2769 int rv = 0; 2770 2771 DNPRINTF(MPI_D_MISC, "%s: mpi_req_cfg_header type: %#x number: %x " 2772 "address: 0x%08x flags: 0x%b\n", DEVNAME(sc), type, number, 2773 address, flags, MPI_PG_FMT); 2774 2775 ccb = scsi_io_get(&sc->sc_iopool, 2776 ISSET(flags, MPI_PG_POLL) ? SCSI_NOSLEEP : 0); 2777 if (ccb == NULL) { 2778 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header ccb_get\n", 2779 DEVNAME(sc)); 2780 return (1); 2781 } 2782 2783 if (ISSET(flags, MPI_PG_EXTENDED)) { 2784 etype = type; 2785 type = MPI_CONFIG_REQ_PAGE_TYPE_EXTENDED; 2786 } 2787 2788 cq = ccb->ccb_cmd; 2789 2790 cq->function = MPI_FUNCTION_CONFIG; 2791 2792 cq->action = MPI_CONFIG_REQ_ACTION_PAGE_HEADER; 2793 2794 cq->config_header.page_number = number; 2795 cq->config_header.page_type = type; 2796 cq->ext_page_type = etype; 2797 htolem32(&cq->page_address, address); 2798 htolem32(&cq->page_buffer.sg_hdr, MPI_SGE_FL_TYPE_SIMPLE | 2799 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL); 2800 2801 ccb->ccb_done = mpi_empty_done; 2802 if (ISSET(flags, MPI_PG_POLL)) { 2803 if (mpi_poll(sc, ccb, 50000) != 0) { 2804 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header poll\n", 2805 DEVNAME(sc)); 2806 return (1); 2807 } 2808 } else 2809 mpi_wait(sc, ccb); 2810 2811 if (ccb->ccb_rcb == NULL) 2812 panic("%s: unable to fetch config header", DEVNAME(sc)); 2813 cp = ccb->ccb_rcb->rcb_reply; 2814 2815 DNPRINTF(MPI_D_MISC, "%s: action: 0x%02x msg_length: %d function: " 2816 "0x%02x\n", DEVNAME(sc), cp->action, cp->msg_length, cp->function); 2817 DNPRINTF(MPI_D_MISC, "%s: ext_page_length: %d ext_page_type: 0x%02x " 2818 "msg_flags: 0x%02x\n", DEVNAME(sc), 2819 letoh16(cp->ext_page_length), cp->ext_page_type, 2820 cp->msg_flags); 2821 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 2822 letoh32(cp->msg_context)); 2823 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 2824 letoh16(cp->ioc_status)); 2825 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 2826 letoh32(cp->ioc_loginfo)); 2827 DNPRINTF(MPI_D_MISC, "%s: page_version: 0x%02x page_length: %d " 2828 "page_number: 0x%02x page_type: 0x%02x\n", DEVNAME(sc), 2829 cp->config_header.page_version, 2830 cp->config_header.page_length, 2831 cp->config_header.page_number, 2832 cp->config_header.page_type); 2833 2834 if (lemtoh16(&cp->ioc_status) != MPI_IOCSTATUS_SUCCESS) 2835 rv = 1; 2836 else if (ISSET(flags, MPI_PG_EXTENDED)) { 2837 memset(ehdr, 0, sizeof(*ehdr)); 2838 ehdr->page_version = cp->config_header.page_version; 2839 ehdr->page_number = cp->config_header.page_number; 2840 ehdr->page_type = cp->config_header.page_type; 2841 ehdr->ext_page_length = cp->ext_page_length; 2842 ehdr->ext_page_type = cp->ext_page_type; 2843 } else 2844 *hdr = cp->config_header; 2845 2846 mpi_push_reply(sc, ccb->ccb_rcb); 2847 scsi_io_put(&sc->sc_iopool, ccb); 2848 2849 return (rv); 2850 } 2851 2852 int 2853 mpi_req_cfg_page(struct mpi_softc *sc, u_int32_t address, int flags, 2854 void *p, int read, void *page, size_t len) 2855 { 2856 struct mpi_ccb *ccb; 2857 struct mpi_msg_config_request *cq; 2858 struct mpi_msg_config_reply *cp; 2859 struct mpi_cfg_hdr *hdr = p; 2860 struct mpi_ecfg_hdr *ehdr = p; 2861 char *kva; 2862 int page_length; 2863 int rv = 0; 2864 2865 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_page address: %d read: %d type: %x\n", 2866 DEVNAME(sc), address, read, hdr->page_type); 2867 2868 page_length = ISSET(flags, MPI_PG_EXTENDED) ? 2869 lemtoh16(&ehdr->ext_page_length) : hdr->page_length; 2870 2871 if (len > MPI_REQUEST_SIZE - sizeof(struct mpi_msg_config_request) || 2872 len < page_length * 4) 2873 return (1); 2874 2875 ccb = scsi_io_get(&sc->sc_iopool, 2876 ISSET(flags, MPI_PG_POLL) ? SCSI_NOSLEEP : 0); 2877 if (ccb == NULL) { 2878 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_page ccb_get\n", DEVNAME(sc)); 2879 return (1); 2880 } 2881 2882 cq = ccb->ccb_cmd; 2883 2884 cq->function = MPI_FUNCTION_CONFIG; 2885 2886 cq->action = (read ? MPI_CONFIG_REQ_ACTION_PAGE_READ_CURRENT : 2887 MPI_CONFIG_REQ_ACTION_PAGE_WRITE_CURRENT); 2888 2889 if (ISSET(flags, MPI_PG_EXTENDED)) { 2890 cq->config_header.page_version = ehdr->page_version; 2891 cq->config_header.page_number = ehdr->page_number; 2892 cq->config_header.page_type = ehdr->page_type; 2893 cq->ext_page_len = ehdr->ext_page_length; 2894 cq->ext_page_type = ehdr->ext_page_type; 2895 } else 2896 cq->config_header = *hdr; 2897 cq->config_header.page_type &= MPI_CONFIG_REQ_PAGE_TYPE_MASK; 2898 htolem32(&cq->page_address, address); 2899 htolem32(&cq->page_buffer.sg_hdr, MPI_SGE_FL_TYPE_SIMPLE | 2900 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL | 2901 (page_length * 4) | 2902 (read ? MPI_SGE_FL_DIR_IN : MPI_SGE_FL_DIR_OUT)); 2903 2904 /* bounce the page via the request space to avoid more bus_dma games */ 2905 mpi_dvatosge(&cq->page_buffer, ccb->ccb_cmd_dva + 2906 sizeof(struct mpi_msg_config_request)); 2907 2908 kva = ccb->ccb_cmd; 2909 kva += sizeof(struct mpi_msg_config_request); 2910 if (!read) 2911 memcpy(kva, page, len); 2912 2913 ccb->ccb_done = mpi_empty_done; 2914 if (ISSET(flags, MPI_PG_POLL)) { 2915 if (mpi_poll(sc, ccb, 50000) != 0) { 2916 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header poll\n", 2917 DEVNAME(sc)); 2918 return (1); 2919 } 2920 } else 2921 mpi_wait(sc, ccb); 2922 2923 if (ccb->ccb_rcb == NULL) { 2924 scsi_io_put(&sc->sc_iopool, ccb); 2925 return (1); 2926 } 2927 cp = ccb->ccb_rcb->rcb_reply; 2928 2929 DNPRINTF(MPI_D_MISC, "%s: action: 0x%02x msg_length: %d function: " 2930 "0x%02x\n", DEVNAME(sc), cp->action, cp->msg_length, cp->function); 2931 DNPRINTF(MPI_D_MISC, "%s: ext_page_length: %d ext_page_type: 0x%02x " 2932 "msg_flags: 0x%02x\n", DEVNAME(sc), 2933 letoh16(cp->ext_page_length), cp->ext_page_type, 2934 cp->msg_flags); 2935 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 2936 letoh32(cp->msg_context)); 2937 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 2938 letoh16(cp->ioc_status)); 2939 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 2940 letoh32(cp->ioc_loginfo)); 2941 DNPRINTF(MPI_D_MISC, "%s: page_version: 0x%02x page_length: %d " 2942 "page_number: 0x%02x page_type: 0x%02x\n", DEVNAME(sc), 2943 cp->config_header.page_version, 2944 cp->config_header.page_length, 2945 cp->config_header.page_number, 2946 cp->config_header.page_type); 2947 2948 if (lemtoh16(&cp->ioc_status) != MPI_IOCSTATUS_SUCCESS) 2949 rv = 1; 2950 else if (read) 2951 memcpy(page, kva, len); 2952 2953 mpi_push_reply(sc, ccb->ccb_rcb); 2954 scsi_io_put(&sc->sc_iopool, ccb); 2955 2956 return (rv); 2957 } 2958 2959 int 2960 mpi_scsi_ioctl(struct scsi_link *link, u_long cmd, caddr_t addr, int flag) 2961 { 2962 struct mpi_softc *sc = (struct mpi_softc *)link->adapter_softc; 2963 2964 DNPRINTF(MPI_D_IOCTL, "%s: mpi_scsi_ioctl\n", DEVNAME(sc)); 2965 2966 switch (cmd) { 2967 case DIOCGCACHE: 2968 case DIOCSCACHE: 2969 if (ISSET(link->flags, SDEV_VIRTUAL)) { 2970 return (mpi_ioctl_cache(link, cmd, 2971 (struct dk_cache *)addr)); 2972 } 2973 break; 2974 2975 default: 2976 if (sc->sc_ioctl) 2977 return (sc->sc_ioctl(link->adapter_softc, cmd, addr)); 2978 2979 break; 2980 } 2981 2982 return (ENOTTY); 2983 } 2984 2985 int 2986 mpi_ioctl_cache(struct scsi_link *link, u_long cmd, struct dk_cache *dc) 2987 { 2988 struct mpi_softc *sc = (struct mpi_softc *)link->adapter_softc; 2989 struct mpi_ccb *ccb; 2990 int len, rv; 2991 struct mpi_cfg_hdr hdr; 2992 struct mpi_cfg_raid_vol_pg0 *rpg0; 2993 int enabled; 2994 struct mpi_msg_raid_action_request *req; 2995 struct mpi_msg_raid_action_reply *rep; 2996 struct mpi_raid_settings settings; 2997 2998 rv = mpi_req_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_RAID_VOL, 0, 2999 link->target, MPI_PG_POLL, &hdr); 3000 if (rv != 0) 3001 return (EIO); 3002 3003 len = sizeof(*rpg0) + sc->sc_vol_page->max_physdisks * 3004 sizeof(struct mpi_cfg_raid_vol_pg0_physdisk); 3005 rpg0 = malloc(len, M_TEMP, M_NOWAIT); 3006 if (rpg0 == NULL) 3007 return (ENOMEM); 3008 3009 if (mpi_req_cfg_page(sc, link->target, MPI_PG_POLL, &hdr, 1, 3010 rpg0, len) != 0) { 3011 DNPRINTF(MPI_D_RAID, "%s: can't get RAID vol cfg page 0\n", 3012 DEVNAME(sc)); 3013 rv = EIO; 3014 goto done; 3015 } 3016 3017 enabled = ISSET(lemtoh16(&rpg0->settings.volume_settings), 3018 MPI_CFG_RAID_VOL_0_SETTINGS_WRITE_CACHE_EN) ? 1 : 0; 3019 3020 if (cmd == DIOCGCACHE) { 3021 dc->wrcache = enabled; 3022 dc->rdcache = 0; 3023 goto done; 3024 } /* else DIOCSCACHE */ 3025 3026 if (dc->rdcache) { 3027 rv = EOPNOTSUPP; 3028 goto done; 3029 } 3030 3031 if (((dc->wrcache) ? 1 : 0) == enabled) 3032 goto done; 3033 3034 settings = rpg0->settings; 3035 if (dc->wrcache) { 3036 SET(settings.volume_settings, 3037 htole16(MPI_CFG_RAID_VOL_0_SETTINGS_WRITE_CACHE_EN)); 3038 } else { 3039 CLR(settings.volume_settings, 3040 htole16(MPI_CFG_RAID_VOL_0_SETTINGS_WRITE_CACHE_EN)); 3041 } 3042 3043 ccb = scsi_io_get(&sc->sc_iopool, SCSI_NOSLEEP); 3044 if (ccb == NULL) { 3045 rv = ENOMEM; 3046 goto done; 3047 } 3048 3049 req = ccb->ccb_cmd; 3050 req->function = MPI_FUNCTION_RAID_ACTION; 3051 req->action = MPI_MSG_RAID_ACTION_CH_VOL_SETTINGS; 3052 req->vol_id = rpg0->volume_id; 3053 req->vol_bus = rpg0->volume_bus; 3054 3055 memcpy(&req->data_word, &settings, sizeof(req->data_word)); 3056 ccb->ccb_done = mpi_empty_done; 3057 if (mpi_poll(sc, ccb, 50000) != 0) { 3058 rv = EIO; 3059 goto done; 3060 } 3061 3062 rep = (struct mpi_msg_raid_action_reply *)ccb->ccb_rcb; 3063 if (rep == NULL) 3064 panic("%s: raid volume settings change failed", DEVNAME(sc)); 3065 3066 switch (lemtoh16(&rep->action_status)) { 3067 case MPI_RAID_ACTION_STATUS_OK: 3068 rv = 0; 3069 break; 3070 default: 3071 rv = EIO; 3072 break; 3073 } 3074 3075 mpi_push_reply(sc, ccb->ccb_rcb); 3076 scsi_io_put(&sc->sc_iopool, ccb); 3077 3078 done: 3079 free(rpg0, M_TEMP, 0); 3080 return (rv); 3081 } 3082 3083 #if NBIO > 0 3084 int 3085 mpi_bio_get_pg0_raid(struct mpi_softc *sc, int id) 3086 { 3087 int len, rv = EINVAL; 3088 u_int32_t address; 3089 struct mpi_cfg_hdr hdr; 3090 struct mpi_cfg_raid_vol_pg0 *rpg0; 3091 3092 /* get IOC page 2 */ 3093 if (mpi_req_cfg_page(sc, 0, 0, &sc->sc_cfg_hdr, 1, sc->sc_vol_page, 3094 sc->sc_cfg_hdr.page_length * 4) != 0) { 3095 DNPRINTF(MPI_D_IOCTL, "%s: mpi_bio_get_pg0_raid unable to " 3096 "fetch IOC page 2\n", DEVNAME(sc)); 3097 goto done; 3098 } 3099 3100 /* XXX return something else than EINVAL to indicate within hs range */ 3101 if (id > sc->sc_vol_page->active_vols) { 3102 DNPRINTF(MPI_D_IOCTL, "%s: mpi_bio_get_pg0_raid invalid vol " 3103 "id: %d\n", DEVNAME(sc), id); 3104 goto done; 3105 } 3106 3107 /* replace current buffer with new one */ 3108 len = sizeof *rpg0 + sc->sc_vol_page->max_physdisks * 3109 sizeof(struct mpi_cfg_raid_vol_pg0_physdisk); 3110 rpg0 = malloc(len, M_DEVBUF, M_WAITOK | M_CANFAIL); 3111 if (rpg0 == NULL) { 3112 printf("%s: can't get memory for RAID page 0, " 3113 "bio disabled\n", DEVNAME(sc)); 3114 goto done; 3115 } 3116 if (sc->sc_rpg0) 3117 free(sc->sc_rpg0, M_DEVBUF, 0); 3118 sc->sc_rpg0 = rpg0; 3119 3120 /* get raid vol page 0 */ 3121 address = sc->sc_vol_list[id].vol_id | 3122 (sc->sc_vol_list[id].vol_bus << 8); 3123 if (mpi_req_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_RAID_VOL, 0, 3124 address, 0, &hdr) != 0) 3125 goto done; 3126 if (mpi_req_cfg_page(sc, address, 0, &hdr, 1, rpg0, len)) { 3127 DNPRINTF(MPI_D_RAID, "%s: can't get RAID vol cfg page 0\n", 3128 DEVNAME(sc)); 3129 goto done; 3130 } 3131 3132 rv = 0; 3133 done: 3134 return (rv); 3135 } 3136 3137 int 3138 mpi_ioctl(struct device *dev, u_long cmd, caddr_t addr) 3139 { 3140 struct mpi_softc *sc = (struct mpi_softc *)dev; 3141 int error = 0; 3142 3143 DNPRINTF(MPI_D_IOCTL, "%s: mpi_ioctl ", DEVNAME(sc)); 3144 3145 /* make sure we have bio enabled */ 3146 if (sc->sc_ioctl != mpi_ioctl) 3147 return (EINVAL); 3148 3149 rw_enter_write(&sc->sc_lock); 3150 3151 switch (cmd) { 3152 case BIOCINQ: 3153 DNPRINTF(MPI_D_IOCTL, "inq\n"); 3154 error = mpi_ioctl_inq(sc, (struct bioc_inq *)addr); 3155 break; 3156 3157 case BIOCVOL: 3158 DNPRINTF(MPI_D_IOCTL, "vol\n"); 3159 error = mpi_ioctl_vol(sc, (struct bioc_vol *)addr); 3160 break; 3161 3162 case BIOCDISK: 3163 DNPRINTF(MPI_D_IOCTL, "disk\n"); 3164 error = mpi_ioctl_disk(sc, (struct bioc_disk *)addr); 3165 break; 3166 3167 case BIOCALARM: 3168 DNPRINTF(MPI_D_IOCTL, "alarm\n"); 3169 break; 3170 3171 case BIOCBLINK: 3172 DNPRINTF(MPI_D_IOCTL, "blink\n"); 3173 break; 3174 3175 case BIOCSETSTATE: 3176 DNPRINTF(MPI_D_IOCTL, "setstate\n"); 3177 error = mpi_ioctl_setstate(sc, (struct bioc_setstate *)addr); 3178 break; 3179 3180 default: 3181 DNPRINTF(MPI_D_IOCTL, " invalid ioctl\n"); 3182 error = EINVAL; 3183 } 3184 3185 rw_exit_write(&sc->sc_lock); 3186 3187 return (error); 3188 } 3189 3190 int 3191 mpi_ioctl_inq(struct mpi_softc *sc, struct bioc_inq *bi) 3192 { 3193 if (!(sc->sc_flags & MPI_F_RAID)) { 3194 bi->bi_novol = 0; 3195 bi->bi_nodisk = 0; 3196 } 3197 3198 if (mpi_cfg_page(sc, 0, &sc->sc_cfg_hdr, 1, sc->sc_vol_page, 3199 sc->sc_cfg_hdr.page_length * 4) != 0) { 3200 DNPRINTF(MPI_D_IOCTL, "%s: mpi_get_raid unable to fetch IOC " 3201 "page 2\n", DEVNAME(sc)); 3202 return (EINVAL); 3203 } 3204 3205 DNPRINTF(MPI_D_IOCTL, "%s: active_vols: %d max_vols: %d " 3206 "active_physdisks: %d max_physdisks: %d\n", DEVNAME(sc), 3207 sc->sc_vol_page->active_vols, sc->sc_vol_page->max_vols, 3208 sc->sc_vol_page->active_physdisks, sc->sc_vol_page->max_physdisks); 3209 3210 bi->bi_novol = sc->sc_vol_page->active_vols; 3211 bi->bi_nodisk = sc->sc_vol_page->active_physdisks; 3212 strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev)); 3213 3214 return (0); 3215 } 3216 3217 int 3218 mpi_ioctl_vol(struct mpi_softc *sc, struct bioc_vol *bv) 3219 { 3220 int i, vol, id, rv = EINVAL; 3221 struct device *dev; 3222 struct scsi_link *link; 3223 struct mpi_cfg_raid_vol_pg0 *rpg0; 3224 char *vendp; 3225 3226 id = bv->bv_volid; 3227 if (mpi_bio_get_pg0_raid(sc, id)) 3228 goto done; 3229 3230 if (id > sc->sc_vol_page->active_vols) 3231 return (EINVAL); /* XXX deal with hot spares */ 3232 3233 rpg0 = sc->sc_rpg0; 3234 if (rpg0 == NULL) 3235 goto done; 3236 3237 /* determine status */ 3238 switch (rpg0->volume_state) { 3239 case MPI_CFG_RAID_VOL_0_STATE_OPTIMAL: 3240 bv->bv_status = BIOC_SVONLINE; 3241 break; 3242 case MPI_CFG_RAID_VOL_0_STATE_DEGRADED: 3243 bv->bv_status = BIOC_SVDEGRADED; 3244 break; 3245 case MPI_CFG_RAID_VOL_0_STATE_FAILED: 3246 case MPI_CFG_RAID_VOL_0_STATE_MISSING: 3247 bv->bv_status = BIOC_SVOFFLINE; 3248 break; 3249 default: 3250 bv->bv_status = BIOC_SVINVALID; 3251 } 3252 3253 /* override status if scrubbing or something */ 3254 if (rpg0->volume_status & MPI_CFG_RAID_VOL_0_STATUS_RESYNCING) 3255 bv->bv_status = BIOC_SVREBUILD; 3256 3257 bv->bv_size = (u_quad_t)lemtoh32(&rpg0->max_lba) * 512; 3258 3259 switch (sc->sc_vol_list[id].vol_type) { 3260 case MPI_CFG_RAID_TYPE_RAID_IS: 3261 bv->bv_level = 0; 3262 break; 3263 case MPI_CFG_RAID_TYPE_RAID_IME: 3264 case MPI_CFG_RAID_TYPE_RAID_IM: 3265 bv->bv_level = 1; 3266 break; 3267 case MPI_CFG_RAID_TYPE_RAID_5: 3268 bv->bv_level = 5; 3269 break; 3270 case MPI_CFG_RAID_TYPE_RAID_6: 3271 bv->bv_level = 6; 3272 break; 3273 case MPI_CFG_RAID_TYPE_RAID_10: 3274 bv->bv_level = 10; 3275 break; 3276 case MPI_CFG_RAID_TYPE_RAID_50: 3277 bv->bv_level = 50; 3278 break; 3279 default: 3280 bv->bv_level = -1; 3281 } 3282 3283 bv->bv_nodisk = rpg0->num_phys_disks; 3284 3285 for (i = 0, vol = -1; i < sc->sc_buswidth; i++) { 3286 link = scsi_get_link(sc->sc_scsibus, i, 0); 3287 if (link == NULL) 3288 continue; 3289 3290 /* skip if not a virtual disk */ 3291 if (!(link->flags & SDEV_VIRTUAL)) 3292 continue; 3293 3294 vol++; 3295 /* are we it? */ 3296 if (vol == bv->bv_volid) { 3297 dev = link->device_softc; 3298 vendp = link->inqdata.vendor; 3299 memcpy(bv->bv_vendor, vendp, sizeof bv->bv_vendor); 3300 bv->bv_vendor[sizeof(bv->bv_vendor) - 1] = '\0'; 3301 strlcpy(bv->bv_dev, dev->dv_xname, sizeof bv->bv_dev); 3302 break; 3303 } 3304 } 3305 rv = 0; 3306 done: 3307 return (rv); 3308 } 3309 3310 int 3311 mpi_ioctl_disk(struct mpi_softc *sc, struct bioc_disk *bd) 3312 { 3313 int pdid, id, rv = EINVAL; 3314 u_int32_t address; 3315 struct mpi_cfg_hdr hdr; 3316 struct mpi_cfg_raid_vol_pg0 *rpg0; 3317 struct mpi_cfg_raid_vol_pg0_physdisk *physdisk; 3318 struct mpi_cfg_raid_physdisk_pg0 pdpg0; 3319 3320 id = bd->bd_volid; 3321 if (mpi_bio_get_pg0_raid(sc, id)) 3322 goto done; 3323 3324 if (id > sc->sc_vol_page->active_vols) 3325 return (EINVAL); /* XXX deal with hot spares */ 3326 3327 rpg0 = sc->sc_rpg0; 3328 if (rpg0 == NULL) 3329 goto done; 3330 3331 pdid = bd->bd_diskid; 3332 if (pdid > rpg0->num_phys_disks) 3333 goto done; 3334 physdisk = (struct mpi_cfg_raid_vol_pg0_physdisk *)(rpg0 + 1); 3335 physdisk += pdid; 3336 3337 /* get raid phys disk page 0 */ 3338 address = physdisk->phys_disk_num; 3339 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_RAID_PD, 0, address, 3340 &hdr) != 0) 3341 goto done; 3342 if (mpi_cfg_page(sc, address, &hdr, 1, &pdpg0, sizeof pdpg0)) { 3343 bd->bd_status = BIOC_SDFAILED; 3344 return (0); 3345 } 3346 bd->bd_channel = pdpg0.phys_disk_bus; 3347 bd->bd_target = pdpg0.phys_disk_id; 3348 bd->bd_lun = 0; 3349 bd->bd_size = (u_quad_t)lemtoh32(&pdpg0.max_lba) * 512; 3350 strlcpy(bd->bd_vendor, (char *)pdpg0.vendor_id, sizeof(bd->bd_vendor)); 3351 3352 switch (pdpg0.phys_disk_state) { 3353 case MPI_CFG_RAID_PHYDISK_0_STATE_ONLINE: 3354 bd->bd_status = BIOC_SDONLINE; 3355 break; 3356 case MPI_CFG_RAID_PHYDISK_0_STATE_MISSING: 3357 case MPI_CFG_RAID_PHYDISK_0_STATE_FAILED: 3358 bd->bd_status = BIOC_SDFAILED; 3359 break; 3360 case MPI_CFG_RAID_PHYDISK_0_STATE_HOSTFAIL: 3361 case MPI_CFG_RAID_PHYDISK_0_STATE_OTHER: 3362 case MPI_CFG_RAID_PHYDISK_0_STATE_OFFLINE: 3363 bd->bd_status = BIOC_SDOFFLINE; 3364 break; 3365 case MPI_CFG_RAID_PHYDISK_0_STATE_INIT: 3366 bd->bd_status = BIOC_SDSCRUB; 3367 break; 3368 case MPI_CFG_RAID_PHYDISK_0_STATE_INCOMPAT: 3369 default: 3370 bd->bd_status = BIOC_SDINVALID; 3371 break; 3372 } 3373 3374 /* XXX figure this out */ 3375 /* bd_serial[32]; */ 3376 /* bd_procdev[16]; */ 3377 3378 rv = 0; 3379 done: 3380 return (rv); 3381 } 3382 3383 int 3384 mpi_ioctl_setstate(struct mpi_softc *sc, struct bioc_setstate *bs) 3385 { 3386 return (ENOTTY); 3387 } 3388 3389 #ifndef SMALL_KERNEL 3390 int 3391 mpi_create_sensors(struct mpi_softc *sc) 3392 { 3393 struct device *dev; 3394 struct scsi_link *link; 3395 int i, vol; 3396 3397 /* count volumes */ 3398 for (i = 0, vol = 0; i < sc->sc_buswidth; i++) { 3399 link = scsi_get_link(sc->sc_scsibus, i, 0); 3400 if (link == NULL) 3401 continue; 3402 /* skip if not a virtual disk */ 3403 if (!(link->flags & SDEV_VIRTUAL)) 3404 continue; 3405 3406 vol++; 3407 } 3408 if (vol == 0) 3409 return (0); 3410 3411 sc->sc_sensors = mallocarray(vol, sizeof(struct ksensor), 3412 M_DEVBUF, M_NOWAIT | M_ZERO); 3413 if (sc->sc_sensors == NULL) 3414 return (1); 3415 3416 strlcpy(sc->sc_sensordev.xname, DEVNAME(sc), 3417 sizeof(sc->sc_sensordev.xname)); 3418 3419 for (i = 0, vol= 0; i < sc->sc_buswidth; i++) { 3420 link = scsi_get_link(sc->sc_scsibus, i, 0); 3421 if (link == NULL) 3422 continue; 3423 /* skip if not a virtual disk */ 3424 if (!(link->flags & SDEV_VIRTUAL)) 3425 continue; 3426 3427 dev = link->device_softc; 3428 strlcpy(sc->sc_sensors[vol].desc, dev->dv_xname, 3429 sizeof(sc->sc_sensors[vol].desc)); 3430 sc->sc_sensors[vol].type = SENSOR_DRIVE; 3431 sc->sc_sensors[vol].status = SENSOR_S_UNKNOWN; 3432 sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[vol]); 3433 3434 vol++; 3435 } 3436 3437 if (sensor_task_register(sc, mpi_refresh_sensors, 10) == NULL) 3438 goto bad; 3439 3440 sensordev_install(&sc->sc_sensordev); 3441 3442 return (0); 3443 3444 bad: 3445 free(sc->sc_sensors, M_DEVBUF, 0); 3446 return (1); 3447 } 3448 3449 void 3450 mpi_refresh_sensors(void *arg) 3451 { 3452 int i, vol; 3453 struct scsi_link *link; 3454 struct mpi_softc *sc = arg; 3455 struct mpi_cfg_raid_vol_pg0 *rpg0; 3456 3457 rw_enter_write(&sc->sc_lock); 3458 3459 for (i = 0, vol = 0; i < sc->sc_buswidth; i++) { 3460 link = scsi_get_link(sc->sc_scsibus, i, 0); 3461 if (link == NULL) 3462 continue; 3463 /* skip if not a virtual disk */ 3464 if (!(link->flags & SDEV_VIRTUAL)) 3465 continue; 3466 3467 if (mpi_bio_get_pg0_raid(sc, vol)) 3468 continue; 3469 3470 rpg0 = sc->sc_rpg0; 3471 if (rpg0 == NULL) 3472 goto done; 3473 3474 /* determine status */ 3475 switch (rpg0->volume_state) { 3476 case MPI_CFG_RAID_VOL_0_STATE_OPTIMAL: 3477 sc->sc_sensors[vol].value = SENSOR_DRIVE_ONLINE; 3478 sc->sc_sensors[vol].status = SENSOR_S_OK; 3479 break; 3480 case MPI_CFG_RAID_VOL_0_STATE_DEGRADED: 3481 sc->sc_sensors[vol].value = SENSOR_DRIVE_PFAIL; 3482 sc->sc_sensors[vol].status = SENSOR_S_WARN; 3483 break; 3484 case MPI_CFG_RAID_VOL_0_STATE_FAILED: 3485 case MPI_CFG_RAID_VOL_0_STATE_MISSING: 3486 sc->sc_sensors[vol].value = SENSOR_DRIVE_FAIL; 3487 sc->sc_sensors[vol].status = SENSOR_S_CRIT; 3488 break; 3489 default: 3490 sc->sc_sensors[vol].value = 0; /* unknown */ 3491 sc->sc_sensors[vol].status = SENSOR_S_UNKNOWN; 3492 } 3493 3494 /* override status if scrubbing or something */ 3495 if (rpg0->volume_status & MPI_CFG_RAID_VOL_0_STATUS_RESYNCING) { 3496 sc->sc_sensors[vol].value = SENSOR_DRIVE_REBUILD; 3497 sc->sc_sensors[vol].status = SENSOR_S_WARN; 3498 } 3499 3500 vol++; 3501 } 3502 done: 3503 rw_exit_write(&sc->sc_lock); 3504 } 3505 #endif /* SMALL_KERNEL */ 3506 #endif /* NBIO > 0 */ 3507