1*1c00236eSmiod /* $OpenBSD: db_machdep.h,v 1.23 2022/10/21 18:55:42 miod Exp $ */ 2c2a403fdSart /* $NetBSD: db_machdep.h,v 1.12 2001/07/07 15:16:13 eeh Exp $ */ 3c2a403fdSart 4c2a403fdSart /* 5c2a403fdSart * Mach Operating System 6c2a403fdSart * Copyright (c) 1991,1990 Carnegie Mellon University 7c2a403fdSart * All Rights Reserved. 8c2a403fdSart * 9c2a403fdSart * Permission to use, copy, modify and distribute this software and its 10c2a403fdSart * documentation is hereby granted, provided that both the copyright 11c2a403fdSart * notice and this permission notice appear in all copies of the 12c2a403fdSart * software, derivative works or modified versions, and any portions 13c2a403fdSart * thereof, and that both notices appear in supporting documentation. 14c2a403fdSart * 15c2a403fdSart * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16c2a403fdSart * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 17c2a403fdSart * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18c2a403fdSart * 19c2a403fdSart * Carnegie Mellon requests users of this software to return to 20c2a403fdSart * 21c2a403fdSart * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22c2a403fdSart * School of Computer Science 23c2a403fdSart * Carnegie Mellon University 24c2a403fdSart * Pittsburgh PA 15213-3890 25c2a403fdSart * 26c2a403fdSart * any improvements or extensions that they make and grant Carnegie Mellon 27c2a403fdSart * the rights to redistribute these changes. 28c2a403fdSart */ 29c2a403fdSart 302fa72412Spirofti #ifndef _MACHINE_DB_MACHDEP_H_ 312fa72412Spirofti #define _MACHINE_DB_MACHDEP_H_ 32c2a403fdSart 33c2a403fdSart /* 34c2a403fdSart * Machine-dependent defines for new kernel debugger. 35c2a403fdSart */ 36c2a403fdSart 37c2a403fdSart #include <uvm/uvm_extern.h> 38c2a403fdSart 39c2a403fdSart #include <machine/frame.h> 40c2a403fdSart #include <machine/psl.h> 41c2a403fdSart #include <machine/trap.h> 42c2a403fdSart #include <machine/reg.h> 43c2a403fdSart 44c2a403fdSart /* end of mangling */ 45c2a403fdSart 46c2a403fdSart typedef long db_expr_t; /* expression - signed */ 47c2a403fdSart 48c2a403fdSart struct trapstate { 49c2a403fdSart int64_t tstate; 50c2a403fdSart int64_t tpc; 51c2a403fdSart int64_t tnpc; 52c2a403fdSart int64_t tt; 53c2a403fdSart }; 54c2a403fdSart #if 1 55c2a403fdSart typedef struct { 56*1c00236eSmiod struct trapframe ddb_tf; 57*1c00236eSmiod struct frame ddb_fr; 58c2a403fdSart struct trapstate ddb_ts[5]; 59c2a403fdSart int ddb_tl; 60*1c00236eSmiod struct fpstate ddb_fpstate; 61c2a403fdSart } db_regs_t; 62c2a403fdSart #else 63c2a403fdSart typedef struct db_regs { 64c2a403fdSart struct trapregs dbr_traps[4]; 65c2a403fdSart int dbr_y; 66c2a403fdSart char dbr_tl; 67c2a403fdSart char dbr_canrestore; 68c2a403fdSart char dbr_cansave; 69c2a403fdSart char dbr_cleanwin; 70c2a403fdSart char dbr_cwp; 71c2a403fdSart char dbr_wstate; 72c2a403fdSart int64_t dbr_g[8]; 73c2a403fdSart int64_t dbr_ag[8]; 74c2a403fdSart int64_t dbr_ig[8]; 75c2a403fdSart int64_t dbr_mg[8]; 76c2a403fdSart int64_t dbr_out[8]; 77c2a403fdSart int64_t dbr_local[8]; 78c2a403fdSart int64_t dbr_in[8]; 79c2a403fdSart } db_regs_t; 80c2a403fdSart #endif 81c2a403fdSart 8272222458Sjason extern db_regs_t ddb_regs; /* register state */ 83c2a403fdSart #define DDB_TF (&ddb_regs.ddb_tf) 84c2a403fdSart #define DDB_FR (&ddb_regs.ddb_fr) 85c2a403fdSart #define DDB_FP (&ddb_regs.ddb_fpstate) 86c2a403fdSart 876d6b8a87Smpi #define PC_REGS(regs) ((vaddr_t)(regs)->ddb_tf.tf_pc) 88b30bd1c0Sespie #define SET_PC_REGS(regs, value) (regs)->ddb_tf.tf_pc = (int32_t)(value) 89c2a403fdSart #define PC_ADVANCE(regs) do { \ 90c2a403fdSart vaddr_t n = (regs)->ddb_tf.tf_npc; \ 91c2a403fdSart (regs)->ddb_tf.tf_pc = n; \ 92c2a403fdSart (regs)->ddb_tf.tf_npc = n + 4; \ 93c2a403fdSart } while(0) 94c2a403fdSart 95c2a403fdSart #define BKPT_INST 0x91d02001 /* breakpoint instruction */ 96c2a403fdSart #define BKPT_SIZE (4) /* size of breakpoint inst */ 97c2a403fdSart #define BKPT_SET(inst) (BKPT_INST) 98c2a403fdSart 99c2a403fdSart #define IS_BREAKPOINT_TRAP(type, code) \ 100c2a403fdSart ((type) == T_BREAKPOINT || (type) == T_KGDB_EXEC) 101c2a403fdSart #define IS_WATCHPOINT_TRAP(type, code) \ 102c2a403fdSart ((type) ==T_PA_WATCHPT || (type) == T_VA_WATCHPT) 103c2a403fdSart 104c2a403fdSart /* 105c2a403fdSart * Sparc cpus have no hardware single-step. 106c2a403fdSart */ 107c2a403fdSart #define SOFTWARE_SSTEP 108c2a403fdSart 109fed26a10Smpi int db_inst_trap_return(int inst); 110fed26a10Smpi int db_inst_return(int inst); 111fed26a10Smpi int db_inst_call(int inst); 112fed26a10Smpi int db_inst_branch(int inst); 113fed26a10Smpi int db_inst_unconditional_flow_transfer(int inst); 1146d6b8a87Smpi vaddr_t db_branch_taken(int inst, vaddr_t pc, db_regs_t *regs); 115c2a403fdSart 116c2a403fdSart #define inst_trap_return(ins) db_inst_trap_return(ins) 117c2a403fdSart #define inst_return(ins) db_inst_return(ins) 118c2a403fdSart #define inst_call(ins) db_inst_call(ins) 119c2a403fdSart #define inst_branch(ins) db_inst_branch(ins) 120c2a403fdSart #define inst_unconditional_flow_transfer(ins) \ 121c2a403fdSart db_inst_unconditional_flow_transfer(ins) 122f9ca94b7Sart #define branch_taken(ins, pc, fun, regs) \ 123c2a403fdSart db_branch_taken((ins), (pc), (regs)) 124c2a403fdSart 125c2a403fdSart /* see note in db_interface.c about reversed breakpoint addrs */ 126c2a403fdSart #define next_instr_address(pc, bd) \ 127c2a403fdSart ((bd) ? (pc) : ddb_regs.ddb_tf.tf_npc) 128c2a403fdSart 129c2a403fdSart #define DB_MACHINE_COMMANDS 130c2a403fdSart 131c4071fd1Smillert void db_machine_init(void); 132*1c00236eSmiod int db_ktrap(int, struct trapframe *); 133c2a403fdSart 134b0ad0500Skettenis int db_enter_ddb(void); 135b0ad0500Skettenis void db_startcpu(struct cpu_info *); 136b0ad0500Skettenis void db_stopcpu(struct cpu_info *); 137b0ad0500Skettenis 138b0ad0500Skettenis #define DDB_STATE_NOT_RUNNING 0 139b0ad0500Skettenis #define DDB_STATE_RUNNING 1 140b0ad0500Skettenis #define DDB_STATE_EXITING 2 141b0ad0500Skettenis 14209671eefSkettenis /* Register device-specific method for triggering XIRs. */ 14309671eefSkettenis void db_register_xir(void (*)(void *, int), void *); 14409671eefSkettenis 1452fa72412Spirofti #endif /* _MACHINE_DB_MACHDEP_H_ */ 146