1*cb108906Sjca /* $OpenBSD: cpu.h,v 1.24 2024/06/11 16:02:35 jca Exp $ */
2380aa7b9Sjsg
3baed8f06Sdrahn /*
4baed8f06Sdrahn * Copyright (c) 2019 Mike Larkin <mlarkin@openbsd.org>
5baed8f06Sdrahn * Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
6baed8f06Sdrahn *
7baed8f06Sdrahn * Permission to use, copy, modify, and distribute this software for any
8baed8f06Sdrahn * purpose with or without fee is hereby granted, provided that the above
9baed8f06Sdrahn * copyright notice and this permission notice appear in all copies.
10baed8f06Sdrahn *
11baed8f06Sdrahn * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12baed8f06Sdrahn * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13baed8f06Sdrahn * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14baed8f06Sdrahn * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15baed8f06Sdrahn * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16baed8f06Sdrahn * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17baed8f06Sdrahn * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18baed8f06Sdrahn */
19baed8f06Sdrahn
20baed8f06Sdrahn #ifndef _MACHINE_CPU_H_
21baed8f06Sdrahn #define _MACHINE_CPU_H_
22baed8f06Sdrahn
23baed8f06Sdrahn /*
24baed8f06Sdrahn * User-visible definitions
25baed8f06Sdrahn */
26baed8f06Sdrahn
27baed8f06Sdrahn /* CTL_MACHDEP definitions. */
28f6df41bfSjsg #define CPU_COMPATIBLE 1 /* compatible property */
29f6df41bfSjsg #define CPU_MAXID 2 /* number of valid machdep ids */
30baed8f06Sdrahn
31baed8f06Sdrahn #define CTL_MACHDEP_NAMES { \
32f6df41bfSjsg { 0, 0 }, \
33f6df41bfSjsg { "compatible", CTLTYPE_STRING }, \
34baed8f06Sdrahn }
35baed8f06Sdrahn
36baed8f06Sdrahn #ifdef _KERNEL
37baed8f06Sdrahn
38baed8f06Sdrahn /*
39baed8f06Sdrahn * Kernel-only definitions
40baed8f06Sdrahn */
41baed8f06Sdrahn #include <machine/intr.h>
42baed8f06Sdrahn #include <machine/frame.h>
43baed8f06Sdrahn #include <machine/riscvreg.h>
44baed8f06Sdrahn
45baed8f06Sdrahn /* All the CLKF_* macros take a struct clockframe * as an argument. */
46baed8f06Sdrahn
47baed8f06Sdrahn #define clockframe trapframe
48baed8f06Sdrahn /*
49baed8f06Sdrahn * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
50baed8f06Sdrahn * frame came from USR mode or not.
51baed8f06Sdrahn */
52baed8f06Sdrahn #define CLKF_USERMODE(frame) ((frame->tf_sstatus & SSTATUS_SPP) == 0)
53baed8f06Sdrahn
54baed8f06Sdrahn /*
55baed8f06Sdrahn * CLKF_INTR: True if we took the interrupt from inside another
56baed8f06Sdrahn * interrupt handler.
57baed8f06Sdrahn */
58baed8f06Sdrahn #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1)
59baed8f06Sdrahn
60baed8f06Sdrahn /*
61baed8f06Sdrahn * CLKF_PC: Extract the program counter from a clockframe
62baed8f06Sdrahn */
63baed8f06Sdrahn #define CLKF_PC(frame) (frame->tf_sepc)
64baed8f06Sdrahn
65baed8f06Sdrahn /*
66baed8f06Sdrahn * PROC_PC: Find out the program counter for the given process.
67baed8f06Sdrahn */
68baed8f06Sdrahn #define PROC_PC(p) ((p)->p_addr->u_pcb.pcb_tf->tf_sepc)
69baed8f06Sdrahn #define PROC_STACK(p) ((p)->p_addr->u_pcb.pcb_tf->tf_sp)
70baed8f06Sdrahn
71fa086fd2Scheloha #include <sys/clockintr.h>
72baed8f06Sdrahn #include <sys/device.h>
73baed8f06Sdrahn #include <sys/sched.h>
74baed8f06Sdrahn #include <sys/srp.h>
75*cb108906Sjca #include <uvm/uvm_percpu.h>
76baed8f06Sdrahn
77baed8f06Sdrahn struct cpu_info {
78baed8f06Sdrahn struct device *ci_dev; /* Device corresponding to this CPU */
79baed8f06Sdrahn struct cpu_info *ci_next;
80baed8f06Sdrahn struct schedstate_percpu ci_schedstate; /* scheduler state */
81baed8f06Sdrahn
82baed8f06Sdrahn u_int32_t ci_cpuid;
8311548269Skettenis uint64_t ci_hartid;
84baed8f06Sdrahn int ci_node;
85baed8f06Sdrahn struct cpu_info *ci_self;
86baed8f06Sdrahn
87baed8f06Sdrahn struct proc *ci_curproc;
88baed8f06Sdrahn struct pmap *ci_curpm;
89baed8f06Sdrahn u_int32_t ci_randseed;
90baed8f06Sdrahn
91baed8f06Sdrahn struct pcb *ci_curpcb;
92baed8f06Sdrahn struct pcb *ci_idle_pcb;
93baed8f06Sdrahn
94c737cf90Scheloha struct clockqueue ci_queue;
958272ea32Scheloha volatile int ci_timer_deferred;
96420b129fSkettenis
97baed8f06Sdrahn uint32_t ci_cpl;
98baed8f06Sdrahn uint32_t ci_ipending;
99baed8f06Sdrahn uint32_t ci_idepth;
100baed8f06Sdrahn #ifdef DIAGNOSTIC
101baed8f06Sdrahn int ci_mutex_level;
102baed8f06Sdrahn #endif
103baed8f06Sdrahn int ci_want_resched;
104baed8f06Sdrahn
105753d231aSkettenis struct opp_table *ci_opp_table;
106753d231aSkettenis volatile int ci_opp_idx;
107753d231aSkettenis volatile int ci_opp_max;
108753d231aSkettenis uint32_t ci_cpu_supply;
109753d231aSkettenis
110baed8f06Sdrahn #ifdef MULTIPROCESSOR
111baed8f06Sdrahn struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM];
112*cb108906Sjca #define __HAVE_UVM_PERCPU
113*cb108906Sjca struct uvm_pmr_cache ci_uvm;
114baed8f06Sdrahn volatile int ci_flags;
11511548269Skettenis uint64_t ci_satp;
11611548269Skettenis vaddr_t ci_initstack_end;
11711548269Skettenis int ci_ipi_reason;
118baed8f06Sdrahn
119baed8f06Sdrahn volatile int ci_ddb_paused;
120baed8f06Sdrahn #define CI_DDB_RUNNING 0
121baed8f06Sdrahn #define CI_DDB_SHOULDSTOP 1
122baed8f06Sdrahn #define CI_DDB_STOPPED 2
123baed8f06Sdrahn #define CI_DDB_ENTERDDB 3
124baed8f06Sdrahn #define CI_DDB_INDDB 4
125baed8f06Sdrahn
126baed8f06Sdrahn #endif
127baed8f06Sdrahn
128baed8f06Sdrahn #ifdef GPROF
129baed8f06Sdrahn struct gmonparam *ci_gmon;
1301d970828Scheloha struct clockintr ci_gmonclock;
131baed8f06Sdrahn #endif
13211548269Skettenis
1331a4a9ab2Scheloha char ci_panicbuf[512];
134baed8f06Sdrahn };
135baed8f06Sdrahn
136baed8f06Sdrahn #define CPUF_PRIMARY (1<<0)
137baed8f06Sdrahn #define CPUF_AP (1<<1)
138baed8f06Sdrahn #define CPUF_IDENTIFY (1<<2)
139baed8f06Sdrahn #define CPUF_IDENTIFIED (1<<3)
140baed8f06Sdrahn #define CPUF_PRESENT (1<<4)
141baed8f06Sdrahn #define CPUF_GO (1<<5)
142baed8f06Sdrahn #define CPUF_RUNNING (1<<6)
143baed8f06Sdrahn
144baed8f06Sdrahn static inline struct cpu_info *
curcpu(void)145baed8f06Sdrahn curcpu(void)
146baed8f06Sdrahn {
147baed8f06Sdrahn struct cpu_info *__ci = NULL;
148dd81489dSjsg __asm volatile("mv %0, tp" : "=&r"(__ci));
149baed8f06Sdrahn return (__ci);
150baed8f06Sdrahn }
151baed8f06Sdrahn
152baed8f06Sdrahn extern uint32_t boot_hart; /* The hart we booted on. */
153baed8f06Sdrahn extern struct cpu_info cpu_info_primary;
154baed8f06Sdrahn extern struct cpu_info *cpu_info_list;
155baed8f06Sdrahn
156baed8f06Sdrahn #ifndef MULTIPROCESSOR
157baed8f06Sdrahn
158baed8f06Sdrahn #define cpu_number() 0
159baed8f06Sdrahn #define CPU_IS_PRIMARY(ci) 1
16011548269Skettenis #define CPU_IS_RUNNING(ci) 1
161baed8f06Sdrahn #define CPU_INFO_ITERATOR int
162baed8f06Sdrahn #define CPU_INFO_FOREACH(cii, ci) \
163baed8f06Sdrahn for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL)
164baed8f06Sdrahn #define CPU_INFO_UNIT(ci) 0
165baed8f06Sdrahn #define MAXCPUS 1
166baed8f06Sdrahn #define cpu_unidle(ci)
167baed8f06Sdrahn
168baed8f06Sdrahn #else
169baed8f06Sdrahn
170baed8f06Sdrahn #define cpu_number() (curcpu()->ci_cpuid)
171baed8f06Sdrahn #define CPU_IS_PRIMARY(ci) ((ci) == &cpu_info_primary)
17211548269Skettenis #define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING)
173baed8f06Sdrahn #define CPU_INFO_ITERATOR int
174baed8f06Sdrahn #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \
175baed8f06Sdrahn ci != NULL; ci = ci->ci_next)
176baed8f06Sdrahn #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
177baed8f06Sdrahn #define MAXCPUS 32
178baed8f06Sdrahn
179baed8f06Sdrahn extern struct cpu_info *cpu_info[MAXCPUS];
180baed8f06Sdrahn
181baed8f06Sdrahn void cpu_boot_secondary_processors(void);
18211548269Skettenis
183baed8f06Sdrahn #endif /* !MULTIPROCESSOR */
184baed8f06Sdrahn
18577bac826Sjca /* Zihintpause ratified extension */
18677bac826Sjca #define CPU_BUSY_CYCLE() __asm volatile(".long 0x0100000f" ::: "memory")
187baed8f06Sdrahn
188baed8f06Sdrahn #define curpcb curcpu()->ci_curpcb
189baed8f06Sdrahn
190baed8f06Sdrahn static inline unsigned int
cpu_rnd_messybits(void)191baed8f06Sdrahn cpu_rnd_messybits(void)
192baed8f06Sdrahn {
193baed8f06Sdrahn // Should do bit reversal ^ with csr_read(time);
194baed8f06Sdrahn return csr_read(time);
195baed8f06Sdrahn }
196baed8f06Sdrahn
197baed8f06Sdrahn /*
198baed8f06Sdrahn * Scheduling glue
199baed8f06Sdrahn */
200baed8f06Sdrahn #define aston(p) ((p)->p_md.md_astpending = 1)
201baed8f06Sdrahn #define setsoftast() aston(curcpu()->ci_curproc)
202baed8f06Sdrahn
203baed8f06Sdrahn /*
204baed8f06Sdrahn * Notify the current process (p) that it has a signal pending,
205baed8f06Sdrahn * process as soon as possible.
206baed8f06Sdrahn */
207baed8f06Sdrahn
208baed8f06Sdrahn #ifdef MULTIPROCESSOR
209baed8f06Sdrahn void cpu_unidle(struct cpu_info *ci);
210baed8f06Sdrahn #define signotify(p) (aston(p), cpu_unidle((p)->p_cpu))
211baed8f06Sdrahn void cpu_kick(struct cpu_info *);
212baed8f06Sdrahn #else
213baed8f06Sdrahn #define cpu_kick(ci)
214baed8f06Sdrahn #define cpu_unidle(ci)
215baed8f06Sdrahn #define signotify(p) setsoftast()
216baed8f06Sdrahn #endif
217baed8f06Sdrahn
218baed8f06Sdrahn /*
219baed8f06Sdrahn * Preempt the current process if in interrupt from user mode,
220baed8f06Sdrahn * or after the current trap/syscall if in system mode.
221baed8f06Sdrahn */
222baed8f06Sdrahn void need_resched(struct cpu_info *);
223baed8f06Sdrahn #define clear_resched(ci) ((ci)->ci_want_resched = 0)
224baed8f06Sdrahn
225baed8f06Sdrahn /*
226baed8f06Sdrahn * Give a profiling tick to the current process when the user profiling
227baed8f06Sdrahn * buffer pages are invalid. On the i386, request an ast to send us
228baed8f06Sdrahn * through trap(), marking the proc as needing a profiling tick.
229baed8f06Sdrahn */
230baed8f06Sdrahn #define need_proftick(p) aston(p)
231baed8f06Sdrahn
232baed8f06Sdrahn // asm code to start new kernel contexts.
233baed8f06Sdrahn void proc_trampoline(void);
234baed8f06Sdrahn
235baed8f06Sdrahn /*
236baed8f06Sdrahn * Random cruft
237baed8f06Sdrahn */
238baed8f06Sdrahn void dumpconf(void);
239baed8f06Sdrahn
240baed8f06Sdrahn static inline void
intr_enable(void)241baed8f06Sdrahn intr_enable(void)
242baed8f06Sdrahn {
243dd81489dSjsg __asm volatile("csrsi sstatus, %0" :: "i" (SSTATUS_SIE));
244baed8f06Sdrahn }
245baed8f06Sdrahn
246baed8f06Sdrahn static inline u_long
intr_disable(void)247baed8f06Sdrahn intr_disable(void)
248baed8f06Sdrahn {
249baed8f06Sdrahn uint64_t ret;
250baed8f06Sdrahn
251dd81489dSjsg __asm volatile(
252baed8f06Sdrahn "csrrci %0, sstatus, %1"
253baed8f06Sdrahn : "=&r" (ret) : "i" (SSTATUS_SIE)
254baed8f06Sdrahn );
255baed8f06Sdrahn
256baed8f06Sdrahn return (ret & (SSTATUS_SIE));
257baed8f06Sdrahn }
258baed8f06Sdrahn
259baed8f06Sdrahn static inline void
intr_restore(u_long s)260baed8f06Sdrahn intr_restore(u_long s)
261baed8f06Sdrahn {
262dd81489dSjsg __asm volatile("csrs sstatus, %0" :: "r" (s));
263baed8f06Sdrahn }
264baed8f06Sdrahn
265baed8f06Sdrahn void delay (unsigned);
266baed8f06Sdrahn #define DELAY(x) delay(x)
267baed8f06Sdrahn
268eda78419Skettenis extern void (*cpu_startclock_fcn)(void);
269eda78419Skettenis
270baed8f06Sdrahn void fpu_save(struct proc *, struct trapframe *);
271baed8f06Sdrahn void fpu_load(struct proc *);
272baed8f06Sdrahn
273e1898f87Skettenis extern int cpu_errata_sifive_cip_1200;
274e1898f87Skettenis
2754711fcb1Sguenther #define cpu_idle_enter() do { /* nothing */ } while (0)
2764711fcb1Sguenther #define cpu_idle_leave() do { /* nothing */ } while (0)
2774711fcb1Sguenther
278baed8f06Sdrahn #endif /* _KERNEL */
279baed8f06Sdrahn
280baed8f06Sdrahn #ifdef MULTIPROCESSOR
281baed8f06Sdrahn #include <sys/mplock.h>
282baed8f06Sdrahn #endif /* MULTIPROCESSOR */
283baed8f06Sdrahn
284baed8f06Sdrahn #endif /* !_MACHINE_CPU_H_ */
285