1*0f64a2b1Smiod /* $OpenBSD: loongson2.h,v 1.4 2013/01/16 20:28:06 miod Exp $ */ 213382d84Smiod 313382d84Smiod /* 413382d84Smiod * Copyright (c) 2009 Miodrag Vallat. 513382d84Smiod * 613382d84Smiod * Permission to use, copy, modify, and distribute this software for any 713382d84Smiod * purpose with or without fee is hereby granted, provided that the above 813382d84Smiod * copyright notice and this permission notice appear in all copies. 913382d84Smiod * 1013382d84Smiod * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 1113382d84Smiod * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 1213382d84Smiod * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 1313382d84Smiod * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1413382d84Smiod * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 1513382d84Smiod * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 1613382d84Smiod * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 1713382d84Smiod */ 1813382d84Smiod 192fa72412Spirofti #ifndef _MIPS64_LOONGSON2_H_ 202fa72412Spirofti #define _MIPS64_LOONGSON2_H_ 2113382d84Smiod 2213382d84Smiod /* 2313382d84Smiod * Loongson 2E/2F specific defines 2413382d84Smiod */ 2513382d84Smiod 2613382d84Smiod /* 2713382d84Smiod * Address Window registers physical addresses 2813382d84Smiod * 2913382d84Smiod * The Loongson 2F processor has an AXI crossbar with four possible bus 3013382d84Smiod * masters, each one having four programmable address windows. 3113382d84Smiod * 3213382d84Smiod * Each window is defined with three 64-bit registers: 3313382d84Smiod * - a base address register, defining the address in the master address 3413382d84Smiod * space (base register). 3513382d84Smiod * - an address mask register, defining which address bits are valid in this 3613382d84Smiod * window. A given address matches a window if (addr & mask) == base. 3713382d84Smiod * - the location of the window base in the target, as well at the target 3813382d84Smiod * number itself (mmap register). The lower 20 bits of the address are 3913382d84Smiod * forced as zeroes regardless of their value in this register. 4013382d84Smiod * The translated address is thus (addr & ~mask) | (mmap & ~0xfffff). 4113382d84Smiod */ 4213382d84Smiod 4313382d84Smiod #define LOONGSON_AWR_BASE_ADDRESS 0x3ff00000 4413382d84Smiod 4513382d84Smiod #define LOONGSON_AWR_BASE(master, window) \ 4613382d84Smiod (LOONGSON_AWR_BASE_ADDRESS + (window) * 0x08 + (master) * 0x60 + 0x00) 4713382d84Smiod #define LOONGSON_AWR_SIZE(master, window) \ 4813382d84Smiod (LOONGSON_AWR_BASE_ADDRESS + (window) * 0x08 + (master) * 0x60 + 0x20) 4913382d84Smiod #define LOONGSON_AWR_MMAP(master, window) \ 5013382d84Smiod (LOONGSON_AWR_BASE_ADDRESS + (window) * 0x08 + (master) * 0x60 + 0x40) 5113382d84Smiod 5213382d84Smiod /* 5313382d84Smiod * Bits in the diagnostic register 5413382d84Smiod */ 5513382d84Smiod 5613382d84Smiod #define COP_0_DIAG_ITLB_CLEAR 0x04 5713382d84Smiod #define COP_0_DIAG_BTB_CLEAR 0x02 58846d8982Smiod #define COP_0_DIAG_RAS_DISABLE 0x01 5913382d84Smiod 60*0f64a2b1Smiod #if defined(_KERNEL) && !defined(_LOCORE) 61*0f64a2b1Smiod int loongson2f_cpuspeed(int *); 62*0f64a2b1Smiod void loongson2f_setperf(int); 63*0f64a2b1Smiod #endif 64*0f64a2b1Smiod 652fa72412Spirofti #endif /* _MIPS64_LOONGSON2_H_ */ 66