1*72fd44d4Smartynas /* $OpenBSD: ieee.h,v 1.4 2012/09/15 15:06:09 martynas Exp $ */ 23180e169Smiod /* 33180e169Smiod * Copyright (c) 1992, 1993 43180e169Smiod * The Regents of the University of California. All rights reserved. 53180e169Smiod * 63180e169Smiod * This software was developed by the Computer Systems Engineering group 73180e169Smiod * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 83180e169Smiod * contributed to Berkeley. 93180e169Smiod * 103180e169Smiod * All advertising materials mentioning features or use of this software 113180e169Smiod * must display the following acknowledgement: 123180e169Smiod * This product includes software developed by the University of 133180e169Smiod * California, Lawrence Berkeley Laboratory. 143180e169Smiod * 153180e169Smiod * Redistribution and use in source and binary forms, with or without 163180e169Smiod * modification, are permitted provided that the following conditions 173180e169Smiod * are met: 183180e169Smiod * 1. Redistributions of source code must retain the above copyright 193180e169Smiod * notice, this list of conditions and the following disclaimer. 203180e169Smiod * 2. Redistributions in binary form must reproduce the above copyright 213180e169Smiod * notice, this list of conditions and the following disclaimer in the 223180e169Smiod * documentation and/or other materials provided with the distribution. 233180e169Smiod * 3. Neither the name of the University nor the names of its contributors 243180e169Smiod * may be used to endorse or promote products derived from this software 253180e169Smiod * without specific prior written permission. 263180e169Smiod * 273180e169Smiod * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 283180e169Smiod * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 293180e169Smiod * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 303180e169Smiod * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 313180e169Smiod * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 323180e169Smiod * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 333180e169Smiod * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 343180e169Smiod * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 353180e169Smiod * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 363180e169Smiod * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 373180e169Smiod * SUCH DAMAGE. 383180e169Smiod * 393180e169Smiod * @(#)ieee.h 8.1 (Berkeley) 6/11/93 403180e169Smiod */ 413180e169Smiod 423180e169Smiod /* 433180e169Smiod * ieee.h defines the machine-dependent layout of the machine's IEEE 443180e169Smiod * floating point. It does *not* define (yet?) any of the rounding 453180e169Smiod * mode bits, exceptions, and so forth. 463180e169Smiod */ 473180e169Smiod 483180e169Smiod /* 493180e169Smiod * Define the number of bits in each fraction and exponent. 503180e169Smiod * 513180e169Smiod * k k+1 523180e169Smiod * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented 533180e169Smiod * 543180e169Smiod * (-exp_bias+1) 553180e169Smiod * as fractions that look like 0.fffff x 2 . This means that 563180e169Smiod * 573180e169Smiod * -126 583180e169Smiod * the number 0.10000 x 2 , for instance, is the same as the normalized 593180e169Smiod * 603180e169Smiod * -127 -128 613180e169Smiod * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero 623180e169Smiod * 633180e169Smiod * -129 643180e169Smiod * in the fraction; to represent 2 , we need two, and so on. This 653180e169Smiod * 663180e169Smiod * (-exp_bias-fracbits+1) 673180e169Smiod * implies that the smallest denormalized number is 2 683180e169Smiod * 693180e169Smiod * for whichever format we are talking about: for single precision, for 703180e169Smiod * 713180e169Smiod * -126 -149 723180e169Smiod * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and 733180e169Smiod * 743180e169Smiod * -149 == -127 - 23 + 1. 753180e169Smiod */ 763180e169Smiod #define SNG_EXPBITS 8 773180e169Smiod #define SNG_FRACBITS 23 783180e169Smiod 793180e169Smiod #define DBL_EXPBITS 11 807b36286aSmartynas #define DBL_FRACHBITS 20 817b36286aSmartynas #define DBL_FRACLBITS 32 823180e169Smiod #define DBL_FRACBITS 52 833180e169Smiod 843180e169Smiod struct ieee_single { 853180e169Smiod u_int sng_sign:1; 863180e169Smiod u_int sng_exp:8; 873180e169Smiod u_int sng_frac:23; 883180e169Smiod }; 893180e169Smiod 903180e169Smiod struct ieee_double { 913180e169Smiod u_int dbl_sign:1; 923180e169Smiod u_int dbl_exp:11; 933180e169Smiod u_int dbl_frach:20; 943180e169Smiod u_int dbl_fracl; 953180e169Smiod }; 963180e169Smiod 973180e169Smiod /* 983180e169Smiod * Floats whose exponent is in [1..INFNAN) (of whatever type) are 993180e169Smiod * `normal'. Floats whose exponent is INFNAN are either Inf or NaN. 1003180e169Smiod * Floats whose exponent is zero are either zero (iff all fraction 1013180e169Smiod * bits are zero) or subnormal values. 1023180e169Smiod * 1033180e169Smiod * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its 1043180e169Smiod * high fraction; if the bit is set, it is a `quiet NaN'. 1053180e169Smiod */ 1063180e169Smiod #define SNG_EXP_INFNAN 255 1073180e169Smiod #define DBL_EXP_INFNAN 2047 1083180e169Smiod 1093180e169Smiod #if 0 1103180e169Smiod #define SNG_QUIETNAN (1 << 22) 1113180e169Smiod #define DBL_QUIETNAN (1 << 19) 1123180e169Smiod #endif 1133180e169Smiod 1143180e169Smiod /* 1153180e169Smiod * Exponent biases. 1163180e169Smiod */ 1173180e169Smiod #define SNG_EXP_BIAS 127 1183180e169Smiod #define DBL_EXP_BIAS 1023 119