xref: /openbsd-src/sys/arch/m88k/include/frame.h (revision 54d1fe647532964e696e1d59c14901bd536ad42d)
1*54d1fe64Smiod /*	$OpenBSD: frame.h,v 1.4 2007/11/15 21:24:12 miod Exp $ */
2dc3bbfb1Smiod /*
3dc3bbfb1Smiod  * Copyright (c) 1996 Nivas Madhur
4dc3bbfb1Smiod  * Mach Operating System
5dc3bbfb1Smiod  * Copyright (c) 1993-1992 Carnegie Mellon University
6dc3bbfb1Smiod  * All Rights Reserved.
7dc3bbfb1Smiod  *
8dc3bbfb1Smiod  * Permission to use, copy, modify and distribute this software and its
9dc3bbfb1Smiod  * documentation is hereby granted, provided that both the copyright
10dc3bbfb1Smiod  * notice and this permission notice appear in all copies of the
11dc3bbfb1Smiod  * software, derivative works or modified versions, and any portions
12dc3bbfb1Smiod  * thereof, and that both notices appear in supporting documentation.
13dc3bbfb1Smiod  *
14dc3bbfb1Smiod  * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
15dc3bbfb1Smiod  * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
16dc3bbfb1Smiod  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
17dc3bbfb1Smiod  *
18dc3bbfb1Smiod  * Carnegie Mellon requests users of this software to return to
19dc3bbfb1Smiod  *
20dc3bbfb1Smiod  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
21dc3bbfb1Smiod  *  School of Computer Science
22dc3bbfb1Smiod  *  Carnegie Mellon University
23dc3bbfb1Smiod  *  Pittsburgh PA 15213-3890
24dc3bbfb1Smiod  *
25dc3bbfb1Smiod  * any improvements or extensions that they make and grant Carnegie Mellon
26dc3bbfb1Smiod  * the rights to redistribute these changes.
27dc3bbfb1Smiod  */
28dc3bbfb1Smiod /*
29dc3bbfb1Smiod  * Motorola 88100 exception frame definitions
30dc3bbfb1Smiod  *
31dc3bbfb1Smiod  */
32dc3bbfb1Smiod /*
33dc3bbfb1Smiod  */
34dc3bbfb1Smiod #ifndef _M88K_FRAME_H_
35dc3bbfb1Smiod #define _M88K_FRAME_H_
36dc3bbfb1Smiod 
37dc3bbfb1Smiod #include <machine/reg.h>
38dc3bbfb1Smiod 
39dc3bbfb1Smiod struct trapframe {
40dc3bbfb1Smiod 	struct reg	tf_regs;
41dc3bbfb1Smiod 	register_t	tf_vector;	/* exception vector number */
42dc3bbfb1Smiod 	register_t	tf_mask;	/* interrupt mask level */
43*54d1fe64Smiod 	register_t	tf_flags;	/* exception handling flags */
44dc3bbfb1Smiod 	register_t	tf_scratch1;	/* reserved for use by locore */
45dc3bbfb1Smiod 	register_t	tf_ipfsr;	/* P BUS status */
46dc3bbfb1Smiod 	register_t	tf_dpfsr;	/* P BUS status */
47dc3bbfb1Smiod 	void		*tf_cpu;	/* cpu_info pointer */
48dc3bbfb1Smiod };
49dc3bbfb1Smiod 
50dc3bbfb1Smiod #define	tf_r		tf_regs.r
51dc3bbfb1Smiod #define	tf_sp		tf_regs.r[31]
52dc3bbfb1Smiod #define	tf_epsr		tf_regs.epsr
53dc3bbfb1Smiod #define	tf_fpsr		tf_regs.fpsr
54dc3bbfb1Smiod #define	tf_fpcr		tf_regs.fpcr
55dc3bbfb1Smiod #define	tf_sxip		tf_regs.sxip
56dc3bbfb1Smiod #define	tf_snip		tf_regs.snip
57dc3bbfb1Smiod #define	tf_sfip		tf_regs.sfip
58dc3bbfb1Smiod #define	tf_exip		tf_regs.sxip
59dc3bbfb1Smiod #define	tf_enip		tf_regs.snip
60dc3bbfb1Smiod #define	tf_ssbr		tf_regs.ssbr
61dc3bbfb1Smiod #define	tf_dmt0		tf_regs.dmt0
62dc3bbfb1Smiod #define	tf_dmd0		tf_regs.dmd0
63dc3bbfb1Smiod #define	tf_dma0		tf_regs.dma0
64dc3bbfb1Smiod #define	tf_dmt1		tf_regs.dmt1
65dc3bbfb1Smiod #define	tf_dmd1		tf_regs.dmd1
66dc3bbfb1Smiod #define	tf_dma1		tf_regs.dma1
67dc3bbfb1Smiod #define	tf_dmt2		tf_regs.dmt2
68dc3bbfb1Smiod #define	tf_dmd2		tf_regs.dmd2
69dc3bbfb1Smiod #define	tf_dma2		tf_regs.dma2
70dc3bbfb1Smiod #define	tf_duap		tf_regs.ssbr
71dc3bbfb1Smiod #define	tf_dsr		tf_regs.dmt0
72dc3bbfb1Smiod #define	tf_dlar		tf_regs.dmd0
73dc3bbfb1Smiod #define	tf_dpar		tf_regs.dma0
74dc3bbfb1Smiod #define	tf_isr		tf_regs.dmt1
75dc3bbfb1Smiod #define	tf_ilar		tf_regs.dmd1
76dc3bbfb1Smiod #define	tf_ipar		tf_regs.dma1
77dc3bbfb1Smiod #define	tf_isap		tf_regs.dmt2
78dc3bbfb1Smiod #define	tf_dsap		tf_regs.dmd2
79dc3bbfb1Smiod #define	tf_iuap		tf_regs.dma2
80dc3bbfb1Smiod #define	tf_fpecr	tf_regs.fpecr
81dc3bbfb1Smiod #define	tf_fphs1	tf_regs.fphs1
82dc3bbfb1Smiod #define	tf_fpls1	tf_regs.fpls1
83dc3bbfb1Smiod #define	tf_fphs2	tf_regs.fphs2
84dc3bbfb1Smiod #define	tf_fpls2	tf_regs.fpls2
85dc3bbfb1Smiod #define	tf_fppt		tf_regs.fppt
86dc3bbfb1Smiod #define	tf_fprh		tf_regs.fprh
87dc3bbfb1Smiod #define	tf_fprl		tf_regs.fprl
88dc3bbfb1Smiod #define	tf_fpit		tf_regs.fpit
89dc3bbfb1Smiod 
90dc3bbfb1Smiod #endif /* _M88K_FRAME_H_ */
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