1*0f9e9ec2Sjsg /* $OpenBSD: aplspi.c,v 1.6 2024/05/13 01:15:50 jsg Exp $ */
2aa4c9c40Skettenis /*
3aa4c9c40Skettenis * Copyright (c) 2021 Mark Kettenis <kettenis@openbsd.org>
4aa4c9c40Skettenis *
5aa4c9c40Skettenis * Permission to use, copy, modify, and distribute this software for any
6aa4c9c40Skettenis * purpose with or without fee is hereby granted, provided that the above
7aa4c9c40Skettenis * copyright notice and this permission notice appear in all copies.
8aa4c9c40Skettenis *
9aa4c9c40Skettenis * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10aa4c9c40Skettenis * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11aa4c9c40Skettenis * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12aa4c9c40Skettenis * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13aa4c9c40Skettenis * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14aa4c9c40Skettenis * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15aa4c9c40Skettenis * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16aa4c9c40Skettenis */
17aa4c9c40Skettenis
18aa4c9c40Skettenis #include <sys/param.h>
19aa4c9c40Skettenis #include <sys/systm.h>
20aa4c9c40Skettenis #include <sys/kernel.h>
21aa4c9c40Skettenis #include <sys/device.h>
22aa4c9c40Skettenis #include <sys/malloc.h>
2308231622Skettenis #include <sys/mutex.h>
24aa4c9c40Skettenis
25aa4c9c40Skettenis #include <machine/bus.h>
26aa4c9c40Skettenis #include <machine/fdt.h>
27aa4c9c40Skettenis
28aa4c9c40Skettenis #include <dev/spi/spivar.h>
29aa4c9c40Skettenis #include <dev/ofw/openfirm.h>
30aa4c9c40Skettenis #include <dev/ofw/ofw_clock.h>
31aa4c9c40Skettenis #include <dev/ofw/ofw_gpio.h>
32aa4c9c40Skettenis #include <dev/ofw/ofw_pinctrl.h>
337ab4cc98Skettenis #include <dev/ofw/ofw_power.h>
34aa4c9c40Skettenis #include <dev/ofw/fdt.h>
35aa4c9c40Skettenis
36aa4c9c40Skettenis #define SPI_CLKCFG 0x00
37aa4c9c40Skettenis #define SPI_CLKCFG_EN 0xd
38aa4c9c40Skettenis #define SPI_CONFIG 0x04
39aa4c9c40Skettenis #define SPI_CONFIG_EN (1 << 18)
40aa4c9c40Skettenis #define SPI_CONFIG_PIOEN (1 << 5)
41aa4c9c40Skettenis #define SPI_STATUS 0x08
42b2212487Skettenis #define SPI_PIN 0x0c
43b2212487Skettenis #define SPI_PIN_CS (1 << 1)
44aa4c9c40Skettenis #define SPI_TXDATA 0x10
45aa4c9c40Skettenis #define SPI_RXDATA 0x20
46aa4c9c40Skettenis #define SPI_CLKDIV 0x30
47aa4c9c40Skettenis #define SPI_CLKDIV_MIN 2
48aa4c9c40Skettenis #define SPI_CLKDIV_MAX 2047
49aa4c9c40Skettenis #define SPI_RXCNT 0x34
50aa4c9c40Skettenis #define SPI_CLKIDLE 0x38
51aa4c9c40Skettenis #define SPI_TXCNT 0x4c
52aa4c9c40Skettenis #define SPI_AVAIL 0x10c
53aa4c9c40Skettenis #define SPI_AVAIL_TX(avail) ((avail >> 8) & 0xff)
54aa4c9c40Skettenis #define SPI_AVAIL_RX(avail) ((avail >> 24) & 0xff)
55b2212487Skettenis #define SPI_SHIFTCFG 0x150
56b2212487Skettenis #define SPI_SHIFTCFG_OVERRIDE_CS (1 << 24)
57b2212487Skettenis #define SPI_PINCFG 0x154
58b2212487Skettenis #define SPI_PINCFG_KEEP_CS (1 << 1)
59b2212487Skettenis #define SPI_PINCFG_CS_IDLE_VAL (1 << 9)
60aa4c9c40Skettenis
61aa4c9c40Skettenis #define SPI_FIFO_SIZE 16
62aa4c9c40Skettenis
63aa4c9c40Skettenis #define DEVNAME(sc) ((sc)->sc_dev.dv_xname)
64aa4c9c40Skettenis
65aa4c9c40Skettenis struct aplspi_softc {
66aa4c9c40Skettenis struct device sc_dev;
67aa4c9c40Skettenis bus_space_tag_t sc_iot;
68aa4c9c40Skettenis bus_space_handle_t sc_ioh;
69aa4c9c40Skettenis int sc_node;
70aa4c9c40Skettenis
71aa4c9c40Skettenis uint32_t sc_pfreq;
72aa4c9c40Skettenis
73aa4c9c40Skettenis struct spi_controller sc_tag;
7408231622Skettenis struct mutex sc_mtx;
75aa4c9c40Skettenis
76aa4c9c40Skettenis int sc_cs;
77aa4c9c40Skettenis uint32_t *sc_csgpio;
78b2212487Skettenis int sc_csgpiolen;
79aa4c9c40Skettenis u_int sc_cs_delay;
80aa4c9c40Skettenis };
81aa4c9c40Skettenis
82aa4c9c40Skettenis int aplspi_match(struct device *, void *, void *);
83aa4c9c40Skettenis void aplspi_attach(struct device *, struct device *, void *);
84aa4c9c40Skettenis
85aa4c9c40Skettenis void aplspi_config(void *, struct spi_config *);
86aa4c9c40Skettenis uint32_t aplspi_clkdiv(struct aplspi_softc *, uint32_t);
87aa4c9c40Skettenis int aplspi_transfer(void *, char *, char *, int, int);
88aa4c9c40Skettenis int aplspi_acquire_bus(void *, int);
89aa4c9c40Skettenis void aplspi_release_bus(void *, int);
90aa4c9c40Skettenis
91aa4c9c40Skettenis void aplspi_set_cs(struct aplspi_softc *, int, int);
92aa4c9c40Skettenis
93aa4c9c40Skettenis void aplspi_scan(struct aplspi_softc *);
94aa4c9c40Skettenis
95aa4c9c40Skettenis #define HREAD4(sc, reg) \
96aa4c9c40Skettenis (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
97aa4c9c40Skettenis #define HWRITE4(sc, reg, val) \
98aa4c9c40Skettenis bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
99aa4c9c40Skettenis #define HSET4(sc, reg, bits) \
100aa4c9c40Skettenis HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
101aa4c9c40Skettenis #define HCLR4(sc, reg, bits) \
102aa4c9c40Skettenis HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
103aa4c9c40Skettenis
104471aeecfSnaddy const struct cfattach aplspi_ca = {
105aa4c9c40Skettenis sizeof(struct aplspi_softc), aplspi_match, aplspi_attach
106aa4c9c40Skettenis };
107aa4c9c40Skettenis
108aa4c9c40Skettenis struct cfdriver aplspi_cd = {
109aa4c9c40Skettenis NULL, "aplspi", DV_DULL
110aa4c9c40Skettenis };
111aa4c9c40Skettenis
112aa4c9c40Skettenis int
aplspi_match(struct device * parent,void * match,void * aux)113aa4c9c40Skettenis aplspi_match(struct device *parent, void *match, void *aux)
114aa4c9c40Skettenis {
115aa4c9c40Skettenis struct fdt_attach_args *faa = aux;
116aa4c9c40Skettenis
117aa4c9c40Skettenis return OF_is_compatible(faa->fa_node, "apple,spi");
118aa4c9c40Skettenis }
119aa4c9c40Skettenis
120aa4c9c40Skettenis void
aplspi_attach(struct device * parent,struct device * self,void * aux)121aa4c9c40Skettenis aplspi_attach(struct device *parent, struct device *self, void *aux)
122aa4c9c40Skettenis {
123aa4c9c40Skettenis struct aplspi_softc *sc = (struct aplspi_softc *)self;
124aa4c9c40Skettenis struct fdt_attach_args *faa = aux;
125aa4c9c40Skettenis
126aa4c9c40Skettenis if (faa->fa_nreg < 1)
127aa4c9c40Skettenis return;
128aa4c9c40Skettenis
129aa4c9c40Skettenis sc->sc_iot = faa->fa_iot;
130aa4c9c40Skettenis sc->sc_node = faa->fa_node;
131aa4c9c40Skettenis if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
132aa4c9c40Skettenis faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
133aa4c9c40Skettenis printf(": can't map registers\n");
134aa4c9c40Skettenis return;
135aa4c9c40Skettenis }
136aa4c9c40Skettenis
137aa4c9c40Skettenis sc->sc_csgpiolen = OF_getproplen(faa->fa_node, "cs-gpios");
138aa4c9c40Skettenis if (sc->sc_csgpiolen > 0) {
139aa4c9c40Skettenis sc->sc_csgpio = malloc(sc->sc_csgpiolen, M_DEVBUF, M_WAITOK);
140aa4c9c40Skettenis OF_getpropintarray(faa->fa_node, "cs-gpios",
141aa4c9c40Skettenis sc->sc_csgpio, sc->sc_csgpiolen);
142aa4c9c40Skettenis gpio_controller_config_pin(sc->sc_csgpio, GPIO_CONFIG_OUTPUT);
143aa4c9c40Skettenis gpio_controller_set_pin(sc->sc_csgpio, 0);
144aa4c9c40Skettenis }
145aa4c9c40Skettenis
146aa4c9c40Skettenis printf("\n");
147aa4c9c40Skettenis
148aa4c9c40Skettenis sc->sc_pfreq = clock_get_frequency(sc->sc_node, NULL);
149aa4c9c40Skettenis
1507ab4cc98Skettenis power_domain_enable(sc->sc_node);
151b2212487Skettenis pinctrl_byname(sc->sc_node, "default");
152b2212487Skettenis
153b2212487Skettenis /* Configure CS# pin for manual control. */
154b2212487Skettenis HWRITE4(sc, SPI_PIN, SPI_PIN_CS);
155b2212487Skettenis HCLR4(sc, SPI_SHIFTCFG, SPI_SHIFTCFG_OVERRIDE_CS);
156b2212487Skettenis HCLR4(sc, SPI_PINCFG, SPI_PINCFG_CS_IDLE_VAL);
157b2212487Skettenis HSET4(sc, SPI_PINCFG, SPI_PINCFG_KEEP_CS);
158b2212487Skettenis
159aa4c9c40Skettenis sc->sc_tag.sc_cookie = sc;
160aa4c9c40Skettenis sc->sc_tag.sc_config = aplspi_config;
161aa4c9c40Skettenis sc->sc_tag.sc_transfer = aplspi_transfer;
162aa4c9c40Skettenis sc->sc_tag.sc_acquire_bus = aplspi_acquire_bus;
163aa4c9c40Skettenis sc->sc_tag.sc_release_bus = aplspi_release_bus;
164aa4c9c40Skettenis
16508231622Skettenis mtx_init(&sc->sc_mtx, IPL_TTY);
16608231622Skettenis
167aa4c9c40Skettenis aplspi_scan(sc);
168aa4c9c40Skettenis }
169aa4c9c40Skettenis
170aa4c9c40Skettenis void
aplspi_config(void * cookie,struct spi_config * conf)171aa4c9c40Skettenis aplspi_config(void *cookie, struct spi_config *conf)
172aa4c9c40Skettenis {
173aa4c9c40Skettenis struct aplspi_softc *sc = cookie;
174aa4c9c40Skettenis int cs;
175aa4c9c40Skettenis
176aa4c9c40Skettenis cs = conf->sc_cs;
177aa4c9c40Skettenis if (cs > 4) {
178aa4c9c40Skettenis printf("%s: invalid chip-select (%d)\n", DEVNAME(sc), cs);
179aa4c9c40Skettenis return;
180aa4c9c40Skettenis }
181aa4c9c40Skettenis sc->sc_cs = cs;
182aa4c9c40Skettenis sc->sc_cs_delay = conf->sc_cs_delay;
183aa4c9c40Skettenis
184aa4c9c40Skettenis HWRITE4(sc, SPI_CLKCFG, 0);
185aa4c9c40Skettenis
186aa4c9c40Skettenis HWRITE4(sc, SPI_CLKDIV, aplspi_clkdiv(sc, conf->sc_freq));
187aa4c9c40Skettenis HWRITE4(sc, SPI_CLKIDLE, 0);
188aa4c9c40Skettenis
189aa4c9c40Skettenis HWRITE4(sc, SPI_CONFIG, SPI_CONFIG_EN);
190aa4c9c40Skettenis HWRITE4(sc, SPI_CLKCFG, SPI_CLKCFG_EN);
191aa4c9c40Skettenis HREAD4(sc, SPI_CONFIG);
192aa4c9c40Skettenis }
193aa4c9c40Skettenis
194aa4c9c40Skettenis uint32_t
aplspi_clkdiv(struct aplspi_softc * sc,uint32_t freq)195aa4c9c40Skettenis aplspi_clkdiv(struct aplspi_softc *sc, uint32_t freq)
196aa4c9c40Skettenis {
197aa4c9c40Skettenis uint32_t div = 0;
198aa4c9c40Skettenis
199aa4c9c40Skettenis while ((freq * div) < sc->sc_pfreq)
200aa4c9c40Skettenis div++;
201aa4c9c40Skettenis if (div < SPI_CLKDIV_MIN)
202aa4c9c40Skettenis div = SPI_CLKDIV_MIN;
203aa4c9c40Skettenis if (div > SPI_CLKDIV_MAX)
204aa4c9c40Skettenis div = SPI_CLKDIV_MAX;
205aa4c9c40Skettenis
206aa4c9c40Skettenis return div << 1;
207aa4c9c40Skettenis }
208aa4c9c40Skettenis
209aa4c9c40Skettenis void
aplspi_set_cs(struct aplspi_softc * sc,int cs,int on)210aa4c9c40Skettenis aplspi_set_cs(struct aplspi_softc *sc, int cs, int on)
211aa4c9c40Skettenis {
212b2212487Skettenis if (cs == 0) {
213b2212487Skettenis if (sc->sc_csgpio)
214aa4c9c40Skettenis gpio_controller_set_pin(sc->sc_csgpio, on);
215b2212487Skettenis else
216b2212487Skettenis HWRITE4(sc, SPI_PIN, on ? 0 : SPI_PIN_CS);
217b2212487Skettenis }
218aa4c9c40Skettenis }
219aa4c9c40Skettenis
220aa4c9c40Skettenis int
aplspi_transfer(void * cookie,char * out,char * in,int len,int flags)221aa4c9c40Skettenis aplspi_transfer(void *cookie, char *out, char *in, int len, int flags)
222aa4c9c40Skettenis {
223aa4c9c40Skettenis struct aplspi_softc *sc = cookie;
224aa4c9c40Skettenis uint32_t avail, data, status;
225aa4c9c40Skettenis int rsplen;
226aa4c9c40Skettenis int count;
227aa4c9c40Skettenis
228aa4c9c40Skettenis aplspi_set_cs(sc, sc->sc_cs, 1);
229aa4c9c40Skettenis delay(sc->sc_cs_delay);
230aa4c9c40Skettenis
231aa4c9c40Skettenis HWRITE4(sc, SPI_TXCNT, len);
232aa4c9c40Skettenis HWRITE4(sc, SPI_RXCNT, len);
233aa4c9c40Skettenis HWRITE4(sc, SPI_CONFIG, SPI_CONFIG_EN | SPI_CONFIG_PIOEN);
234aa4c9c40Skettenis
235aa4c9c40Skettenis rsplen = len;
236aa4c9c40Skettenis while (len > 0 || rsplen > 0) {
237aa4c9c40Skettenis avail = HREAD4(sc, SPI_AVAIL);
238aa4c9c40Skettenis count = SPI_AVAIL_RX(avail);
239aa4c9c40Skettenis while (rsplen > 0 && count > 0) {
240aa4c9c40Skettenis data = HREAD4(sc, SPI_RXDATA);
241aa4c9c40Skettenis if (in)
242aa4c9c40Skettenis *in++ = data;
243aa4c9c40Skettenis rsplen--;
244aa4c9c40Skettenis
245aa4c9c40Skettenis avail = HREAD4(sc, SPI_AVAIL);
246aa4c9c40Skettenis count = SPI_AVAIL_RX(avail);
247aa4c9c40Skettenis }
248aa4c9c40Skettenis
249aa4c9c40Skettenis count = SPI_FIFO_SIZE - SPI_AVAIL_TX(avail);
250aa4c9c40Skettenis while (len > 0 && count > 0) {
251aa4c9c40Skettenis data = out ? *out++ : 0;
252aa4c9c40Skettenis HWRITE4(sc, SPI_TXDATA, data);
253aa4c9c40Skettenis len--;
254aa4c9c40Skettenis count--;
255aa4c9c40Skettenis }
256aa4c9c40Skettenis }
257aa4c9c40Skettenis
258aa4c9c40Skettenis HWRITE4(sc, SPI_CONFIG, SPI_CONFIG_EN);
259aa4c9c40Skettenis status = HREAD4(sc, SPI_STATUS);
260aa4c9c40Skettenis HWRITE4(sc, SPI_STATUS, status);
261aa4c9c40Skettenis
262aa4c9c40Skettenis if (!ISSET(flags, SPI_KEEP_CS))
263aa4c9c40Skettenis aplspi_set_cs(sc, sc->sc_cs, 0);
264aa4c9c40Skettenis
265aa4c9c40Skettenis return 0;
266aa4c9c40Skettenis }
267aa4c9c40Skettenis
268aa4c9c40Skettenis int
aplspi_acquire_bus(void * cookie,int flags)269aa4c9c40Skettenis aplspi_acquire_bus(void *cookie, int flags)
270aa4c9c40Skettenis {
27108231622Skettenis struct aplspi_softc *sc = cookie;
27208231622Skettenis
27308231622Skettenis mtx_enter(&sc->sc_mtx);
274aa4c9c40Skettenis return 0;
275aa4c9c40Skettenis }
276aa4c9c40Skettenis
277aa4c9c40Skettenis void
aplspi_release_bus(void * cookie,int flags)278aa4c9c40Skettenis aplspi_release_bus(void *cookie, int flags)
279aa4c9c40Skettenis {
28008231622Skettenis struct aplspi_softc *sc = cookie;
28108231622Skettenis
28208231622Skettenis mtx_leave(&sc->sc_mtx);
283aa4c9c40Skettenis }
284aa4c9c40Skettenis
285aa4c9c40Skettenis void
aplspi_scan(struct aplspi_softc * sc)286aa4c9c40Skettenis aplspi_scan(struct aplspi_softc *sc)
287aa4c9c40Skettenis {
288aa4c9c40Skettenis struct spi_attach_args sa;
289aa4c9c40Skettenis uint32_t reg[1];
290aa4c9c40Skettenis char name[32];
291aa4c9c40Skettenis int node;
292aa4c9c40Skettenis
293aa4c9c40Skettenis for (node = OF_child(sc->sc_node); node; node = OF_peer(node)) {
294aa4c9c40Skettenis memset(name, 0, sizeof(name));
295aa4c9c40Skettenis memset(reg, 0, sizeof(reg));
296aa4c9c40Skettenis
297aa4c9c40Skettenis if (OF_getprop(node, "compatible", name, sizeof(name)) == -1)
298aa4c9c40Skettenis continue;
299aa4c9c40Skettenis if (name[0] == '\0')
300aa4c9c40Skettenis continue;
301aa4c9c40Skettenis
302aa4c9c40Skettenis if (OF_getprop(node, "reg", ®, sizeof(reg)) != sizeof(reg))
303aa4c9c40Skettenis continue;
304aa4c9c40Skettenis
305aa4c9c40Skettenis memset(&sa, 0, sizeof(sa));
306aa4c9c40Skettenis sa.sa_tag = &sc->sc_tag;
307aa4c9c40Skettenis sa.sa_name = name;
308aa4c9c40Skettenis sa.sa_cookie = &node;
309aa4c9c40Skettenis
310aa4c9c40Skettenis config_found(&sc->sc_dev, &sa, NULL);
311aa4c9c40Skettenis }
312aa4c9c40Skettenis }
313