xref: /openbsd-src/sys/arch/arm/include/softintr.h (revision dacd911afd79bb107e64e769fd9f403208f9a3bc)
1*dacd911aSkettenis /*	$OpenBSD: softintr.h,v 1.6 2020/08/14 16:51:09 kettenis Exp $	*/
2e1e4f5b1Sdrahn /*	$NetBSD: softintr.h,v 1.1 2002/01/29 22:54:14 thorpej Exp $	*/
3e1e4f5b1Sdrahn 
4e1e4f5b1Sdrahn /*
5e1e4f5b1Sdrahn  * Copyright (c) 2001 Wasabi Systems, Inc.
6e1e4f5b1Sdrahn  * All rights reserved.
7e1e4f5b1Sdrahn  *
8e1e4f5b1Sdrahn  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9e1e4f5b1Sdrahn  *
10e1e4f5b1Sdrahn  * Redistribution and use in source and binary forms, with or without
11e1e4f5b1Sdrahn  * modification, are permitted provided that the following conditions
12e1e4f5b1Sdrahn  * are met:
13e1e4f5b1Sdrahn  * 1. Redistributions of source code must retain the above copyright
14e1e4f5b1Sdrahn  *    notice, this list of conditions and the following disclaimer.
15e1e4f5b1Sdrahn  * 2. Redistributions in binary form must reproduce the above copyright
16e1e4f5b1Sdrahn  *    notice, this list of conditions and the following disclaimer in the
17e1e4f5b1Sdrahn  *    documentation and/or other materials provided with the distribution.
18e1e4f5b1Sdrahn  * 3. All advertising materials mentioning features or use of this software
19e1e4f5b1Sdrahn  *    must display the following acknowledgement:
20e1e4f5b1Sdrahn  *	This product includes software developed for the NetBSD Project by
21e1e4f5b1Sdrahn  *	Wasabi Systems, Inc.
22e1e4f5b1Sdrahn  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23e1e4f5b1Sdrahn  *    or promote products derived from this software without specific prior
24e1e4f5b1Sdrahn  *    written permission.
25e1e4f5b1Sdrahn  *
26e1e4f5b1Sdrahn  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27e1e4f5b1Sdrahn  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28e1e4f5b1Sdrahn  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29e1e4f5b1Sdrahn  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
30e1e4f5b1Sdrahn  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31e1e4f5b1Sdrahn  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32e1e4f5b1Sdrahn  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33e1e4f5b1Sdrahn  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34e1e4f5b1Sdrahn  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35e1e4f5b1Sdrahn  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36e1e4f5b1Sdrahn  * POSSIBILITY OF SUCH DAMAGE.
37e1e4f5b1Sdrahn  */
38e1e4f5b1Sdrahn 
39e1e4f5b1Sdrahn #ifndef	_ARM_SOFTINTR_H_
40e1e4f5b1Sdrahn #define	_ARM_SOFTINTR_H_
41e1e4f5b1Sdrahn 
42e1e4f5b1Sdrahn #ifdef _KERNEL
43e1e4f5b1Sdrahn 
44101cceb1Soga #include <sys/mutex.h>
45101cceb1Soga 
46e1e4f5b1Sdrahn /*
47*dacd911aSkettenis  * Generic software interrupt support.
48e1e4f5b1Sdrahn  *
49e1e4f5b1Sdrahn  * To use this code, include <arm/softintr.h> from your platform's
50e1e4f5b1Sdrahn  * <machine/intr.h>.
51e1e4f5b1Sdrahn  */
52e1e4f5b1Sdrahn 
53e1e4f5b1Sdrahn #define	SI_SOFT			0	/* for IPL_SOFT */
54e1e4f5b1Sdrahn #define	SI_SOFTCLOCK		1	/* for IPL_SOFTCLOCK */
55e1e4f5b1Sdrahn #define	SI_SOFTNET		2	/* for IPL_SOFTNET */
5699725abbSkettenis #define	SI_SOFTTTY		3	/* for IPL_SOFTTTY */
57e1e4f5b1Sdrahn 
58e1e4f5b1Sdrahn #define	SI_NQUEUES		4
59e1e4f5b1Sdrahn 
60e1e4f5b1Sdrahn struct soft_intrhand {
61e1e4f5b1Sdrahn 	TAILQ_ENTRY(soft_intrhand) sih_list;
62e1e4f5b1Sdrahn 	void (*sih_func)(void *);
63e1e4f5b1Sdrahn 	void *sih_arg;
64e1e4f5b1Sdrahn 	struct soft_intrq *sih_siq;
65e1e4f5b1Sdrahn 	int sih_pending;
66e1e4f5b1Sdrahn };
67e1e4f5b1Sdrahn 
68e1e4f5b1Sdrahn struct soft_intrq {
69101cceb1Soga 	TAILQ_HEAD(, soft_intrhand)
70101cceb1Soga 			siq_list;
71e1e4f5b1Sdrahn 	int		siq_si;
72101cceb1Soga 	struct mutex	siq_mtx;
73e1e4f5b1Sdrahn };
74e1e4f5b1Sdrahn 
75e1e4f5b1Sdrahn void	*softintr_establish(int, void (*)(void *), void *);
76e1e4f5b1Sdrahn void	softintr_disestablish(void *);
77e1e4f5b1Sdrahn void	softintr_init(void);
78e1e4f5b1Sdrahn void	softintr_dispatch(int);
79e1e4f5b1Sdrahn 
80e1e4f5b1Sdrahn #define	softintr_schedule(arg)						\
81e1e4f5b1Sdrahn do {									\
82e1e4f5b1Sdrahn 	struct soft_intrhand *__sih = (arg);				\
83e1e4f5b1Sdrahn 	struct soft_intrq *__siq = __sih->sih_siq;			\
84e1e4f5b1Sdrahn 									\
85101cceb1Soga 	mtx_enter(&__siq->siq_mtx);					\
86e1e4f5b1Sdrahn 	if (__sih->sih_pending == 0) {					\
87e1e4f5b1Sdrahn 		TAILQ_INSERT_TAIL(&__siq->siq_list, __sih, sih_list);	\
88e1e4f5b1Sdrahn 		__sih->sih_pending = 1;					\
89e1e4f5b1Sdrahn 		_setsoftintr(__siq->siq_si);				\
90e1e4f5b1Sdrahn 	}								\
91101cceb1Soga 	mtx_leave(&__siq->siq_mtx);					\
92e1e4f5b1Sdrahn } while (/*CONSTCOND*/0)
93e1e4f5b1Sdrahn 
94e1e4f5b1Sdrahn #endif /* _KERNEL */
95e1e4f5b1Sdrahn 
96e1e4f5b1Sdrahn #endif	/* _ARM_SOFTINTR_H_ */
97