xref: /openbsd-src/sys/arch/arm/include/ieee.h (revision e730de40ef78833f65238c6e0f4e0000aeaeae2b)
1*e730de40Sderaadt /*	$OpenBSD: ieee.h,v 1.4 2011/11/08 17:06:51 deraadt Exp $	*/
2e1e4f5b1Sdrahn /*	$NetBSD: ieee.h,v 1.2 2001/02/21 17:43:50 bjh21 Exp $	*/
3e1e4f5b1Sdrahn 
4e1e4f5b1Sdrahn /*
5e1e4f5b1Sdrahn  * Copyright (c) 1992, 1993
6e1e4f5b1Sdrahn  *	The Regents of the University of California.  All rights reserved.
7e1e4f5b1Sdrahn  *
8e1e4f5b1Sdrahn  * This software was developed by the Computer Systems Engineering group
9e1e4f5b1Sdrahn  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10e1e4f5b1Sdrahn  * contributed to Berkeley.
11e1e4f5b1Sdrahn  *
12e1e4f5b1Sdrahn  * All advertising materials mentioning features or use of this software
13e1e4f5b1Sdrahn  * must display the following acknowledgement:
14e1e4f5b1Sdrahn  *	This product includes software developed by the University of
15e1e4f5b1Sdrahn  *	California, Lawrence Berkeley Laboratory.
16e1e4f5b1Sdrahn  *
17e1e4f5b1Sdrahn  * Redistribution and use in source and binary forms, with or without
18e1e4f5b1Sdrahn  * modification, are permitted provided that the following conditions
19e1e4f5b1Sdrahn  * are met:
20e1e4f5b1Sdrahn  * 1. Redistributions of source code must retain the above copyright
21e1e4f5b1Sdrahn  *    notice, this list of conditions and the following disclaimer.
22e1e4f5b1Sdrahn  * 2. Redistributions in binary form must reproduce the above copyright
23e1e4f5b1Sdrahn  *    notice, this list of conditions and the following disclaimer in the
24e1e4f5b1Sdrahn  *    documentation and/or other materials provided with the distribution.
25e1e4f5b1Sdrahn  * 3. All advertising materials mentioning features or use of this software
26e1e4f5b1Sdrahn  *    must display the following acknowledgement:
27e1e4f5b1Sdrahn  *	This product includes software developed by the University of
28e1e4f5b1Sdrahn  *	California, Berkeley and its contributors.
29e1e4f5b1Sdrahn  * 4. Neither the name of the University nor the names of its contributors
30e1e4f5b1Sdrahn  *    may be used to endorse or promote products derived from this software
31e1e4f5b1Sdrahn  *    without specific prior written permission.
32e1e4f5b1Sdrahn  *
33e1e4f5b1Sdrahn  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34e1e4f5b1Sdrahn  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35e1e4f5b1Sdrahn  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36e1e4f5b1Sdrahn  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37e1e4f5b1Sdrahn  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38e1e4f5b1Sdrahn  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39e1e4f5b1Sdrahn  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40e1e4f5b1Sdrahn  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41e1e4f5b1Sdrahn  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42e1e4f5b1Sdrahn  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43e1e4f5b1Sdrahn  * SUCH DAMAGE.
44e1e4f5b1Sdrahn  *
45e1e4f5b1Sdrahn  *	@(#)ieee.h	8.1 (Berkeley) 6/11/93
46e1e4f5b1Sdrahn  */
47e1e4f5b1Sdrahn 
48e1e4f5b1Sdrahn /*
49e1e4f5b1Sdrahn  * ieee.h defines the machine-dependent layout of the machine's IEEE
50e1e4f5b1Sdrahn  * floating point.
51e1e4f5b1Sdrahn  */
52e1e4f5b1Sdrahn 
53e1e4f5b1Sdrahn /*
54e1e4f5b1Sdrahn  * Define the number of bits in each fraction and exponent.
55e1e4f5b1Sdrahn  *
56e1e4f5b1Sdrahn  *		     k	         k+1
57e1e4f5b1Sdrahn  * Note that  1.0 x 2  == 0.1 x 2      and that denorms are represented
58e1e4f5b1Sdrahn  *
59e1e4f5b1Sdrahn  *					  (-exp_bias+1)
60e1e4f5b1Sdrahn  * as fractions that look like 0.fffff x 2             .  This means that
61e1e4f5b1Sdrahn  *
62e1e4f5b1Sdrahn  *			 -126
63e1e4f5b1Sdrahn  * the number 0.10000 x 2    , for instance, is the same as the normalized
64e1e4f5b1Sdrahn  *
65e1e4f5b1Sdrahn  *		-127			   -128
66e1e4f5b1Sdrahn  * float 1.0 x 2    .  Thus, to represent 2    , we need one leading zero
67e1e4f5b1Sdrahn  *
68e1e4f5b1Sdrahn  *				  -129
69e1e4f5b1Sdrahn  * in the fraction; to represent 2    , we need two, and so on.  This
70e1e4f5b1Sdrahn  *
71e1e4f5b1Sdrahn  *						     (-exp_bias-fracbits+1)
72e1e4f5b1Sdrahn  * implies that the smallest denormalized number is 2
73e1e4f5b1Sdrahn  *
74e1e4f5b1Sdrahn  * for whichever format we are talking about: for single precision, for
75e1e4f5b1Sdrahn  *
76e1e4f5b1Sdrahn  *						-126		-149
77e1e4f5b1Sdrahn  * instance, we get .00000000000000000000001 x 2    , or 1.0 x 2    , and
78e1e4f5b1Sdrahn  *
79e1e4f5b1Sdrahn  * -149 == -127 - 23 + 1.
80e1e4f5b1Sdrahn  */
81e1e4f5b1Sdrahn 
82e1e4f5b1Sdrahn /*
83e1e4f5b1Sdrahn  * The ARM has two sets of FP data formats.  The FPA supports 32-bit, 64-bit
84e1e4f5b1Sdrahn  * and 96-bit IEEE formats, with the words in big-endian order.  VFP supports
85e1e4f5b1Sdrahn  * 32-bin and 64-bit IEEE formats with the words in the CPU's native byte
86e1e4f5b1Sdrahn  * order.
87e1e4f5b1Sdrahn  *
88e1e4f5b1Sdrahn  * The FPA also has two packed decimal formats, but we ignore them here.
89e1e4f5b1Sdrahn  */
90e1e4f5b1Sdrahn 
91e1e4f5b1Sdrahn #define	SNG_EXPBITS	8
92e1e4f5b1Sdrahn #define	SNG_FRACBITS	23
93e1e4f5b1Sdrahn 
94e1e4f5b1Sdrahn #define	DBL_EXPBITS	11
957b36286aSmartynas #define	DBL_FRACHBITS	20
967b36286aSmartynas #define	DBL_FRACLBITS	32
97e1e4f5b1Sdrahn #define	DBL_FRACBITS	52
98e1e4f5b1Sdrahn 
99e1e4f5b1Sdrahn #ifndef __VFP_FP__
100e1e4f5b1Sdrahn #define	E80_EXPBITS	15
1017b36286aSmartynas #define	E80_FRACHBITS	31
1027b36286aSmartynas #define	E80_FRACLBITS	32
103e1e4f5b1Sdrahn #define	E80_FRACBITS	64
104e1e4f5b1Sdrahn 
105e1e4f5b1Sdrahn #define	EXT_EXPBITS	15
1067b36286aSmartynas #define	EXT_FRACHBITS	16
1077b36286aSmartynas #define	EXT_FRACHMBITS	32
1087b36286aSmartynas #define	EXT_FRACLMBITS	32
1097b36286aSmartynas #define	EXT_FRACLBITS	32
110e1e4f5b1Sdrahn #define	EXT_FRACBITS	112
111e1e4f5b1Sdrahn #endif
112e1e4f5b1Sdrahn 
113e1e4f5b1Sdrahn struct ieee_single {
114e1e4f5b1Sdrahn 	u_int	sng_frac:23;
11554d6e26dSderaadt 	u_int	sng_exp:8;
116e1e4f5b1Sdrahn 	u_int	sng_sign:1;
117e1e4f5b1Sdrahn };
118e1e4f5b1Sdrahn 
119e1e4f5b1Sdrahn #ifdef __VFP_FP__
120e1e4f5b1Sdrahn struct ieee_double {
121e1e4f5b1Sdrahn 	u_int	dbl_fracl;
122e1e4f5b1Sdrahn 	u_int	dbl_frach:20;
123e1e4f5b1Sdrahn 	u_int	dbl_exp:11;
124e1e4f5b1Sdrahn 	u_int	dbl_sign:1;
125e1e4f5b1Sdrahn };
126e1e4f5b1Sdrahn #else /* !__VFP_FP__ */
127e1e4f5b1Sdrahn struct ieee_double {
128e1e4f5b1Sdrahn 	u_int	dbl_frach:20;
129e1e4f5b1Sdrahn 	u_int	dbl_exp:11;
130e1e4f5b1Sdrahn 	u_int	dbl_sign:1;
131e1e4f5b1Sdrahn 	u_int	dbl_fracl;
132e1e4f5b1Sdrahn };
133e1e4f5b1Sdrahn 
134e1e4f5b1Sdrahn union ieee_double_u {
135e1e4f5b1Sdrahn 	double                  dblu_d;
136e1e4f5b1Sdrahn 	struct ieee_double      dblu_dbl;
137e1e4f5b1Sdrahn };
138e1e4f5b1Sdrahn 
139e1e4f5b1Sdrahn 
140e1e4f5b1Sdrahn struct ieee_e80 {
141e1e4f5b1Sdrahn 	u_int	e80_exp:15;
142e1e4f5b1Sdrahn 	u_int	e80_zero:16;
143e1e4f5b1Sdrahn 	u_int	e80_sign:1;
144e1e4f5b1Sdrahn 	u_int	e80_frach:31;
145e1e4f5b1Sdrahn 	u_int	e80_j:1;
146e1e4f5b1Sdrahn 	u_int	e80_fracl;
147e1e4f5b1Sdrahn };
148e1e4f5b1Sdrahn 
149e1e4f5b1Sdrahn struct ieee_ext {
150e1e4f5b1Sdrahn 	u_int	ext_frach:16;
151e1e4f5b1Sdrahn 	u_int	ext_exp:15;
152e1e4f5b1Sdrahn 	u_int	ext_sign:1;
153e1e4f5b1Sdrahn 	u_int	ext_frachm;
154e1e4f5b1Sdrahn 	u_int	ext_fraclm;
155e1e4f5b1Sdrahn 	u_int	ext_fracl;
156e1e4f5b1Sdrahn };
157e1e4f5b1Sdrahn #endif /* !__VFP_FP__ */
158e1e4f5b1Sdrahn 
159e1e4f5b1Sdrahn /*
160e1e4f5b1Sdrahn  * Floats whose exponent is in [1..INFNAN) (of whatever type) are
161e1e4f5b1Sdrahn  * `normal'.  Floats whose exponent is INFNAN are either Inf or NaN.
162e1e4f5b1Sdrahn  * Floats whose exponent is zero are either zero (iff all fraction
163e1e4f5b1Sdrahn  * bits are zero) or subnormal values.
164e1e4f5b1Sdrahn  *
165e1e4f5b1Sdrahn  * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
166e1e4f5b1Sdrahn  * high fraction; if the bit is set, it is a `quiet NaN'.
167e1e4f5b1Sdrahn  */
168e1e4f5b1Sdrahn #define	SNG_EXP_INFNAN	255
169e1e4f5b1Sdrahn #define	DBL_EXP_INFNAN	2047
170e1e4f5b1Sdrahn #ifndef __VFP_FP__
171e1e4f5b1Sdrahn #define	E80_EXP_INFNAN	32767
172e1e4f5b1Sdrahn #define	EXT_EXP_INFNAN	32767
173e1e4f5b1Sdrahn #endif /* !__VFP_FP__ */
174e1e4f5b1Sdrahn 
175e1e4f5b1Sdrahn #if 0
176e1e4f5b1Sdrahn #define	SNG_QUIETNAN	(1 << 22)
177e1e4f5b1Sdrahn #define	DBL_QUIETNAN	(1 << 19)
178e1e4f5b1Sdrahn #ifndef __VFP_FP__
179e1e4f5b1Sdrahn #define	E80_QUIETNAN	(1 << 15)
180e1e4f5b1Sdrahn #define	EXT_QUIETNAN	(1 << 15)
181e1e4f5b1Sdrahn #endif /* !__VFP_FP__ */
182e1e4f5b1Sdrahn #endif
183e1e4f5b1Sdrahn 
184e1e4f5b1Sdrahn /*
185e1e4f5b1Sdrahn  * Exponent biases.
186e1e4f5b1Sdrahn  */
187e1e4f5b1Sdrahn #define	SNG_EXP_BIAS	127
188e1e4f5b1Sdrahn #define	DBL_EXP_BIAS	1023
189e1e4f5b1Sdrahn #ifndef __VFP_FP__
190e1e4f5b1Sdrahn #define	E80_EXP_BIAS	16383
191e1e4f5b1Sdrahn #define	EXT_EXP_BIAS	16383
192e1e4f5b1Sdrahn #endif /* !__VFP_FP__ */
193