1*555e6295Smlarkin /* $OpenBSD: hibernate_var.h,v 1.12 2014/12/08 07:12:37 mlarkin Exp $ */ 29c01f4bfSpirofti 3c5489a62Smlarkin /* 4c5489a62Smlarkin * Copyright (c) 2011 Mike Larkin <mlarkin@openbsd.org> 5c5489a62Smlarkin * 6c5489a62Smlarkin * Permission to use, copy, modify, and distribute this software for any 7c5489a62Smlarkin * purpose with or without fee is hereby granted, provided that the above 8c5489a62Smlarkin * copyright notice and this permission notice appear in all copies. 9c5489a62Smlarkin * 10c5489a62Smlarkin * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11c5489a62Smlarkin * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12c5489a62Smlarkin * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13c5489a62Smlarkin * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14c5489a62Smlarkin * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15c5489a62Smlarkin * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16c5489a62Smlarkin * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17c5489a62Smlarkin */ 18c5489a62Smlarkin 1922894a92Smlarkin #define PIGLET_PAGE_MASK (L2_FRAME) 209d14b009Smlarkin 219d14b009Smlarkin /* 22c2c5a242Smlarkin * PML4 table for resume 23c2c5a242Smlarkin */ 24*555e6295Smlarkin #define HIBERNATE_PML4T (PAGE_SIZE * 21) 25c2c5a242Smlarkin 26c2c5a242Smlarkin /* 27c2c5a242Smlarkin * amd64 uses a PDPT to map the first 512GB phys mem plus one more 289d14b009Smlarkin * to map any ranges of phys mem past 512GB (if needed) 299d14b009Smlarkin */ 30*555e6295Smlarkin #define HIBERNATE_PDPT_LOW (PAGE_SIZE * 22) 31*555e6295Smlarkin #define HIBERNATE_PDPT_HI (PAGE_SIZE * 23) 329d14b009Smlarkin 339d14b009Smlarkin /* 34c2c5a242Smlarkin * amd64 uses one PD to map the first 1GB phys mem plus one more to map any 35c2c5a242Smlarkin * other 1GB ranges within the first 512GB phys, plus one more to map any 36c2c5a242Smlarkin * 1GB range in any subsequent 512GB range 379d14b009Smlarkin */ 38*555e6295Smlarkin #define HIBERNATE_PD_LOW (PAGE_SIZE * 24) 39*555e6295Smlarkin #define HIBERNATE_PD_LOW2 (PAGE_SIZE * 25) 40*555e6295Smlarkin #define HIBERNATE_PD_HI (PAGE_SIZE * 26) 419d14b009Smlarkin 429d14b009Smlarkin /* 43c2c5a242Smlarkin * amd64 uses one PT to map the first 2MB phys mem plus one more to map any 44c2c5a242Smlarkin * other 2MB range within the first 1GB, plus one more to map any 2MB range 45c2c5a242Smlarkin * in any subsequent 512GB range. 469d14b009Smlarkin */ 47*555e6295Smlarkin #define HIBERNATE_PT_LOW (PAGE_SIZE * 27) 48*555e6295Smlarkin #define HIBERNATE_PT_LOW2 (PAGE_SIZE * 28) 49*555e6295Smlarkin #define HIBERNATE_PT_HI (PAGE_SIZE * 29) 509d14b009Smlarkin 51c2c5a242Smlarkin /* 3 pages for stack */ 52*555e6295Smlarkin #define HIBERNATE_STACK_PAGE (PAGE_SIZE * 32) 53c2c5a242Smlarkin 54*555e6295Smlarkin #define HIBERNATE_INFLATE_PAGE (PAGE_SIZE * 33) 559d14b009Smlarkin /* HIBERNATE_HIBALLOC_PAGE must be the last stolen page (see machdep.c) */ 56*555e6295Smlarkin #define HIBERNATE_HIBALLOC_PAGE (PAGE_SIZE * 34) 57c5489a62Smlarkin 58c5489a62Smlarkin /* Use 4MB hibernation chunks */ 59c5489a62Smlarkin #define HIBERNATE_CHUNK_SIZE 0x400000 60c5489a62Smlarkin 61c5489a62Smlarkin #define HIBERNATE_CHUNK_TABLE_SIZE 0x100000 62c5489a62Smlarkin 63c5489a62Smlarkin #define HIBERNATE_STACK_OFFSET 0x0F00 64