1*2f4de8e4Srobert /* $OpenBSD: mcbusvar.h,v 1.1 2007/03/16 21:22:27 robert Exp $ */ 2*2f4de8e4Srobert /* $NetBSD: mcbusvar.h,v 1.6 2005/12/11 12:16:17 christos Exp $ */ 3*2f4de8e4Srobert 4*2f4de8e4Srobert /* 5*2f4de8e4Srobert * Copyright (c) 1998 by Matthew Jacob 6*2f4de8e4Srobert * NASA AMES Research Center. 7*2f4de8e4Srobert * All rights reserved. 8*2f4de8e4Srobert * 9*2f4de8e4Srobert * Redistribution and use in source and binary forms, with or without 10*2f4de8e4Srobert * modification, are permitted provided that the following conditions 11*2f4de8e4Srobert * are met: 12*2f4de8e4Srobert * 1. Redistributions of source code must retain the above copyright 13*2f4de8e4Srobert * notice immediately at the beginning of the file, without modification, 14*2f4de8e4Srobert * this list of conditions, and the following disclaimer. 15*2f4de8e4Srobert * 2. Redistributions in binary form must reproduce the above copyright 16*2f4de8e4Srobert * notice, this list of conditions and the following disclaimer in the 17*2f4de8e4Srobert * documentation and/or other materials provided with the distribution. 18*2f4de8e4Srobert * 3. The name of the author may not be used to endorse or promote products 19*2f4de8e4Srobert * derived from this software without specific prior written permission. 20*2f4de8e4Srobert * 21*2f4de8e4Srobert * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22*2f4de8e4Srobert * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23*2f4de8e4Srobert * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24*2f4de8e4Srobert * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 25*2f4de8e4Srobert * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26*2f4de8e4Srobert * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27*2f4de8e4Srobert * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28*2f4de8e4Srobert * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29*2f4de8e4Srobert * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30*2f4de8e4Srobert * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31*2f4de8e4Srobert * SUCH DAMAGE. 32*2f4de8e4Srobert */ 33*2f4de8e4Srobert 34*2f4de8e4Srobert /* 35*2f4de8e4Srobert * Soft definitions for the MCBUS main system 36*2f4de8e4Srobert * bus found on AlphaServer 4100 systems. 37*2f4de8e4Srobert */ 38*2f4de8e4Srobert 39*2f4de8e4Srobert /* 40*2f4de8e4Srobert * The structure used to attach devices to the MCbus. 41*2f4de8e4Srobert */ 42*2f4de8e4Srobert struct mcbus_dev_attach_args { 43*2f4de8e4Srobert char * ma_name; /* so things aren't confused */ 44*2f4de8e4Srobert u_int8_t ma_gid; /* GID of MCBUS (MCBUS #) */ 45*2f4de8e4Srobert u_int8_t ma_mid; /* Module ID on MCBUS */ 46*2f4de8e4Srobert u_int8_t ma_type; /* Module "type" */ 47*2f4de8e4Srobert u_int8_t ma_configured; /* nonzero if configured */ 48*2f4de8e4Srobert }; 49*2f4de8e4Srobert #define MCBUS_GID_FROM_INSTANCE(unit) (7 - unit) 50*2f4de8e4Srobert 51*2f4de8e4Srobert /* 52*2f4de8e4Srobert * Bus-dependent structure for CPUs. This is dynamically allocated 53*2f4de8e4Srobert * for each CPU on the MCbus, and glued into the cpu_softc as sc_busdep, 54*2f4de8e4Srobert * if there is such a beast available. Otherwise, a single global version 55*2f4de8e4Srobert * is used so that the MCPCIA configuration code can determine toads 56*2f4de8e4Srobert * like module id and bcache size of the master CPU. 57*2f4de8e4Srobert */ 58*2f4de8e4Srobert struct mcbus_cpu_busdep { 59*2f4de8e4Srobert u_int8_t mcbus_cpu_mid; /* MCbus Module ID */ 60*2f4de8e4Srobert u_int8_t mcbus_bcache; /* BCache on this CPU */ 61*2f4de8e4Srobert u_int8_t mcbus_valid; 62*2f4de8e4Srobert }; 63*2f4de8e4Srobert 64*2f4de8e4Srobert #define MCBUS_CPU_BCACHE_0MB 0 65*2f4de8e4Srobert #define MCBUS_CPU_BCACHE_1MB 1 66*2f4de8e4Srobert #define MCBUS_CPU_BCACHE_4MB 2 67*2f4de8e4Srobert 68*2f4de8e4Srobert /* 69*2f4de8e4Srobert * "types" 70*2f4de8e4Srobert */ 71*2f4de8e4Srobert #define MCBUS_TYPE_RES 0 72*2f4de8e4Srobert #define MCBUS_TYPE_UNK 1 73*2f4de8e4Srobert #define MCBUS_TYPE_MEM 2 74*2f4de8e4Srobert #define MCBUS_TYPE_CPU 3 75*2f4de8e4Srobert #define MCBUS_TYPE_PCI 4 76*2f4de8e4Srobert 77*2f4de8e4Srobert #ifdef _KERNEL 78*2f4de8e4Srobert extern struct mcbus_cpu_busdep mcbus_primary; 79*2f4de8e4Srobert extern const int mcbus_mcpcia_probe_order[]; 80*2f4de8e4Srobert #endif 81