1*c542be8aSjsg.\" $OpenBSD: clockintr.9,v 1.3 2022/11/10 23:57:31 jsg Exp $ 2329e3480Scheloha.\" 3329e3480Scheloha.\" Copyright (c) 2020-2022 Scott Cheloha <cheloha@openbsd.org> 4329e3480Scheloha.\" 5329e3480Scheloha.\" Permission to use, copy, modify, and distribute this software for any 6329e3480Scheloha.\" purpose with or without fee is hereby granted, provided that the above 7329e3480Scheloha.\" copyright notice and this permission notice appear in all copies. 8329e3480Scheloha.\" 9329e3480Scheloha.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10329e3480Scheloha.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11329e3480Scheloha.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12329e3480Scheloha.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13329e3480Scheloha.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14329e3480Scheloha.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15329e3480Scheloha.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16329e3480Scheloha.\" 17*c542be8aSjsg.Dd $Mdocdate: November 10 2022 $ 18329e3480Scheloha.Dt CLOCKINTR 9 19329e3480Scheloha.Os 20329e3480Scheloha.Sh NAME 21031079e7Sjmc.Nm clockintr_init , 22329e3480Scheloha.Nm clockintr_cpu_init , 23329e3480Scheloha.Nm clockintr_dispatch , 24329e3480Scheloha.Nm clockintr_setstatclockrate , 25329e3480Scheloha.Nm clockintr_trigger 26329e3480Scheloha.Nd clock interrupt scheduler 27329e3480Scheloha.Sh SYNOPSIS 28329e3480Scheloha.In sys/clockintr.h 29329e3480Scheloha.Ft void 30329e3480Scheloha.Fo clockintr_init 31329e3480Scheloha.Fa "u_int flags" 32329e3480Scheloha.Fc 33329e3480Scheloha.Ft void 34329e3480Scheloha.Fo clockintr_cpu_init 35329e3480Scheloha.Fa "struct intrclock *ic" 36329e3480Scheloha.Fc 37329e3480Scheloha.Ft int 38329e3480Scheloha.Fo clockintr_dispatch 39329e3480Scheloha.Fa "void *frame" 40329e3480Scheloha.Fc 41329e3480Scheloha.Ft void 42329e3480Scheloha.Fo clockintr_setstatclockrate 43329e3480Scheloha.Fa "int freq" 44329e3480Scheloha.Fc 45329e3480Scheloha.Ft void 46329e3480Scheloha.Fo clockintr_trigger 47329e3480Scheloha.Fa "void" 48329e3480Scheloha.Fc 49329e3480Scheloha.In sys/kernel.h 50329e3480Scheloha.Vt extern int hz; 51329e3480Scheloha.Vt extern int stathz; 52329e3480Scheloha.Vt extern int profhz; 53329e3480Scheloha.In sys/sched.h 54329e3480Scheloha.Vt extern int schedhz; 55329e3480Scheloha.Sh DESCRIPTION 56329e3480SchelohaThe 57329e3480Scheloha.Nm 58329e3480Schelohasubsystem maintains a schedule of events, 59329e3480Schelohadispatches expired events, 60329e3480Schelohaand rearms the local interrupt clock for each CPU in the system. 61329e3480Scheloha.Pp 62329e3480SchelohaThe 63329e3480Scheloha.Fn clockintr_init 64329e3480Schelohafunction initializes the subsystem as follows: 65329e3480Scheloha.Bl -dash 66329e3480Scheloha.It 67329e3480Scheloha.Xr hardclock 9 68329e3480Schelohais configured to run 69329e3480Scheloha.Xr hz 9 70329e3480Schelohatimes per second on each CPU. 71329e3480SchelohaIt is an error if 72329e3480Scheloha.Vt hz 73329e3480Schelohais less than one or greater than one billion. 74329e3480Scheloha.It 75329e3480Scheloha.Fn statclock 76329e3480Schelohais configured to run 77329e3480Scheloha.Vt stathz 78329e3480Schelohatimes per second on each CPU. 79329e3480SchelohaIt is an error if 80329e3480Scheloha.Vt stathz 81329e3480Schelohais less than one or greater than one billion. 82329e3480Scheloha.It 83329e3480SchelohaWhen appropriate, 84329e3480Scheloha.Fn statclock 85329e3480Schelohawill be reconfigured to run 86329e3480Scheloha.Vt profhz 87329e3480Schelohatimes per second on each CPU. 88329e3480Scheloha.Vt profhz 89329e3480Schelohamust be a non-zero integer multiple of 90329e3480Scheloha.Vt stathz . 91329e3480SchelohaIt is an error if 92329e3480Scheloha.Vt profhz 93329e3480Schelohais less than 94329e3480Scheloha.Vt stathz 95329e3480Schelohaor greater than one billion. 96329e3480Scheloha.It 97329e3480SchelohaIf 98329e3480Scheloha.Vt schedhz 99329e3480Schelohais non-zero, 100329e3480Scheloha.Fn schedclock 101329e3480Schelohais configured to run 102329e3480Scheloha.Vt schedhz 103329e3480Schelohatimes per second on each CPU. 104329e3480SchelohaIt is an error if 105329e3480Scheloha.Vt schedhz 106329e3480Schelohais less than zero or greater than one billion. 107329e3480Scheloha.El 108329e3480Scheloha.Pp 109329e3480SchelohaThe event schedule has a resolution of one nanosecond and event periods are 110*c542be8aSjsgcomputed using integer division. 111329e3480SchelohaIf 112329e3480Scheloha.Vt hz , 113329e3480Scheloha.Vt stathz , 114329e3480Scheloha.Vt profhz , 115329e3480Schelohaor 116329e3480Scheloha.Vt schedhz 117329e3480Schelohado not divide evenly into one billion, 118329e3480Schelohathe corresponding event will not be dispatched at the specified frequency. 119329e3480Scheloha.Pp 120329e3480SchelohaThe 121329e3480Scheloha.Fn clockintr_init 122329e3480Schelohafunction accepts the bitwise OR of zero or more of the following 123329e3480Scheloha.Fa flags : 124329e3480Scheloha.Bl -tag -width CL_RNDSTAT 125329e3480Scheloha.It Dv CL_RNDSTAT 126329e3480SchelohaRandomize the 127329e3480Scheloha.Fn statclock . 128329e3480SchelohaInstead of using a fixed period, 129329e3480Schelohathe subsystem will select pseudorandom intervals in a range such that 130329e3480Schelohathe average 131329e3480Scheloha.Fn statclock 132329e3480Schelohaperiod is equal to the inverse of 133329e3480Scheloha.Vt stathz . 134329e3480Scheloha.El 135329e3480Scheloha.Pp 136329e3480SchelohaThe 137329e3480Scheloha.Fn clockintr_init 138329e3480Schelohafunction must be called exactly once and only by the primary CPU. 139329e3480SchelohaIt should be called after all timecounters are installed with 140329e3480Scheloha.Xr tc_init 9 . 141329e3480Scheloha.Pp 142329e3480SchelohaThe 143329e3480Scheloha.Fn clockintr_cpu_init 144329e3480Schelohafunction prepares the calling CPU for 145329e3480Scheloha.Fn clockintr_dispatch . 146329e3480SchelohaThe first time it is called on a given CPU, 147329e3480Schelohaif 148329e3480Scheloha.Fa ic 149329e3480Schelohais not 150329e3480Scheloha.Dv NULL , 151329e3480Schelohathe caller is configured to use the given 152329e3480Scheloha.Fa intrclock 153329e3480Schelohaduring 154329e3480Scheloha.Fn clockintr_dispatch ; 155329e3480Schelohaotherwise the caller is responsible for rearming its own interrupt 156329e3480Schelohaclock after each 157329e3480Scheloha.Fn clockintr_dispatch . 158329e3480SchelohaSubsequent calls ignore 159329e3480Scheloha.Fa ic : 160329e3480Schelohainstead, 161329e3480Schelohathe caller's event schedule is advanced past any expired events 162329e3480Schelohawithout dispatching those events. 163329e3480SchelohaIt is an error to call this function before the subsystem is initialized with 164329e3480Scheloha.Fn clockintr_init . 165329e3480SchelohaAll CPUs should call 166329e3480Scheloha.Fn clockintr_cpu_init 167329e3480Schelohaduring each system resume after the system time is updated with 168329e3480Scheloha.Xr inittodr 9 , 169329e3480Schelohaotherwise they will needlessly dispatch every event that expired while 170329e3480Schelohathe system was suspended. 171329e3480Scheloha.Pp 172329e3480SchelohaThe 173329e3480Scheloha.Fn clockintr_dispatch 174329e3480Schelohafunction executes all expired events on the caller's event schedule and, 175329e3480Schelohaif configured, 176329e3480Scheloharearms the caller's interrupt clock to fire when the next event is scheduled 177329e3480Schelohato expire. 178329e3480SchelohaThe 179329e3480Scheloha.Fa frame 180329e3480Schelohaargument must point to the caller's 181329e3480Scheloha.Dv clockframe 182329e3480Schelohastruct. 183329e3480SchelohaThe 184329e3480Scheloha.Fn clockintr_dispatch 185329e3480Schelohafunction should only be called from a clock interrupt handler at 186329e3480Scheloha.Dv IPL_CLOCK 187329e3480Scheloha.Pq see Xr spl 9 . 188329e3480SchelohaIt is an error to call this function on a given CPU before 189329e3480Scheloha.Fn clockintr_cpu_init . 190329e3480Scheloha.Pp 191329e3480SchelohaThe 192329e3480Scheloha.Fn clockintr_setstatclockrate 193329e3480Schelohafunction changes the effective dispatch frequency for 194329e3480Scheloha.Fn statclock 195329e3480Schelohato 196329e3480Scheloha.Fa freq . 197329e3480SchelohaIt should be called from the machine-dependent 198329e3480Scheloha.Fn setstatclockrate 199329e3480Schelohafunction after performing any needed hardware reconfiguration. 200329e3480SchelohaIt is an error if 201329e3480Scheloha.Fa freq 202329e3480Schelohais not equal to 203329e3480Scheloha.Vt stathz 204329e3480Schelohaor 205329e3480Scheloha.Vt profhz . 206329e3480SchelohaIt is an error to call this function before the subsystem is initialized with 207329e3480Scheloha.Fn clockintr_init . 208329e3480Scheloha.Pp 209329e3480SchelohaThe 210329e3480Scheloha.Fn clockintr_trigger 211329e3480Schelohafunction causes the 212329e3480Scheloha.Fn clockintr_dispatch 213329e3480Schelohafunction to run in the appropriate context as soon as possible if 214329e3480Schelohathe caller was configured with an 215329e3480Scheloha.Fa intrclock 216329e3480Schelohawhen 217329e3480Scheloha.Fn clockintr_cpu_init 218329e3480Schelohawas first called. 219329e3480SchelohaIf the caller was not configured with an 220329e3480Scheloha.Fa intrclock , 221329e3480Schelohathe function does nothing. 222329e3480SchelohaIt is an error to call this function on a given CPU before 223329e3480Scheloha.Fn clockintr_cpu_init . 224329e3480Scheloha.Pp 225329e3480SchelohaThe 226329e3480Scheloha.Fa ic 227329e3480Schelohaargument to 228329e3480Scheloha.Fn clockintr_cpu_init 229329e3480Schelohapoints to an 230329e3480Scheloha.Fa intrclock 231329e3480Schelohastructure: 232329e3480Scheloha.Bd -literal -offset indent 233329e3480Schelohastruct intrclock { 234329e3480Scheloha void *ic_cookie; 235329e3480Scheloha void (*ic_rearm)(void *cookie, uint64_t nsecs); 236329e3480Scheloha void (*ic_trigger)(void *cookie); 237329e3480Scheloha}; 238329e3480Scheloha.Ed 239329e3480Scheloha.Pp 240329e3480SchelohaThe 241329e3480Scheloha.Fa intrclock 242329e3480Schelohastructure provides the 243329e3480Scheloha.Nm 244329e3480Schelohasubsystem with a uniform interface for manipulating an interrupt clock. 245329e3480SchelohaIt has the following members: 246329e3480Scheloha.Bl -tag -width XXXXXXXXXX 247329e3480Scheloha.It Fa ic_cookie 248329e3480SchelohaMay point to any resources needed during 249329e3480Scheloha.Fa ic_rearm 250329e3480Schelohaor 251329e3480Scheloha.Fa ic_trigger 252329e3480Schelohato arm the underlying interrupt clock 253329e3480Scheloha.Pq see below . 254329e3480Scheloha.It Fa ic_rearm 255329e3480SchelohaShould cause 256329e3480Scheloha.Fn clockintr_dispatch 257329e3480Schelohato run on the calling CPU in the appropriate context after at least 258329e3480Scheloha.Fa nsecs 259329e3480Schelohananoseconds have elapsed. 260329e3480SchelohaThe first argument, 261329e3480Scheloha.Fa cookie , 262329e3480Schelohais the 263329e3480Scheloha.Fa ic_cookie 264329e3480Schelohamember of the parent structure. 265329e3480SchelohaThe second argument, 266329e3480Scheloha.Fa nsecs , 267329e3480Schelohais a non-zero count of nanoseconds. 268329e3480Scheloha.It Fa ic_trigger 269329e3480SchelohaShould cause 270329e3480Scheloha.Fn clockintr_dispatch 271329e3480Schelohato run on the calling CPU in the appropriate context as soon as possible. 272329e3480SchelohaThe first argument, 273329e3480Scheloha.Fa cookie , 274329e3480Schelohais the 275329e3480Scheloha.Fa ic_cookie 276329e3480Schelohamember of the parent structure. 277329e3480Scheloha.El 278329e3480Scheloha.Sh CONTEXT 279329e3480SchelohaThe 280329e3480Scheloha.Fn clockintr_init , 281329e3480Scheloha.Fn clockintr_cpu_init , 282329e3480Schelohaand 283329e3480Scheloha.Fn clockintr_trigger 284329e3480Schelohafunctions may be called during autoconf. 285329e3480Scheloha.Pp 286329e3480SchelohaThe 287329e3480Scheloha.Fn clockintr_dispatch 288329e3480Schelohafunction may be called from interrupt context at 289329e3480Scheloha.Dv IPL_CLOCK . 290329e3480Scheloha.Pp 291329e3480SchelohaThe 292329e3480Scheloha.Fn clockintr_setstatclockrate 293329e3480Schelohafunction may be called during autoconf, 294329e3480Schelohafrom process context, 295329e3480Schelohaor from interrupt context. 296329e3480Scheloha.Sh RETURN VALUES 297329e3480SchelohaThe 298329e3480Scheloha.Fn clockintr_dispatch 299329e3480Schelohafunction returns non-zero if at least one event was dispatched, 300329e3480Schelohaotherwise it returns zero. 301329e3480Scheloha.Sh CODE REFERENCES 302329e3480Scheloha.Pa sys/kern/kern_clockintr.c 303329e3480Scheloha.Sh SEE ALSO 304329e3480Scheloha.Xr hardclock 9 , 305329e3480Scheloha.Xr hz 9 , 306329e3480Scheloha.Xr inittodr 9 , 307329e3480Scheloha.Xr nanouptime 9 , 308329e3480Scheloha.Xr spl 9 , 309329e3480Scheloha.Xr tc_init 9 , 310329e3480Scheloha.Xr timeout 9 311329e3480Scheloha.Rs 312329e3480Scheloha.%A Steven McCanne 313329e3480Scheloha.%A Chris Torek 314329e3480Scheloha.%T A Randomized Sampling Clock for CPU Utilization Estimation and Code Profiling 315031079e7Sjmc.%B \&In Proc. Winter 1993 USENIX Conference 316329e3480Scheloha.%D 1993 317329e3480Scheloha.%P pp. 387\(en394 318329e3480Scheloha.%I USENIX Association 319329e3480Scheloha.Re 320329e3480Scheloha.Rs 321329e3480Scheloha.%A Richard McDougall 322329e3480Scheloha.%A Jim Mauro 323329e3480Scheloha.%B Solaris Internals: Solaris 10 and OpenSolaris Kernel Architecture 324329e3480Scheloha.%I Prentice Hall 325329e3480Scheloha.%I Sun Microsystems Press 326329e3480Scheloha.%D 2nd Edition, 2007 327329e3480Scheloha.%P pp. 912\(en925 328329e3480Scheloha.Re 329329e3480Scheloha.Sh HISTORY 330329e3480SchelohaThe 331329e3480Scheloha.Nm 332329e3480Schelohasubsystem first appeared in 333329e3480Scheloha.Ox 7.3 . 334