1*7e321ac1Sguenther /* $OpenBSD: _atomic_lock.c,v 1.1 2017/08/15 06:13:24 guenther Exp $ */
2*7e321ac1Sguenther /*
3*7e321ac1Sguenther * Copyright (c) 1998 Dale Rahn <drahn@openbsd.org>
4*7e321ac1Sguenther *
5*7e321ac1Sguenther * Permission to use, copy, modify, and distribute this software for any
6*7e321ac1Sguenther * purpose with or without fee is hereby granted, provided that the above
7*7e321ac1Sguenther * copyright notice and this permission notice appear in all copies.
8*7e321ac1Sguenther *
9*7e321ac1Sguenther * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10*7e321ac1Sguenther * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11*7e321ac1Sguenther * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12*7e321ac1Sguenther * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13*7e321ac1Sguenther * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14*7e321ac1Sguenther * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15*7e321ac1Sguenther * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16*7e321ac1Sguenther */
17*7e321ac1Sguenther
18*7e321ac1Sguenther /*
19*7e321ac1Sguenther * Atomic lock for powerpc
20*7e321ac1Sguenther */
21*7e321ac1Sguenther
22*7e321ac1Sguenther #include <machine/spinlock.h>
23*7e321ac1Sguenther
24*7e321ac1Sguenther int
_atomic_lock(volatile _atomic_lock_t * lock)25*7e321ac1Sguenther _atomic_lock(volatile _atomic_lock_t *lock)
26*7e321ac1Sguenther {
27*7e321ac1Sguenther _atomic_lock_t old;
28*7e321ac1Sguenther
29*7e321ac1Sguenther __asm__("1: lwarx 0,0,%1 \n"
30*7e321ac1Sguenther " stwcx. %2,0,%1 \n"
31*7e321ac1Sguenther " bne- 1b \n"
32*7e321ac1Sguenther " mr %0, 0 \n"
33*7e321ac1Sguenther : "=r" (old), "=r" (lock)
34*7e321ac1Sguenther : "r" (_ATOMIC_LOCK_LOCKED), "1" (lock) : "0"
35*7e321ac1Sguenther );
36*7e321ac1Sguenther
37*7e321ac1Sguenther return (old != _ATOMIC_LOCK_UNLOCKED);
38*7e321ac1Sguenther
39*7e321ac1Sguenther /*
40*7e321ac1Sguenther * Dale <drahn@openbsd.org> says:
41*7e321ac1Sguenther * Side note. to prevent two processes from accessing
42*7e321ac1Sguenther * the same address with the lwarx in one instruction
43*7e321ac1Sguenther * and the stwcx in another process, the current powerpc
44*7e321ac1Sguenther * kernel uses a stwcx instruction without the corresponding
45*7e321ac1Sguenther * lwarx which causes any reservation of a process
46*7e321ac1Sguenther * to be removed. if a context switch occurs
47*7e321ac1Sguenther * between the two accesses the store will not occur
48*7e321ac1Sguenther * and the condition code will cause it to loop. If on
49*7e321ac1Sguenther * a dual processor machine, the reserve will cause
50*7e321ac1Sguenther * appropriate bus cycle accesses to notify other
51*7e321ac1Sguenther * processors.
52*7e321ac1Sguenther */
53*7e321ac1Sguenther }
54