xref: /openbsd-src/lib/libarch/alpha/io.c (revision e90fdd0255bca8f5494a90ff601cac5a81202694)
1*e90fdd02Sderaadt /* $OpenBSD: io.c,v 1.6 2021/09/17 15:18:04 deraadt Exp $ */
22c644009Smatthieu /*-
32c644009Smatthieu  * Copyright (c) 1998 Doug Rabson
42c644009Smatthieu  * All rights reserved.
52c644009Smatthieu  *
62c644009Smatthieu  * Redistribution and use in source and binary forms, with or without
72c644009Smatthieu  * modification, are permitted provided that the following conditions
82c644009Smatthieu  * are met:
92c644009Smatthieu  * 1. Redistributions of source code must retain the above copyright
102c644009Smatthieu  *    notice, this list of conditions and the following disclaimer.
112c644009Smatthieu  * 2. Redistributions in binary form must reproduce the above copyright
122c644009Smatthieu  *    notice, this list of conditions and the following disclaimer in the
132c644009Smatthieu  *    documentation and/or other materials provided with the distribution.
142c644009Smatthieu  *
152c644009Smatthieu  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
162c644009Smatthieu  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
172c644009Smatthieu  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
182c644009Smatthieu  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
192c644009Smatthieu  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
202c644009Smatthieu  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
212c644009Smatthieu  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
222c644009Smatthieu  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
232c644009Smatthieu  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
242c644009Smatthieu  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
252c644009Smatthieu  * SUCH DAMAGE.
262c644009Smatthieu  */
272c644009Smatthieu 
282c644009Smatthieu #include <sys/types.h>
292c644009Smatthieu #include <sys/sysctl.h>
3005ddefaaSnaddy #include <machine/cpu.h>
31*e90fdd02Sderaadt #include <stdlib.h>
322c644009Smatthieu #include <err.h>
332c644009Smatthieu 
342c644009Smatthieu #include "io.h"
352c644009Smatthieu 
362c644009Smatthieu static struct io_ops *ops;
372c644009Smatthieu 
382c644009Smatthieu int
ioperm(unsigned long from,unsigned long num,int on)392c644009Smatthieu ioperm(unsigned long from, unsigned long num, int on)
402c644009Smatthieu {
412c644009Smatthieu 	int error;
422c644009Smatthieu 	int bwx;
432c644009Smatthieu 	size_t len = sizeof(bwx);
442c644009Smatthieu 	int mib[3];
452c644009Smatthieu 
462c644009Smatthieu 	mib[0] = CTL_MACHDEP;
472c644009Smatthieu 	mib[1] = CPU_CHIPSET;
482c644009Smatthieu 	mib[2] = CPU_CHIPSET_BWX;
492c644009Smatthieu 	if ((error = sysctl(mib, 3, &bwx, &len, NULL, 0)) < 0)
502c644009Smatthieu 		return error;
512c644009Smatthieu 	if (bwx)
522c644009Smatthieu 		ops = &bwx_io_ops;
532c644009Smatthieu 	else
542c644009Smatthieu #ifdef notyet
552c644009Smatthieu 		ops = &swiz_io_ops;
562c644009Smatthieu #else
572c644009Smatthieu 	errx(1, "libio is only available on bwx capable machines");
582c644009Smatthieu #endif
592c644009Smatthieu 
602c644009Smatthieu 	return ops->ioperm(from, num, on);
612c644009Smatthieu }
622c644009Smatthieu 
632c644009Smatthieu u_int8_t
inb(u_int32_t port)642c644009Smatthieu inb(u_int32_t port)
652c644009Smatthieu {
662c644009Smatthieu 	return ops->inb(port);
672c644009Smatthieu }
682c644009Smatthieu 
692c644009Smatthieu u_int16_t
inw(u_int32_t port)702c644009Smatthieu inw(u_int32_t port)
712c644009Smatthieu {
722c644009Smatthieu 	return ops->inw(port);
732c644009Smatthieu }
742c644009Smatthieu 
752c644009Smatthieu u_int32_t
inl(u_int32_t port)762c644009Smatthieu inl(u_int32_t port)
772c644009Smatthieu {
782c644009Smatthieu 	return ops->inl(port);
792c644009Smatthieu }
802c644009Smatthieu 
812c644009Smatthieu void
outb(u_int32_t port,u_int8_t val)822c644009Smatthieu outb(u_int32_t port, u_int8_t val)
832c644009Smatthieu {
842c644009Smatthieu 	ops->outb(port, val);
852c644009Smatthieu }
862c644009Smatthieu 
872c644009Smatthieu void
outw(u_int32_t port,u_int16_t val)882c644009Smatthieu outw(u_int32_t port, u_int16_t val)
892c644009Smatthieu {
902c644009Smatthieu 	ops->outw(port, val);
912c644009Smatthieu }
922c644009Smatthieu 
932c644009Smatthieu void
outl(u_int32_t port,u_int32_t val)942c644009Smatthieu outl(u_int32_t port, u_int32_t val)
952c644009Smatthieu {
962c644009Smatthieu 	ops->outl(port, val);
972c644009Smatthieu }
982c644009Smatthieu 
992c644009Smatthieu void *
map_memory(u_int32_t address,u_int32_t size)1002c644009Smatthieu map_memory(u_int32_t address, u_int32_t size)
1012c644009Smatthieu {
1022c644009Smatthieu 	return ops->map_memory(address, size);
1032c644009Smatthieu }
1042c644009Smatthieu 
1052c644009Smatthieu void
unmap_memory(void * handle,u_int32_t size)1062c644009Smatthieu unmap_memory(void *handle, u_int32_t size)
1072c644009Smatthieu {
1082c644009Smatthieu 	ops->unmap_memory(handle, size);
1092c644009Smatthieu }
1102c644009Smatthieu 
1112c644009Smatthieu u_int8_t
readb(void * handle,u_int32_t offset)1122c644009Smatthieu readb(void *handle, u_int32_t offset)
1132c644009Smatthieu {
1142c644009Smatthieu 	return ops->readb(handle, offset);
1152c644009Smatthieu }
1162c644009Smatthieu 
1172c644009Smatthieu u_int16_t
readw(void * handle,u_int32_t offset)1182c644009Smatthieu readw(void *handle, u_int32_t offset)
1192c644009Smatthieu {
1202c644009Smatthieu 	return ops->readw(handle, offset);
1212c644009Smatthieu }
1222c644009Smatthieu 
1232c644009Smatthieu u_int32_t
readl(void * handle,u_int32_t offset)1242c644009Smatthieu readl(void *handle, u_int32_t offset)
1252c644009Smatthieu {
1262c644009Smatthieu 	return ops->readl(handle, offset);
1272c644009Smatthieu }
1282c644009Smatthieu 
1292c644009Smatthieu void
writeb(void * handle,u_int32_t offset,u_int8_t val)1302c644009Smatthieu writeb(void *handle, u_int32_t offset, u_int8_t val)
1312c644009Smatthieu {
1322c644009Smatthieu 	ops->writeb(handle, offset, val);
133b5aa3b33Sguenther 	__asm__ volatile ("mb");
1342c644009Smatthieu }
1352c644009Smatthieu 
1362c644009Smatthieu void
writew(void * handle,u_int32_t offset,u_int16_t val)1372c644009Smatthieu writew(void *handle, u_int32_t offset, u_int16_t val)
1382c644009Smatthieu {
1392c644009Smatthieu 	ops->writew(handle, offset, val);
140b5aa3b33Sguenther 	__asm__ volatile ("mb");
1412c644009Smatthieu }
1422c644009Smatthieu 
1432c644009Smatthieu void
writel(void * handle,u_int32_t offset,u_int32_t val)1442c644009Smatthieu writel(void *handle, u_int32_t offset, u_int32_t val)
1452c644009Smatthieu {
1462c644009Smatthieu 	ops->writel(handle, offset, val);
147b5aa3b33Sguenther 	__asm__ volatile ("mb");
1482c644009Smatthieu }
1492c644009Smatthieu 
1502c644009Smatthieu void
writeb_nb(void * handle,u_int32_t offset,u_int8_t val)1512c644009Smatthieu writeb_nb(void *handle, u_int32_t offset, u_int8_t val)
1522c644009Smatthieu {
153a81a0dacSmiod 	ops->writeb(handle, offset, val);
1542c644009Smatthieu }
1552c644009Smatthieu 
1562c644009Smatthieu void
writew_nb(void * handle,u_int32_t offset,u_int16_t val)1572c644009Smatthieu writew_nb(void *handle, u_int32_t offset, u_int16_t val)
1582c644009Smatthieu {
159a81a0dacSmiod 	ops->writew(handle, offset, val);
1602c644009Smatthieu }
1612c644009Smatthieu 
1622c644009Smatthieu void
writel_nb(void * handle,u_int32_t offset,u_int32_t val)1632c644009Smatthieu writel_nb(void *handle, u_int32_t offset, u_int32_t val)
1642c644009Smatthieu {
165a81a0dacSmiod 	ops->writel(handle, offset, val);
1662c644009Smatthieu }
1672c644009Smatthieu 
1682c644009Smatthieu u_int64_t
dense_base(void)1692c644009Smatthieu dense_base(void)
1702c644009Smatthieu {
1712c644009Smatthieu 	static u_int64_t base = 0;
1722c644009Smatthieu 
1732c644009Smatthieu 	if (base == 0) {
1742c644009Smatthieu 		size_t len = sizeof(base);
1752c644009Smatthieu 		int error;
1762c644009Smatthieu 		int mib[3];
1772c644009Smatthieu 
1782c644009Smatthieu 		mib[0] = CTL_MACHDEP;
1792c644009Smatthieu 		mib[1] = CPU_CHIPSET;
1802c644009Smatthieu 		mib[2] = CPU_CHIPSET_DENSE;
1812c644009Smatthieu 
1822c644009Smatthieu 		if ((error = sysctl(mib, 3, &base, &len, NULL, 0)) < 0)
1832c644009Smatthieu 			err(1, "machdep.chipset.dense_base");
1842c644009Smatthieu 	}
1852c644009Smatthieu 
1862c644009Smatthieu 	return base;
1872c644009Smatthieu }
188