1*3d8817e4Smiod /* CPU data header for openrisc. 2*3d8817e4Smiod 3*3d8817e4Smiod THIS FILE IS MACHINE GENERATED WITH CGEN. 4*3d8817e4Smiod 5*3d8817e4Smiod Copyright 1996-2005 Free Software Foundation, Inc. 6*3d8817e4Smiod 7*3d8817e4Smiod This file is part of the GNU Binutils and/or GDB, the GNU debugger. 8*3d8817e4Smiod 9*3d8817e4Smiod This program is free software; you can redistribute it and/or modify 10*3d8817e4Smiod it under the terms of the GNU General Public License as published by 11*3d8817e4Smiod the Free Software Foundation; either version 2, or (at your option) 12*3d8817e4Smiod any later version. 13*3d8817e4Smiod 14*3d8817e4Smiod This program is distributed in the hope that it will be useful, 15*3d8817e4Smiod but WITHOUT ANY WARRANTY; without even the implied warranty of 16*3d8817e4Smiod MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*3d8817e4Smiod GNU General Public License for more details. 18*3d8817e4Smiod 19*3d8817e4Smiod You should have received a copy of the GNU General Public License along 20*3d8817e4Smiod with this program; if not, write to the Free Software Foundation, Inc., 21*3d8817e4Smiod 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 22*3d8817e4Smiod 23*3d8817e4Smiod */ 24*3d8817e4Smiod 25*3d8817e4Smiod #ifndef OPENRISC_CPU_H 26*3d8817e4Smiod #define OPENRISC_CPU_H 27*3d8817e4Smiod 28*3d8817e4Smiod #include "opcode/cgen-bitset.h" 29*3d8817e4Smiod 30*3d8817e4Smiod #define CGEN_ARCH openrisc 31*3d8817e4Smiod 32*3d8817e4Smiod /* Given symbol S, return openrisc_cgen_<S>. */ 33*3d8817e4Smiod #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 34*3d8817e4Smiod #define CGEN_SYM(s) openrisc##_cgen_##s 35*3d8817e4Smiod #else 36*3d8817e4Smiod #define CGEN_SYM(s) openrisc/**/_cgen_/**/s 37*3d8817e4Smiod #endif 38*3d8817e4Smiod 39*3d8817e4Smiod 40*3d8817e4Smiod /* Selected cpu families. */ 41*3d8817e4Smiod #define HAVE_CPU_OPENRISCBF 42*3d8817e4Smiod 43*3d8817e4Smiod #define CGEN_INSN_LSB0_P 1 44*3d8817e4Smiod 45*3d8817e4Smiod /* Minimum size of any insn (in bytes). */ 46*3d8817e4Smiod #define CGEN_MIN_INSN_SIZE 4 47*3d8817e4Smiod 48*3d8817e4Smiod /* Maximum size of any insn (in bytes). */ 49*3d8817e4Smiod #define CGEN_MAX_INSN_SIZE 4 50*3d8817e4Smiod 51*3d8817e4Smiod #define CGEN_INT_INSN_P 1 52*3d8817e4Smiod 53*3d8817e4Smiod /* Maximum number of syntax elements in an instruction. */ 54*3d8817e4Smiod #define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 14 55*3d8817e4Smiod 56*3d8817e4Smiod /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands. 57*3d8817e4Smiod e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands 58*3d8817e4Smiod we can't hash on everything up to the space. */ 59*3d8817e4Smiod #define CGEN_MNEMONIC_OPERANDS 60*3d8817e4Smiod 61*3d8817e4Smiod /* Maximum number of fields in an instruction. */ 62*3d8817e4Smiod #define CGEN_ACTUAL_MAX_IFMT_OPERANDS 9 63*3d8817e4Smiod 64*3d8817e4Smiod /* Enums. */ 65*3d8817e4Smiod 66*3d8817e4Smiod /* Enum declaration for exception vectors. */ 67*3d8817e4Smiod typedef enum e_exception { 68*3d8817e4Smiod E_RESET, E_BUSERR, E_DPF, E_IPF 69*3d8817e4Smiod , E_EXTINT, E_ALIGN, E_ILLEGAL, E_PEINT 70*3d8817e4Smiod , E_DTLBMISS, E_ITLBMISS, E_RRANGE, E_SYSCALL 71*3d8817e4Smiod , E_BREAK, E_RESERVED 72*3d8817e4Smiod } E_EXCEPTION; 73*3d8817e4Smiod 74*3d8817e4Smiod /* Enum declaration for FIXME. */ 75*3d8817e4Smiod typedef enum insn_class { 76*3d8817e4Smiod OP1_0, OP1_1, OP1_2, OP1_3 77*3d8817e4Smiod } INSN_CLASS; 78*3d8817e4Smiod 79*3d8817e4Smiod /* Enum declaration for FIXME. */ 80*3d8817e4Smiod typedef enum insn_sub { 81*3d8817e4Smiod OP2_0, OP2_1, OP2_2, OP2_3 82*3d8817e4Smiod , OP2_4, OP2_5, OP2_6, OP2_7 83*3d8817e4Smiod , OP2_8, OP2_9, OP2_10, OP2_11 84*3d8817e4Smiod , OP2_12, OP2_13, OP2_14, OP2_15 85*3d8817e4Smiod } INSN_SUB; 86*3d8817e4Smiod 87*3d8817e4Smiod /* Enum declaration for FIXME. */ 88*3d8817e4Smiod typedef enum insn_op3 { 89*3d8817e4Smiod OP3_0, OP3_1, OP3_2, OP3_3 90*3d8817e4Smiod } INSN_OP3; 91*3d8817e4Smiod 92*3d8817e4Smiod /* Enum declaration for FIXME. */ 93*3d8817e4Smiod typedef enum insn_op4 { 94*3d8817e4Smiod OP4_0, OP4_1, OP4_2, OP4_3 95*3d8817e4Smiod , OP4_4, OP4_5, OP4_6, OP4_7 96*3d8817e4Smiod } INSN_OP4; 97*3d8817e4Smiod 98*3d8817e4Smiod /* Enum declaration for FIXME. */ 99*3d8817e4Smiod typedef enum insn_op5 { 100*3d8817e4Smiod OP5_0, OP5_1, OP5_2, OP5_3 101*3d8817e4Smiod , OP5_4, OP5_5, OP5_6, OP5_7 102*3d8817e4Smiod , OP5_8, OP5_9, OP5_10, OP5_11 103*3d8817e4Smiod , OP5_12, OP5_13, OP5_14, OP5_15 104*3d8817e4Smiod , OP5_16, OP5_17, OP5_18, OP5_19 105*3d8817e4Smiod , OP5_20, OP5_21, OP5_22, OP5_23 106*3d8817e4Smiod , OP5_24, OP5_25, OP5_26, OP5_27 107*3d8817e4Smiod , OP5_28, OP5_29, OP5_30, OP5_31 108*3d8817e4Smiod } INSN_OP5; 109*3d8817e4Smiod 110*3d8817e4Smiod /* Enum declaration for FIXME. */ 111*3d8817e4Smiod typedef enum insn_op6 { 112*3d8817e4Smiod OP6_0, OP6_1, OP6_2, OP6_3 113*3d8817e4Smiod , OP6_4, OP6_5, OP6_6, OP6_7 114*3d8817e4Smiod } INSN_OP6; 115*3d8817e4Smiod 116*3d8817e4Smiod /* Enum declaration for FIXME. */ 117*3d8817e4Smiod typedef enum insn_op7 { 118*3d8817e4Smiod OP7_0, OP7_1, OP7_2, OP7_3 119*3d8817e4Smiod , OP7_4, OP7_5, OP7_6, OP7_7 120*3d8817e4Smiod , OP7_8, OP7_9, OP7_10, OP7_11 121*3d8817e4Smiod , OP7_12, OP7_13, OP7_14, OP7_15 122*3d8817e4Smiod } INSN_OP7; 123*3d8817e4Smiod 124*3d8817e4Smiod /* Attributes. */ 125*3d8817e4Smiod 126*3d8817e4Smiod /* Enum declaration for machine type selection. */ 127*3d8817e4Smiod typedef enum mach_attr { 128*3d8817e4Smiod MACH_BASE, MACH_OPENRISC, MACH_OR1300, MACH_MAX 129*3d8817e4Smiod } MACH_ATTR; 130*3d8817e4Smiod 131*3d8817e4Smiod /* Enum declaration for instruction set selection. */ 132*3d8817e4Smiod typedef enum isa_attr { 133*3d8817e4Smiod ISA_OR32, ISA_MAX 134*3d8817e4Smiod } ISA_ATTR; 135*3d8817e4Smiod 136*3d8817e4Smiod /* Enum declaration for if this model has caches. */ 137*3d8817e4Smiod typedef enum has_cache_attr { 138*3d8817e4Smiod HAS_CACHE_DATA_CACHE, HAS_CACHE_INSN_CACHE 139*3d8817e4Smiod } HAS_CACHE_ATTR; 140*3d8817e4Smiod 141*3d8817e4Smiod /* Number of architecture variants. */ 142*3d8817e4Smiod #define MAX_ISAS 1 143*3d8817e4Smiod #define MAX_MACHS ((int) MACH_MAX) 144*3d8817e4Smiod 145*3d8817e4Smiod /* Ifield support. */ 146*3d8817e4Smiod 147*3d8817e4Smiod /* Ifield attribute indices. */ 148*3d8817e4Smiod 149*3d8817e4Smiod /* Enum declaration for cgen_ifld attrs. */ 150*3d8817e4Smiod typedef enum cgen_ifld_attr { 151*3d8817e4Smiod CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED 152*3d8817e4Smiod , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31 153*3d8817e4Smiod , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS 154*3d8817e4Smiod } CGEN_IFLD_ATTR; 155*3d8817e4Smiod 156*3d8817e4Smiod /* Number of non-boolean elements in cgen_ifld_attr. */ 157*3d8817e4Smiod #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) 158*3d8817e4Smiod 159*3d8817e4Smiod /* cgen_ifld attribute accessor macros. */ 160*3d8817e4Smiod #define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) 161*3d8817e4Smiod #define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) 162*3d8817e4Smiod #define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) 163*3d8817e4Smiod #define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) 164*3d8817e4Smiod #define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) 165*3d8817e4Smiod #define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) 166*3d8817e4Smiod #define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) 167*3d8817e4Smiod 168*3d8817e4Smiod /* Enum declaration for openrisc ifield types. */ 169*3d8817e4Smiod typedef enum ifield_type { 170*3d8817e4Smiod OPENRISC_F_NIL, OPENRISC_F_ANYOF, OPENRISC_F_CLASS, OPENRISC_F_SUB 171*3d8817e4Smiod , OPENRISC_F_R1, OPENRISC_F_R2, OPENRISC_F_R3, OPENRISC_F_SIMM16 172*3d8817e4Smiod , OPENRISC_F_UIMM16, OPENRISC_F_UIMM5, OPENRISC_F_HI16, OPENRISC_F_LO16 173*3d8817e4Smiod , OPENRISC_F_OP1, OPENRISC_F_OP2, OPENRISC_F_OP3, OPENRISC_F_OP4 174*3d8817e4Smiod , OPENRISC_F_OP5, OPENRISC_F_OP6, OPENRISC_F_OP7, OPENRISC_F_I16_1 175*3d8817e4Smiod , OPENRISC_F_I16_2, OPENRISC_F_DISP26, OPENRISC_F_ABS26, OPENRISC_F_I16NC 176*3d8817e4Smiod , OPENRISC_F_F_15_8, OPENRISC_F_F_10_3, OPENRISC_F_F_4_1, OPENRISC_F_F_7_3 177*3d8817e4Smiod , OPENRISC_F_F_10_7, OPENRISC_F_F_10_11, OPENRISC_F_MAX 178*3d8817e4Smiod } IFIELD_TYPE; 179*3d8817e4Smiod 180*3d8817e4Smiod #define MAX_IFLD ((int) OPENRISC_F_MAX) 181*3d8817e4Smiod 182*3d8817e4Smiod /* Hardware attribute indices. */ 183*3d8817e4Smiod 184*3d8817e4Smiod /* Enum declaration for cgen_hw attrs. */ 185*3d8817e4Smiod typedef enum cgen_hw_attr { 186*3d8817e4Smiod CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE 187*3d8817e4Smiod , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS 188*3d8817e4Smiod } CGEN_HW_ATTR; 189*3d8817e4Smiod 190*3d8817e4Smiod /* Number of non-boolean elements in cgen_hw_attr. */ 191*3d8817e4Smiod #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) 192*3d8817e4Smiod 193*3d8817e4Smiod /* cgen_hw attribute accessor macros. */ 194*3d8817e4Smiod #define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) 195*3d8817e4Smiod #define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) 196*3d8817e4Smiod #define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) 197*3d8817e4Smiod #define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) 198*3d8817e4Smiod #define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) 199*3d8817e4Smiod 200*3d8817e4Smiod /* Enum declaration for openrisc hardware types. */ 201*3d8817e4Smiod typedef enum cgen_hw_type { 202*3d8817e4Smiod HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR 203*3d8817e4Smiod , HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_SR 204*3d8817e4Smiod , HW_H_HI16, HW_H_LO16, HW_H_CBIT, HW_H_DELAY_INSN 205*3d8817e4Smiod , HW_MAX 206*3d8817e4Smiod } CGEN_HW_TYPE; 207*3d8817e4Smiod 208*3d8817e4Smiod #define MAX_HW ((int) HW_MAX) 209*3d8817e4Smiod 210*3d8817e4Smiod /* Operand attribute indices. */ 211*3d8817e4Smiod 212*3d8817e4Smiod /* Enum declaration for cgen_operand attrs. */ 213*3d8817e4Smiod typedef enum cgen_operand_attr { 214*3d8817e4Smiod CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT 215*3d8817e4Smiod , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY 216*3d8817e4Smiod , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS 217*3d8817e4Smiod } CGEN_OPERAND_ATTR; 218*3d8817e4Smiod 219*3d8817e4Smiod /* Number of non-boolean elements in cgen_operand_attr. */ 220*3d8817e4Smiod #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) 221*3d8817e4Smiod 222*3d8817e4Smiod /* cgen_operand attribute accessor macros. */ 223*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) 224*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) 225*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) 226*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) 227*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) 228*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) 229*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) 230*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) 231*3d8817e4Smiod #define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) 232*3d8817e4Smiod 233*3d8817e4Smiod /* Enum declaration for openrisc operand types. */ 234*3d8817e4Smiod typedef enum cgen_operand_type { 235*3d8817e4Smiod OPENRISC_OPERAND_PC, OPENRISC_OPERAND_SR, OPENRISC_OPERAND_CBIT, OPENRISC_OPERAND_SIMM_16 236*3d8817e4Smiod , OPENRISC_OPERAND_UIMM_16, OPENRISC_OPERAND_DISP_26, OPENRISC_OPERAND_ABS_26, OPENRISC_OPERAND_UIMM_5 237*3d8817e4Smiod , OPENRISC_OPERAND_RD, OPENRISC_OPERAND_RA, OPENRISC_OPERAND_RB, OPENRISC_OPERAND_OP_F_23 238*3d8817e4Smiod , OPENRISC_OPERAND_OP_F_3, OPENRISC_OPERAND_HI16, OPENRISC_OPERAND_LO16, OPENRISC_OPERAND_UI16NC 239*3d8817e4Smiod , OPENRISC_OPERAND_MAX 240*3d8817e4Smiod } CGEN_OPERAND_TYPE; 241*3d8817e4Smiod 242*3d8817e4Smiod /* Number of operands types. */ 243*3d8817e4Smiod #define MAX_OPERANDS 16 244*3d8817e4Smiod 245*3d8817e4Smiod /* Maximum number of operands referenced by any insn. */ 246*3d8817e4Smiod #define MAX_OPERAND_INSTANCES 8 247*3d8817e4Smiod 248*3d8817e4Smiod /* Insn attribute indices. */ 249*3d8817e4Smiod 250*3d8817e4Smiod /* Enum declaration for cgen_insn attrs. */ 251*3d8817e4Smiod typedef enum cgen_insn_attr { 252*3d8817e4Smiod CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI 253*3d8817e4Smiod , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED 254*3d8817e4Smiod , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_NOT_IN_DELAY_SLOT, CGEN_INSN_END_BOOLS 255*3d8817e4Smiod , CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS 256*3d8817e4Smiod } CGEN_INSN_ATTR; 257*3d8817e4Smiod 258*3d8817e4Smiod /* Number of non-boolean elements in cgen_insn_attr. */ 259*3d8817e4Smiod #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) 260*3d8817e4Smiod 261*3d8817e4Smiod /* cgen_insn attribute accessor macros. */ 262*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) 263*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) 264*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) 265*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) 266*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) 267*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) 268*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) 269*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) 270*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) 271*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) 272*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) 273*3d8817e4Smiod #define CGEN_ATTR_CGEN_INSN_NOT_IN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NOT_IN_DELAY_SLOT)) != 0) 274*3d8817e4Smiod 275*3d8817e4Smiod /* cgen.h uses things we just defined. */ 276*3d8817e4Smiod #include "opcode/cgen.h" 277*3d8817e4Smiod 278*3d8817e4Smiod extern const struct cgen_ifld openrisc_cgen_ifld_table[]; 279*3d8817e4Smiod 280*3d8817e4Smiod /* Attributes. */ 281*3d8817e4Smiod extern const CGEN_ATTR_TABLE openrisc_cgen_hardware_attr_table[]; 282*3d8817e4Smiod extern const CGEN_ATTR_TABLE openrisc_cgen_ifield_attr_table[]; 283*3d8817e4Smiod extern const CGEN_ATTR_TABLE openrisc_cgen_operand_attr_table[]; 284*3d8817e4Smiod extern const CGEN_ATTR_TABLE openrisc_cgen_insn_attr_table[]; 285*3d8817e4Smiod 286*3d8817e4Smiod /* Hardware decls. */ 287*3d8817e4Smiod 288*3d8817e4Smiod extern CGEN_KEYWORD openrisc_cgen_opval_h_gr; 289*3d8817e4Smiod 290*3d8817e4Smiod extern const CGEN_HW_ENTRY openrisc_cgen_hw_table[]; 291*3d8817e4Smiod 292*3d8817e4Smiod 293*3d8817e4Smiod 294*3d8817e4Smiod #endif /* OPENRISC_CPU_H */ 295