1*f6aab3d8Srobert //===-- lldb-riscv-register-enums.h -----------------------------*- C++ -*-===// 2*f6aab3d8Srobert // 3*f6aab3d8Srobert // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*f6aab3d8Srobert // See https://llvm.org/LICENSE.txt for license information. 5*f6aab3d8Srobert // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*f6aab3d8Srobert // 7*f6aab3d8Srobert //===----------------------------------------------------------------------===// 8*f6aab3d8Srobert 9*f6aab3d8Srobert #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H 10*f6aab3d8Srobert #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H 11*f6aab3d8Srobert 12*f6aab3d8Srobert // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB) 13*f6aab3d8Srobert 14*f6aab3d8Srobert // Internal codes for all riscv registers. 15*f6aab3d8Srobert enum { 16*f6aab3d8Srobert // The same order as user_regs_struct in <asm/ptrace.h> 17*f6aab3d8Srobert // note: these enum values are used as byte_offset 18*f6aab3d8Srobert gpr_first_riscv = 0, 19*f6aab3d8Srobert gpr_pc_riscv = gpr_first_riscv, 20*f6aab3d8Srobert gpr_x1_riscv, 21*f6aab3d8Srobert gpr_x2_riscv, 22*f6aab3d8Srobert gpr_x3_riscv, 23*f6aab3d8Srobert gpr_x4_riscv, 24*f6aab3d8Srobert gpr_x5_riscv, 25*f6aab3d8Srobert gpr_x6_riscv, 26*f6aab3d8Srobert gpr_x7_riscv, 27*f6aab3d8Srobert gpr_x8_riscv, 28*f6aab3d8Srobert gpr_x9_riscv, 29*f6aab3d8Srobert gpr_x10_riscv, 30*f6aab3d8Srobert gpr_x11_riscv, 31*f6aab3d8Srobert gpr_x12_riscv, 32*f6aab3d8Srobert gpr_x13_riscv, 33*f6aab3d8Srobert gpr_x14_riscv, 34*f6aab3d8Srobert gpr_x15_riscv, 35*f6aab3d8Srobert gpr_x16_riscv, 36*f6aab3d8Srobert gpr_x17_riscv, 37*f6aab3d8Srobert gpr_x18_riscv, 38*f6aab3d8Srobert gpr_x19_riscv, 39*f6aab3d8Srobert gpr_x20_riscv, 40*f6aab3d8Srobert gpr_x21_riscv, 41*f6aab3d8Srobert gpr_x22_riscv, 42*f6aab3d8Srobert gpr_x23_riscv, 43*f6aab3d8Srobert gpr_x24_riscv, 44*f6aab3d8Srobert gpr_x25_riscv, 45*f6aab3d8Srobert gpr_x26_riscv, 46*f6aab3d8Srobert gpr_x27_riscv, 47*f6aab3d8Srobert gpr_x28_riscv, 48*f6aab3d8Srobert gpr_x29_riscv, 49*f6aab3d8Srobert gpr_x30_riscv, 50*f6aab3d8Srobert gpr_x31_riscv, 51*f6aab3d8Srobert gpr_x0_riscv, 52*f6aab3d8Srobert gpr_zero_riscv = gpr_x0_riscv, 53*f6aab3d8Srobert gpr_ra_riscv = gpr_x1_riscv, 54*f6aab3d8Srobert gpr_sp_riscv = gpr_x2_riscv, 55*f6aab3d8Srobert gpr_gp_riscv = gpr_x3_riscv, 56*f6aab3d8Srobert gpr_tp_riscv = gpr_x4_riscv, 57*f6aab3d8Srobert gpr_t0_riscv = gpr_x5_riscv, 58*f6aab3d8Srobert gpr_t1_riscv = gpr_x6_riscv, 59*f6aab3d8Srobert gpr_t2_riscv = gpr_x7_riscv, 60*f6aab3d8Srobert gpr_fp_riscv = gpr_x8_riscv, 61*f6aab3d8Srobert gpr_s1_riscv = gpr_x9_riscv, 62*f6aab3d8Srobert gpr_a0_riscv = gpr_x10_riscv, 63*f6aab3d8Srobert gpr_a1_riscv = gpr_x11_riscv, 64*f6aab3d8Srobert gpr_a2_riscv = gpr_x12_riscv, 65*f6aab3d8Srobert gpr_a3_riscv = gpr_x13_riscv, 66*f6aab3d8Srobert gpr_a4_riscv = gpr_x14_riscv, 67*f6aab3d8Srobert gpr_a5_riscv = gpr_x15_riscv, 68*f6aab3d8Srobert gpr_a6_riscv = gpr_x16_riscv, 69*f6aab3d8Srobert gpr_a7_riscv = gpr_x17_riscv, 70*f6aab3d8Srobert gpr_s2_riscv = gpr_x18_riscv, 71*f6aab3d8Srobert gpr_s3_riscv = gpr_x19_riscv, 72*f6aab3d8Srobert gpr_s4_riscv = gpr_x20_riscv, 73*f6aab3d8Srobert gpr_s5_riscv = gpr_x21_riscv, 74*f6aab3d8Srobert gpr_s6_riscv = gpr_x22_riscv, 75*f6aab3d8Srobert gpr_s7_riscv = gpr_x23_riscv, 76*f6aab3d8Srobert gpr_s8_riscv = gpr_x24_riscv, 77*f6aab3d8Srobert gpr_s9_riscv = gpr_x25_riscv, 78*f6aab3d8Srobert gpr_s10_riscv = gpr_x26_riscv, 79*f6aab3d8Srobert gpr_s11_riscv = gpr_x27_riscv, 80*f6aab3d8Srobert gpr_t3_riscv = gpr_x28_riscv, 81*f6aab3d8Srobert gpr_t4_riscv = gpr_x29_riscv, 82*f6aab3d8Srobert gpr_t5_riscv = gpr_x30_riscv, 83*f6aab3d8Srobert gpr_t6_riscv = gpr_x31_riscv, 84*f6aab3d8Srobert gpr_last_riscv = gpr_x0_riscv, 85*f6aab3d8Srobert 86*f6aab3d8Srobert fpr_first_riscv = 33, 87*f6aab3d8Srobert fpr_f0_riscv = fpr_first_riscv, 88*f6aab3d8Srobert fpr_f1_riscv, 89*f6aab3d8Srobert fpr_f2_riscv, 90*f6aab3d8Srobert fpr_f3_riscv, 91*f6aab3d8Srobert fpr_f4_riscv, 92*f6aab3d8Srobert fpr_f5_riscv, 93*f6aab3d8Srobert fpr_f6_riscv, 94*f6aab3d8Srobert fpr_f7_riscv, 95*f6aab3d8Srobert fpr_f8_riscv, 96*f6aab3d8Srobert fpr_f9_riscv, 97*f6aab3d8Srobert fpr_f10_riscv, 98*f6aab3d8Srobert fpr_f11_riscv, 99*f6aab3d8Srobert fpr_f12_riscv, 100*f6aab3d8Srobert fpr_f13_riscv, 101*f6aab3d8Srobert fpr_f14_riscv, 102*f6aab3d8Srobert fpr_f15_riscv, 103*f6aab3d8Srobert fpr_f16_riscv, 104*f6aab3d8Srobert fpr_f17_riscv, 105*f6aab3d8Srobert fpr_f18_riscv, 106*f6aab3d8Srobert fpr_f19_riscv, 107*f6aab3d8Srobert fpr_f20_riscv, 108*f6aab3d8Srobert fpr_f21_riscv, 109*f6aab3d8Srobert fpr_f22_riscv, 110*f6aab3d8Srobert fpr_f23_riscv, 111*f6aab3d8Srobert fpr_f24_riscv, 112*f6aab3d8Srobert fpr_f25_riscv, 113*f6aab3d8Srobert fpr_f26_riscv, 114*f6aab3d8Srobert fpr_f27_riscv, 115*f6aab3d8Srobert fpr_f28_riscv, 116*f6aab3d8Srobert fpr_f29_riscv, 117*f6aab3d8Srobert fpr_f30_riscv, 118*f6aab3d8Srobert fpr_f31_riscv, 119*f6aab3d8Srobert 120*f6aab3d8Srobert fpr_fcsr_riscv, 121*f6aab3d8Srobert fpr_ft0_riscv = fpr_f0_riscv, 122*f6aab3d8Srobert fpr_ft1_riscv = fpr_f1_riscv, 123*f6aab3d8Srobert fpr_ft2_riscv = fpr_f2_riscv, 124*f6aab3d8Srobert fpr_ft3_riscv = fpr_f3_riscv, 125*f6aab3d8Srobert fpr_ft4_riscv = fpr_f4_riscv, 126*f6aab3d8Srobert fpr_ft5_riscv = fpr_f5_riscv, 127*f6aab3d8Srobert fpr_ft6_riscv = fpr_f6_riscv, 128*f6aab3d8Srobert fpr_ft7_riscv = fpr_f7_riscv, 129*f6aab3d8Srobert fpr_fs0_riscv = fpr_f8_riscv, 130*f6aab3d8Srobert fpr_fs1_riscv = fpr_f9_riscv, 131*f6aab3d8Srobert fpr_fa0_riscv = fpr_f10_riscv, 132*f6aab3d8Srobert fpr_fa1_riscv = fpr_f11_riscv, 133*f6aab3d8Srobert fpr_fa2_riscv = fpr_f12_riscv, 134*f6aab3d8Srobert fpr_fa3_riscv = fpr_f13_riscv, 135*f6aab3d8Srobert fpr_fa4_riscv = fpr_f14_riscv, 136*f6aab3d8Srobert fpr_fa5_riscv = fpr_f15_riscv, 137*f6aab3d8Srobert fpr_fa6_riscv = fpr_f16_riscv, 138*f6aab3d8Srobert fpr_fa7_riscv = fpr_f17_riscv, 139*f6aab3d8Srobert fpr_fs2_riscv = fpr_f18_riscv, 140*f6aab3d8Srobert fpr_fs3_riscv = fpr_f19_riscv, 141*f6aab3d8Srobert fpr_fs4_riscv = fpr_f20_riscv, 142*f6aab3d8Srobert fpr_fs5_riscv = fpr_f21_riscv, 143*f6aab3d8Srobert fpr_fs6_riscv = fpr_f22_riscv, 144*f6aab3d8Srobert fpr_fs7_riscv = fpr_f23_riscv, 145*f6aab3d8Srobert fpr_fs8_riscv = fpr_f24_riscv, 146*f6aab3d8Srobert fpr_fs9_riscv = fpr_f25_riscv, 147*f6aab3d8Srobert fpr_fs10_riscv = fpr_f26_riscv, 148*f6aab3d8Srobert fpr_fs11_riscv = fpr_f27_riscv, 149*f6aab3d8Srobert fpr_ft8_riscv = fpr_f28_riscv, 150*f6aab3d8Srobert fpr_ft9_riscv = fpr_f29_riscv, 151*f6aab3d8Srobert fpr_ft10_riscv = fpr_f30_riscv, 152*f6aab3d8Srobert fpr_ft11_riscv = fpr_f31_riscv, 153*f6aab3d8Srobert fpr_last_riscv = fpr_fcsr_riscv, 154*f6aab3d8Srobert 155*f6aab3d8Srobert k_num_registers_riscv 156*f6aab3d8Srobert }; 157*f6aab3d8Srobert 158*f6aab3d8Srobert #endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H 159