1061da546Spatrick //===-- RegisterInfos_mips64.h ----------------------------------*- C++ -*-===// 2061da546Spatrick // 3061da546Spatrick // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4061da546Spatrick // See https://llvm.org/LICENSE.txt for license information. 5061da546Spatrick // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6061da546Spatrick // 7061da546Spatrick //===----------------------------------------------------------------------===// 8061da546Spatrick 9be691f3bSpatrick #include <cstddef> 10061da546Spatrick 11061da546Spatrick #include "lldb/Core/dwarf.h" 12061da546Spatrick #include "llvm/Support/Compiler.h" 13061da546Spatrick 14061da546Spatrick #ifdef DECLARE_REGISTER_INFOS_MIPS64_STRUCT 15061da546Spatrick 16061da546Spatrick // Computes the offset of the given GPR in the user data area. 17061da546Spatrick #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR_freebsd_mips, regname)) 18061da546Spatrick 19*f6aab3d8Srobert // Computes the offset of the given FPR in the extended data area. 20*f6aab3d8Srobert #define FPR_OFFSET(regname) \ 21*f6aab3d8Srobert (sizeof(GPR_freebsd_mips) + \ 22*f6aab3d8Srobert LLVM_EXTENSION offsetof(FPR_freebsd_mips, regname)) 23*f6aab3d8Srobert 24061da546Spatrick // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB 25061da546Spatrick 26061da546Spatrick // Note that the size and offset will be updated by platform-specific classes. 27061da546Spatrick #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ 28061da546Spatrick { \ 29061da546Spatrick #reg, alt, sizeof(((GPR_freebsd_mips *) 0)->reg), \ 30061da546Spatrick GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 31061da546Spatrick {kind1, kind2, kind3, kind4, \ 32061da546Spatrick gpr_##reg##_mips64 }, \ 33*f6aab3d8Srobert NULL, NULL \ 34061da546Spatrick } 35061da546Spatrick 36*f6aab3d8Srobert #define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \ 37*f6aab3d8Srobert { \ 38*f6aab3d8Srobert #reg, alt, sizeof(((FPR_freebsd_mips *) 0)->reg), \ 39*f6aab3d8Srobert FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \ 40*f6aab3d8Srobert {kind1, kind2, kind3, LLDB_INVALID_REGNUM, \ 41*f6aab3d8Srobert fpr_##reg##_mips64 }, \ 42*f6aab3d8Srobert NULL, NULL, \ 43*f6aab3d8Srobert } 44*f6aab3d8Srobert 45*f6aab3d8Srobert #define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \ 46*f6aab3d8Srobert { \ 47*f6aab3d8Srobert #reg, alt, sizeof(((FPR_freebsd_mips *) 0)->reg), \ 48*f6aab3d8Srobert FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 49*f6aab3d8Srobert {kind1, kind2, kind3, LLDB_INVALID_REGNUM, \ 50*f6aab3d8Srobert fpr_##reg##_mips64 }, \ 51*f6aab3d8Srobert NULL, NULL, \ 52*f6aab3d8Srobert } 53*f6aab3d8Srobert 54*f6aab3d8Srobert 55061da546Spatrick static RegisterInfo g_register_infos_mips64[] = { 56061da546Spatrick // General purpose registers. EH_Frame, DWARF, 57061da546Spatrick // Generic, Process Plugin 58061da546Spatrick DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, 59061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 60061da546Spatrick DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, 61061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 62061da546Spatrick DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64, 63061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 64061da546Spatrick DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64, 65061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 66061da546Spatrick DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64, 67061da546Spatrick LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), 68061da546Spatrick DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64, 69061da546Spatrick LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), 70061da546Spatrick DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64, 71061da546Spatrick LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), 72061da546Spatrick DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64, 73061da546Spatrick LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), 74061da546Spatrick DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64, 75061da546Spatrick LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), 76061da546Spatrick DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64, 77061da546Spatrick LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), 78061da546Spatrick DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64, 79061da546Spatrick LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM), 80061da546Spatrick DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64, 81061da546Spatrick LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM), 82061da546Spatrick DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64, 83061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 84061da546Spatrick DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64, 85061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 86061da546Spatrick DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64, 87061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 88061da546Spatrick DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64, 89061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 90061da546Spatrick DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64, 91061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 92061da546Spatrick DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64, 93061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 94061da546Spatrick DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64, 95061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 96061da546Spatrick DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64, 97061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 98061da546Spatrick DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64, 99061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 100061da546Spatrick DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64, 101061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 102061da546Spatrick DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64, 103061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 104061da546Spatrick DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64, 105061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 106061da546Spatrick DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64, 107061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 108061da546Spatrick DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64, 109061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 110061da546Spatrick DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64, 111061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 112061da546Spatrick DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64, 113061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 114061da546Spatrick DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, LLDB_INVALID_REGNUM, 115061da546Spatrick LLDB_INVALID_REGNUM), 116061da546Spatrick DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64, 117061da546Spatrick LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), 118061da546Spatrick DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64, 119061da546Spatrick LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), 120061da546Spatrick DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64, 121061da546Spatrick LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM), 122061da546Spatrick DEFINE_GPR(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64, 123061da546Spatrick LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), 124061da546Spatrick DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64, 125061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 126061da546Spatrick DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64, 127061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 128061da546Spatrick DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64, 129061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 130061da546Spatrick DEFINE_GPR(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64, 131061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 132061da546Spatrick DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64, 133061da546Spatrick LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), 134061da546Spatrick DEFINE_GPR(ic, nullptr, dwarf_ic_mips64, dwarf_ic_mips64, 135061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 136061da546Spatrick DEFINE_GPR(dummy, nullptr, dwarf_dummy_mips64, dwarf_dummy_mips64, 137061da546Spatrick LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 138*f6aab3d8Srobert 139*f6aab3d8Srobert DEFINE_FPR(f0, nullptr, dwarf_f0_mips64, dwarf_f0_mips64, 140*f6aab3d8Srobert LLDB_INVALID_REGNUM), 141*f6aab3d8Srobert DEFINE_FPR(f1, nullptr, dwarf_f1_mips64, dwarf_f1_mips64, 142*f6aab3d8Srobert LLDB_INVALID_REGNUM), 143*f6aab3d8Srobert DEFINE_FPR(f2, nullptr, dwarf_f2_mips64, dwarf_f2_mips64, 144*f6aab3d8Srobert LLDB_INVALID_REGNUM), 145*f6aab3d8Srobert DEFINE_FPR(f3, nullptr, dwarf_f3_mips64, dwarf_f3_mips64, 146*f6aab3d8Srobert LLDB_INVALID_REGNUM), 147*f6aab3d8Srobert DEFINE_FPR(f4, nullptr, dwarf_f4_mips64, dwarf_f4_mips64, 148*f6aab3d8Srobert LLDB_INVALID_REGNUM), 149*f6aab3d8Srobert DEFINE_FPR(f5, nullptr, dwarf_f5_mips64, dwarf_f5_mips64, 150*f6aab3d8Srobert LLDB_INVALID_REGNUM), 151*f6aab3d8Srobert DEFINE_FPR(f6, nullptr, dwarf_f6_mips64, dwarf_f6_mips64, 152*f6aab3d8Srobert LLDB_INVALID_REGNUM), 153*f6aab3d8Srobert DEFINE_FPR(f7, nullptr, dwarf_f7_mips64, dwarf_f7_mips64, 154*f6aab3d8Srobert LLDB_INVALID_REGNUM), 155*f6aab3d8Srobert DEFINE_FPR(f8, nullptr, dwarf_f8_mips64, dwarf_f8_mips64, 156*f6aab3d8Srobert LLDB_INVALID_REGNUM), 157*f6aab3d8Srobert DEFINE_FPR(f9, nullptr, dwarf_f9_mips64, dwarf_f9_mips64, 158*f6aab3d8Srobert LLDB_INVALID_REGNUM), 159*f6aab3d8Srobert DEFINE_FPR(f10, nullptr, dwarf_f10_mips64, dwarf_f10_mips64, 160*f6aab3d8Srobert LLDB_INVALID_REGNUM), 161*f6aab3d8Srobert DEFINE_FPR(f11, nullptr, dwarf_f11_mips64, dwarf_f11_mips64, 162*f6aab3d8Srobert LLDB_INVALID_REGNUM), 163*f6aab3d8Srobert DEFINE_FPR(f12, nullptr, dwarf_f12_mips64, dwarf_f12_mips64, 164*f6aab3d8Srobert LLDB_INVALID_REGNUM), 165*f6aab3d8Srobert DEFINE_FPR(f13, nullptr, dwarf_f13_mips64, dwarf_f13_mips64, 166*f6aab3d8Srobert LLDB_INVALID_REGNUM), 167*f6aab3d8Srobert DEFINE_FPR(f14, nullptr, dwarf_f14_mips64, dwarf_f14_mips64, 168*f6aab3d8Srobert LLDB_INVALID_REGNUM), 169*f6aab3d8Srobert DEFINE_FPR(f15, nullptr, dwarf_f15_mips64, dwarf_f15_mips64, 170*f6aab3d8Srobert LLDB_INVALID_REGNUM), 171*f6aab3d8Srobert DEFINE_FPR(f16, nullptr, dwarf_f16_mips64, dwarf_f16_mips64, 172*f6aab3d8Srobert LLDB_INVALID_REGNUM), 173*f6aab3d8Srobert DEFINE_FPR(f17, nullptr, dwarf_f17_mips64, dwarf_f17_mips64, 174*f6aab3d8Srobert LLDB_INVALID_REGNUM), 175*f6aab3d8Srobert DEFINE_FPR(f18, nullptr, dwarf_f18_mips64, dwarf_f18_mips64, 176*f6aab3d8Srobert LLDB_INVALID_REGNUM), 177*f6aab3d8Srobert DEFINE_FPR(f19, nullptr, dwarf_f19_mips64, dwarf_f19_mips64, 178*f6aab3d8Srobert LLDB_INVALID_REGNUM), 179*f6aab3d8Srobert DEFINE_FPR(f20, nullptr, dwarf_f20_mips64, dwarf_f20_mips64, 180*f6aab3d8Srobert LLDB_INVALID_REGNUM), 181*f6aab3d8Srobert DEFINE_FPR(f21, nullptr, dwarf_f21_mips64, dwarf_f21_mips64, 182*f6aab3d8Srobert LLDB_INVALID_REGNUM), 183*f6aab3d8Srobert DEFINE_FPR(f22, nullptr, dwarf_f22_mips64, dwarf_f22_mips64, 184*f6aab3d8Srobert LLDB_INVALID_REGNUM), 185*f6aab3d8Srobert DEFINE_FPR(f23, nullptr, dwarf_f23_mips64, dwarf_f23_mips64, 186*f6aab3d8Srobert LLDB_INVALID_REGNUM), 187*f6aab3d8Srobert DEFINE_FPR(f24, nullptr, dwarf_f24_mips64, dwarf_f24_mips64, 188*f6aab3d8Srobert LLDB_INVALID_REGNUM), 189*f6aab3d8Srobert DEFINE_FPR(f25, nullptr, dwarf_f25_mips64, dwarf_f25_mips64, 190*f6aab3d8Srobert LLDB_INVALID_REGNUM), 191*f6aab3d8Srobert DEFINE_FPR(f26, nullptr, dwarf_f26_mips64, dwarf_f26_mips64, 192*f6aab3d8Srobert LLDB_INVALID_REGNUM), 193*f6aab3d8Srobert DEFINE_FPR(f27, nullptr, dwarf_f27_mips64, dwarf_f27_mips64, 194*f6aab3d8Srobert LLDB_INVALID_REGNUM), 195*f6aab3d8Srobert DEFINE_FPR(f28, nullptr, dwarf_f28_mips64, dwarf_f28_mips64, 196*f6aab3d8Srobert LLDB_INVALID_REGNUM), 197*f6aab3d8Srobert DEFINE_FPR(f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64, 198*f6aab3d8Srobert LLDB_INVALID_REGNUM), 199*f6aab3d8Srobert DEFINE_FPR(f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64, 200*f6aab3d8Srobert LLDB_INVALID_REGNUM), 201*f6aab3d8Srobert DEFINE_FPR(f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64, 202*f6aab3d8Srobert LLDB_INVALID_REGNUM), 203*f6aab3d8Srobert DEFINE_FPR_INFO(fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, 204*f6aab3d8Srobert LLDB_INVALID_REGNUM), 205*f6aab3d8Srobert DEFINE_FPR_INFO(fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, 206*f6aab3d8Srobert LLDB_INVALID_REGNUM), 207061da546Spatrick }; 208061da546Spatrick 209061da546Spatrick static_assert((sizeof(g_register_infos_mips64) / 210061da546Spatrick sizeof(g_register_infos_mips64[0])) == k_num_registers_mips64, 211061da546Spatrick "g_register_infos_mips64 has wrong number of register infos"); 212061da546Spatrick 213061da546Spatrick #undef DEFINE_GPR 214061da546Spatrick #undef DEFINE_GPR_INFO 215061da546Spatrick #undef DEFINE_FPR 216061da546Spatrick #undef DEFINE_FPR_INFO 217061da546Spatrick #undef DEFINE_MSA 218061da546Spatrick #undef DEFINE_MSA_INFO 219061da546Spatrick #undef GPR_OFFSET 220061da546Spatrick #undef FPR_OFFSET 221061da546Spatrick #undef MSA_OFFSET 222061da546Spatrick 223061da546Spatrick #endif // DECLARE_REGISTER_INFOS_MIPS64_STRUCT 224