10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51859Sha137994 * Common Development and Distribution License (the "License"). 61859Sha137994 * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 22*11172SHaik.Aftandilian@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate #ifndef _SYS_TRAPTRACE_H 270Sstevel@tonic-gate #define _SYS_TRAPTRACE_H 280Sstevel@tonic-gate 290Sstevel@tonic-gate #ifdef __cplusplus 300Sstevel@tonic-gate extern "C" { 310Sstevel@tonic-gate #endif 320Sstevel@tonic-gate 330Sstevel@tonic-gate /* 340Sstevel@tonic-gate * Trap tracing. If TRAPTRACE is defined, every trap records info 350Sstevel@tonic-gate * in a circular buffer. Define TRAPTRACE in Makefile.$ARCH. 360Sstevel@tonic-gate * 370Sstevel@tonic-gate * Trap trace records are TRAP_ENT_SIZE bytes, consisting of the 380Sstevel@tonic-gate * %tick, %tl, %tt, %tpc, %tstate, %sp, and a few other words: 390Sstevel@tonic-gate * 400Sstevel@tonic-gate * struct trap_trace_record { 410Sstevel@tonic-gate * ushort_t tl, tt; 420Sstevel@tonic-gate * long pc; 430Sstevel@tonic-gate * int64_t tstate, tick; 440Sstevel@tonic-gate * long sp, tr, f1, f2, f3, f4; 450Sstevel@tonic-gate * }; 460Sstevel@tonic-gate * 470Sstevel@tonic-gate * Note that for UltraSparc III and beyond %stick is used in place of %tick 480Sstevel@tonic-gate * unless compiled with TRAPTRACE_FORCE_TICK. 490Sstevel@tonic-gate * 500Sstevel@tonic-gate * Auxilliary entries (not of just a trap), have obvious non-%tt values in 510Sstevel@tonic-gate * the TRAP_ENT_TT field 520Sstevel@tonic-gate */ 530Sstevel@tonic-gate 545939Ssetje #define TRAP_TPGS (2 * PAGESIZE) /* default size is two pages */ 550Sstevel@tonic-gate 560Sstevel@tonic-gate #ifndef _ASM 570Sstevel@tonic-gate 580Sstevel@tonic-gate struct trap_trace_record { 590Sstevel@tonic-gate uint16_t tt_tl; 600Sstevel@tonic-gate uint16_t tt_tt; 610Sstevel@tonic-gate uintptr_t tt_tpc; 620Sstevel@tonic-gate uint64_t tt_tstate; 630Sstevel@tonic-gate uint64_t tt_tick; 640Sstevel@tonic-gate uintptr_t tt_sp; 650Sstevel@tonic-gate uintptr_t tt_tr; 660Sstevel@tonic-gate uintptr_t tt_f1; 670Sstevel@tonic-gate uintptr_t tt_f2; 680Sstevel@tonic-gate uintptr_t tt_f3; 690Sstevel@tonic-gate uintptr_t tt_f4; 700Sstevel@tonic-gate }; 710Sstevel@tonic-gate 725939Ssetje #define TRAP_TSIZE ((TRAP_TPGS / sizeof (struct trap_trace_record)) * \ 735939Ssetje sizeof (struct trap_trace_record)) 745939Ssetje 755939Ssetje #else 765939Ssetje 775939Ssetje #define TRAP_TSIZE ((TRAP_TPGS / TRAP_ENT_SIZE) * TRAP_ENT_SIZE) 785939Ssetje 790Sstevel@tonic-gate #endif 800Sstevel@tonic-gate 811077Ssvemuri #define HTRAP_TSIZE 0 820Sstevel@tonic-gate 830Sstevel@tonic-gate /* 840Sstevel@tonic-gate * Trap tracing buffer header. 850Sstevel@tonic-gate */ 860Sstevel@tonic-gate 870Sstevel@tonic-gate #ifndef _ASM 880Sstevel@tonic-gate 890Sstevel@tonic-gate /* 900Sstevel@tonic-gate * Example buffer header stored in locore.s: 910Sstevel@tonic-gate * 920Sstevel@tonic-gate * (the actual implementation could be .skip TRAPTR_SIZE*NCPU) 930Sstevel@tonic-gate */ 940Sstevel@tonic-gate typedef union { 950Sstevel@tonic-gate struct { 960Sstevel@tonic-gate caddr_t vaddr_base; /* virtual address of top of buffer */ 970Sstevel@tonic-gate uint64_t paddr_base; /* physical address of buffer */ 980Sstevel@tonic-gate uint_t last_offset; /* to "know" what trace completed */ 990Sstevel@tonic-gate uint_t offset; /* current index into buffer (bytes) */ 1000Sstevel@tonic-gate uint_t limit; /* upper limit on index */ 1010Sstevel@tonic-gate uchar_t asi; /* cache for real asi */ 1020Sstevel@tonic-gate } d; 1030Sstevel@tonic-gate char cache_linesize[64]; 1040Sstevel@tonic-gate } TRAP_TRACE_CTL; 1050Sstevel@tonic-gate 1060Sstevel@tonic-gate #ifdef _KERNEL 1070Sstevel@tonic-gate 1080Sstevel@tonic-gate extern TRAP_TRACE_CTL trap_trace_ctl[]; /* allocated in locore.s */ 1090Sstevel@tonic-gate extern int trap_trace_bufsize; /* default buffer size */ 1100Sstevel@tonic-gate extern char trap_tr0[]; /* prealloc buf for boot cpu */ 1110Sstevel@tonic-gate extern int trap_freeze; /* freeze the trap trace */ 1125648Ssetje extern caddr_t ttrace_buf; /* kmem64 buffer */ 1130Sstevel@tonic-gate extern int ttrace_index; /* index used */ 1145648Ssetje extern size_t calc_traptrace_sz(void); 1151077Ssvemuri extern void mach_htraptrace_setup(int); 1161077Ssvemuri extern void mach_htraptrace_configure(int); 1171077Ssvemuri extern void mach_htraptrace_cleanup(int); 1180Sstevel@tonic-gate 1190Sstevel@tonic-gate #endif 1200Sstevel@tonic-gate 1210Sstevel@tonic-gate /* 1220Sstevel@tonic-gate * freeze the trap trace 1230Sstevel@tonic-gate */ 1240Sstevel@tonic-gate #define TRAPTRACE_FREEZE trap_freeze = 1; 1250Sstevel@tonic-gate #define TRAPTRACE_UNFREEZE trap_freeze = 0; 1260Sstevel@tonic-gate 1270Sstevel@tonic-gate #else /* _ASM */ 1280Sstevel@tonic-gate 1290Sstevel@tonic-gate #include <sys/machthread.h> 1300Sstevel@tonic-gate 1310Sstevel@tonic-gate /* 1320Sstevel@tonic-gate * Offsets of words in trap_trace_ctl: 1330Sstevel@tonic-gate */ 1340Sstevel@tonic-gate /* 1350Sstevel@tonic-gate * XXX This should be done with genassym 1360Sstevel@tonic-gate */ 1370Sstevel@tonic-gate #define TRAPTR_VBASE 0 /* virtual address of buffer */ 1380Sstevel@tonic-gate #define TRAPTR_LAST_OFFSET 16 /* last completed trace entry */ 1390Sstevel@tonic-gate #define TRAPTR_OFFSET 20 /* next trace entry pointer */ 1400Sstevel@tonic-gate #define TRAPTR_LIMIT 24 /* pointer past end of buffer */ 1410Sstevel@tonic-gate #define TRAPTR_PBASE 8 /* start of buffer */ 1420Sstevel@tonic-gate #define TRAPTR_ASIBUF 28 /* cache of current asi */ 1430Sstevel@tonic-gate #define TRAPTR_SIZE_SHIFT 6 /* shift count -- per CPU indexing */ 1440Sstevel@tonic-gate #define TRAPTR_SIZE (1<<TRAPTR_SIZE_SHIFT) 1450Sstevel@tonic-gate 1460Sstevel@tonic-gate #define TRAPTR_ASI ASI_MEM /* ASI to use for TRAPTR access */ 1470Sstevel@tonic-gate 1480Sstevel@tonic-gate /* 1490Sstevel@tonic-gate * Use new %stick register for UltraSparc III and beyond for 1500Sstevel@tonic-gate * sane debugging of mixed speed CPU systems. Use TRAPTRACE_FORCE_TICK 1510Sstevel@tonic-gate * for finer granularity on same speed systems. 1520Sstevel@tonic-gate * 1530Sstevel@tonic-gate * Note the label-less branches used due to contraints of where 1540Sstevel@tonic-gate * and when trap trace macros are used. 1550Sstevel@tonic-gate */ 1560Sstevel@tonic-gate #ifdef TRAPTRACE_FORCE_TICK 157*11172SHaik.Aftandilian@Sun.COM #define GET_TRACE_TICK(reg, scr) \ 1580Sstevel@tonic-gate rdpr %tick, reg; 1590Sstevel@tonic-gate #else 160*11172SHaik.Aftandilian@Sun.COM #define GET_TRACE_TICK(reg, scr) \ 1610Sstevel@tonic-gate sethi %hi(traptrace_use_stick), reg; \ 1620Sstevel@tonic-gate lduw [reg + %lo(traptrace_use_stick)], reg; \ 1630Sstevel@tonic-gate /* CSTYLED */ \ 1640Sstevel@tonic-gate brz,a reg, .+12; \ 1650Sstevel@tonic-gate rdpr %tick, reg; \ 1660Sstevel@tonic-gate rd %asr24, reg; 1670Sstevel@tonic-gate #endif 1680Sstevel@tonic-gate 1690Sstevel@tonic-gate /* 1700Sstevel@tonic-gate * TRACE_PTR(ptr, scr1) - get trap trace entry physical pointer. 1710Sstevel@tonic-gate * ptr is the register to receive the trace pointer. 1720Sstevel@tonic-gate * scr1 is a different register to be used as scratch. 1730Sstevel@tonic-gate * TRACING now needs a known processor state. Hence the assertion. 1740Sstevel@tonic-gate * NOTE: this caches and resets %asi 1750Sstevel@tonic-gate */ 1760Sstevel@tonic-gate #define TRACE_PTR(ptr, scr1) \ 1770Sstevel@tonic-gate sethi %hi(trap_freeze), ptr; \ 1780Sstevel@tonic-gate ld [ptr + %lo(trap_freeze)], ptr; \ 1790Sstevel@tonic-gate /* CSTYLED */ \ 1800Sstevel@tonic-gate brnz,pn ptr, .+20; /* skip assertion */ \ 1810Sstevel@tonic-gate rdpr %pstate, scr1; \ 1820Sstevel@tonic-gate andcc scr1, PSTATE_IE | PSTATE_AM, scr1; \ 1830Sstevel@tonic-gate /* CSTYLED */ \ 1840Sstevel@tonic-gate bne,a,pn %icc, trace_ptr_panic; \ 1850Sstevel@tonic-gate rd %pc, %g1; \ 1860Sstevel@tonic-gate CPU_INDEX(scr1, ptr); \ 1870Sstevel@tonic-gate sll scr1, TRAPTR_SIZE_SHIFT, scr1; \ 1880Sstevel@tonic-gate set trap_trace_ctl, ptr; \ 1890Sstevel@tonic-gate add ptr, scr1, scr1; \ 1900Sstevel@tonic-gate rd %asi, ptr; \ 1910Sstevel@tonic-gate stb ptr, [scr1 + TRAPTR_ASIBUF]; \ 1920Sstevel@tonic-gate sethi %hi(trap_freeze), ptr; \ 1930Sstevel@tonic-gate ld [ptr + %lo(trap_freeze)], ptr; \ 1940Sstevel@tonic-gate /* CSTYLED */ \ 1950Sstevel@tonic-gate brnz,pn ptr, .+20; /* skip assertion */ \ 1960Sstevel@tonic-gate ld [scr1 + TRAPTR_LIMIT], ptr; \ 1970Sstevel@tonic-gate tst ptr; \ 1980Sstevel@tonic-gate /* CSTYLED */ \ 1990Sstevel@tonic-gate be,a,pn %icc, trace_ptr_panic; \ 2000Sstevel@tonic-gate rd %pc, %g1; \ 2010Sstevel@tonic-gate ldx [scr1 + TRAPTR_PBASE], ptr; \ 2020Sstevel@tonic-gate ld [scr1 + TRAPTR_OFFSET], scr1; \ 2030Sstevel@tonic-gate wr %g0, TRAPTR_ASI, %asi; \ 2040Sstevel@tonic-gate add ptr, scr1, ptr; 2050Sstevel@tonic-gate 2060Sstevel@tonic-gate /* 2070Sstevel@tonic-gate * TRACE_NEXT(scr1, scr2, scr3) - advance the trap trace pointer. 2080Sstevel@tonic-gate * scr1, scr2, scr3 are scratch registers. 2090Sstevel@tonic-gate * This routine will skip updating the trap pointers if the 2100Sstevel@tonic-gate * global freeze register is set (e.g. in panic). 2110Sstevel@tonic-gate * (we also restore the asi register) 2120Sstevel@tonic-gate */ 2130Sstevel@tonic-gate #define TRACE_NEXT(scr1, scr2, scr3) \ 2140Sstevel@tonic-gate CPU_INDEX(scr2, scr1); \ 2150Sstevel@tonic-gate sll scr2, TRAPTR_SIZE_SHIFT, scr2; \ 2160Sstevel@tonic-gate set trap_trace_ctl, scr1; \ 2170Sstevel@tonic-gate add scr1, scr2, scr2; \ 2180Sstevel@tonic-gate ldub [scr2 + TRAPTR_ASIBUF], scr1; \ 2190Sstevel@tonic-gate wr %g0, scr1, %asi; \ 2200Sstevel@tonic-gate sethi %hi(trap_freeze), scr1; \ 2210Sstevel@tonic-gate ld [scr1 + %lo(trap_freeze)], scr1; \ 2220Sstevel@tonic-gate /* CSTYLED */ \ 2230Sstevel@tonic-gate brnz scr1, .+36; /* skip update on freeze */ \ 2240Sstevel@tonic-gate ld [scr2 + TRAPTR_OFFSET], scr1; \ 2250Sstevel@tonic-gate ld [scr2 + TRAPTR_LIMIT], scr3; \ 2260Sstevel@tonic-gate st scr1, [scr2 + TRAPTR_LAST_OFFSET]; \ 2270Sstevel@tonic-gate add scr1, TRAP_ENT_SIZE, scr1; \ 2280Sstevel@tonic-gate sub scr3, TRAP_ENT_SIZE, scr3; \ 2290Sstevel@tonic-gate cmp scr1, scr3; \ 2300Sstevel@tonic-gate movge %icc, 0, scr1; \ 2310Sstevel@tonic-gate st scr1, [scr2 + TRAPTR_OFFSET]; 2320Sstevel@tonic-gate 2330Sstevel@tonic-gate /* 2340Sstevel@tonic-gate * macro to save %tl to trap trace record at addr 2350Sstevel@tonic-gate */ 2360Sstevel@tonic-gate #define TRACE_SAVE_TL_GL_REGS(addr, scr1) \ 2370Sstevel@tonic-gate rdpr %tl, scr1; \ 2380Sstevel@tonic-gate stha scr1, [addr + TRAP_ENT_TL]%asi 2390Sstevel@tonic-gate 2400Sstevel@tonic-gate /* 2410Sstevel@tonic-gate * macro to save tl to trap trace record at addr 2420Sstevel@tonic-gate */ 2430Sstevel@tonic-gate #define TRACE_SAVE_TL_VAL(addr, tl) \ 2440Sstevel@tonic-gate stha tl, [addr + TRAP_ENT_TL]%asi 2450Sstevel@tonic-gate 2460Sstevel@tonic-gate /* 2470Sstevel@tonic-gate * dummy macro 2480Sstevel@tonic-gate */ 2490Sstevel@tonic-gate #define TRACE_SAVE_GL_VAL(addr, gl) 2500Sstevel@tonic-gate 2510Sstevel@tonic-gate 2520Sstevel@tonic-gate /* 2530Sstevel@tonic-gate * Trace macro for sys_trap return entries: 2540Sstevel@tonic-gate * prom_rtt, priv_rtt, and user_rtt 2550Sstevel@tonic-gate * %l7 - regs 2560Sstevel@tonic-gate * %l6 - trap %pil for prom_rtt and priv_rtt; THREAD_REG for user_rtt 2570Sstevel@tonic-gate */ 2580Sstevel@tonic-gate #define TRACE_RTT(code, scr1, scr2, scr3, scr4) \ 2590Sstevel@tonic-gate rdpr %pstate, scr4; \ 2600Sstevel@tonic-gate andn scr4, PSTATE_IE | PSTATE_AM, scr3; \ 2610Sstevel@tonic-gate wrpr %g0, scr3, %pstate; \ 2620Sstevel@tonic-gate TRACE_PTR(scr1, scr2); \ 263*11172SHaik.Aftandilian@Sun.COM GET_TRACE_TICK(scr2, scr3); \ 2640Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 2650Sstevel@tonic-gate rdpr %tl, scr2; \ 2660Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 2670Sstevel@tonic-gate set code, scr2; \ 2680Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 2690Sstevel@tonic-gate ldn [%l7 + PC_OFF], scr2; \ 2700Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 2710Sstevel@tonic-gate ldx [%l7 + TSTATE_OFF], scr2; \ 2720Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 2730Sstevel@tonic-gate stna %sp, [scr1 + TRAP_ENT_SP]%asi; \ 2740Sstevel@tonic-gate stna %l6, [scr1 + TRAP_ENT_TR]%asi; \ 2750Sstevel@tonic-gate stna %l7, [scr1 + TRAP_ENT_F1]%asi; \ 2760Sstevel@tonic-gate ldn [THREAD_REG + T_CPU], scr2; \ 2770Sstevel@tonic-gate ld [scr2 + CPU_BASE_SPL], scr2; \ 2780Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F2]%asi; \ 2790Sstevel@tonic-gate mov MMU_SCONTEXT, scr2; \ 2800Sstevel@tonic-gate ldxa [scr2]ASI_DMMU, scr2; \ 2810Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 2820Sstevel@tonic-gate rdpr %cwp, scr2; \ 2830Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F4]%asi; \ 2840Sstevel@tonic-gate TRACE_NEXT(scr1, scr2, scr3); \ 2850Sstevel@tonic-gate wrpr %g0, scr4, %pstate 2860Sstevel@tonic-gate 2870Sstevel@tonic-gate /* 2880Sstevel@tonic-gate * Trace macro for spill and fill trap handlers 2890Sstevel@tonic-gate * tl and tt fields indicate which spill handler is entered 2900Sstevel@tonic-gate */ 2910Sstevel@tonic-gate #define TRACE_WIN_INFO(code, scr1, scr2, scr3) \ 2920Sstevel@tonic-gate TRACE_PTR(scr1, scr2); \ 293*11172SHaik.Aftandilian@Sun.COM GET_TRACE_TICK(scr2, scr3); \ 2940Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 2950Sstevel@tonic-gate rdpr %tl, scr2; \ 2960Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 2970Sstevel@tonic-gate rdpr %tt, scr2; \ 2980Sstevel@tonic-gate set code, scr3; \ 2990Sstevel@tonic-gate or scr2, scr3, scr2; \ 3000Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 3010Sstevel@tonic-gate rdpr %tstate, scr2; \ 3020Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 3030Sstevel@tonic-gate stna %sp, [scr1 + TRAP_ENT_SP]%asi; \ 3040Sstevel@tonic-gate rdpr %tpc, scr2; \ 3050Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 3060Sstevel@tonic-gate set TT_FSPILL_DEBUG, scr2; \ 3070Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_TR]%asi; \ 3080Sstevel@tonic-gate rdpr %pstate, scr2; \ 3090Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F1]%asi; \ 3100Sstevel@tonic-gate rdpr %cwp, scr2; \ 3110Sstevel@tonic-gate sll scr2, 24, scr2; \ 3120Sstevel@tonic-gate rdpr %cansave, scr3; \ 3130Sstevel@tonic-gate sll scr3, 16, scr3; \ 3140Sstevel@tonic-gate or scr2, scr3, scr2; \ 3150Sstevel@tonic-gate rdpr %canrestore, scr3; \ 3160Sstevel@tonic-gate or scr2, scr3, scr2; \ 3170Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F2]%asi; \ 3180Sstevel@tonic-gate rdpr %otherwin, scr2; \ 3190Sstevel@tonic-gate sll scr2, 24, scr2; \ 3200Sstevel@tonic-gate rdpr %cleanwin, scr3; \ 3210Sstevel@tonic-gate sll scr3, 16, scr3; \ 3220Sstevel@tonic-gate or scr2, scr3, scr2; \ 3230Sstevel@tonic-gate rdpr %wstate, scr3; \ 3240Sstevel@tonic-gate or scr2, scr3, scr2; \ 3250Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 3260Sstevel@tonic-gate stna %o7, [scr1 + TRAP_ENT_F4]%asi; \ 3270Sstevel@tonic-gate TRACE_NEXT(scr1, scr2, scr3) 3280Sstevel@tonic-gate 3290Sstevel@tonic-gate #ifdef TRAPTRACE 3300Sstevel@tonic-gate 3310Sstevel@tonic-gate #define FAULT_WINTRACE(scr1, scr2, scr3, type) \ 3320Sstevel@tonic-gate TRACE_PTR(scr1, scr2); \ 333*11172SHaik.Aftandilian@Sun.COM GET_TRACE_TICK(scr2, scr3); \ 3340Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 3350Sstevel@tonic-gate rdpr %tl, scr2; \ 3360Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 3370Sstevel@tonic-gate set type, scr2; \ 3380Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 3390Sstevel@tonic-gate rdpr %tpc, scr2; \ 3400Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 3410Sstevel@tonic-gate rdpr %tstate, scr2; \ 3420Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 3430Sstevel@tonic-gate stna %sp, [scr1 + TRAP_ENT_SP]%asi; \ 3440Sstevel@tonic-gate stna %g0, [scr1 + TRAP_ENT_TR]%asi; \ 3450Sstevel@tonic-gate stna %g0, [scr1 + TRAP_ENT_F1]%asi; \ 3460Sstevel@tonic-gate stna %g4, [scr1 + TRAP_ENT_F2]%asi; \ 3470Sstevel@tonic-gate rdpr %pil, scr2; \ 3480Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 3490Sstevel@tonic-gate stna %g0, [scr1 + TRAP_ENT_F4]%asi; \ 3500Sstevel@tonic-gate TRACE_NEXT(scr1, scr2, scr3) 3510Sstevel@tonic-gate 3520Sstevel@tonic-gate #define SYSTRAP_TT 0x1300 3530Sstevel@tonic-gate 3540Sstevel@tonic-gate #define SYSTRAP_TRACE(scr1, scr2, scr3) \ 3550Sstevel@tonic-gate TRACE_PTR(scr1, scr2); \ 356*11172SHaik.Aftandilian@Sun.COM GET_TRACE_TICK(scr2, scr3); \ 3570Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 3580Sstevel@tonic-gate rdpr %tl, scr2; \ 3590Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 3600Sstevel@tonic-gate set SYSTRAP_TT, scr3; \ 3610Sstevel@tonic-gate rdpr %tt, scr2; \ 3620Sstevel@tonic-gate or scr3, scr2, scr2; \ 3630Sstevel@tonic-gate stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 3640Sstevel@tonic-gate rdpr %tpc, scr2; \ 3650Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 3660Sstevel@tonic-gate rdpr %tstate, scr2; \ 3670Sstevel@tonic-gate stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 3680Sstevel@tonic-gate stna %g1, [scr1 + TRAP_ENT_SP]%asi; \ 3690Sstevel@tonic-gate stna %g2, [scr1 + TRAP_ENT_TR]%asi; \ 3700Sstevel@tonic-gate stna %g3, [scr1 + TRAP_ENT_F1]%asi; \ 3710Sstevel@tonic-gate stna %g4, [scr1 + TRAP_ENT_F2]%asi; \ 3720Sstevel@tonic-gate rdpr %pil, scr2; \ 3730Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 3740Sstevel@tonic-gate rdpr %cwp, scr2; \ 3750Sstevel@tonic-gate stna scr2, [scr1 + TRAP_ENT_F4]%asi; \ 3760Sstevel@tonic-gate TRACE_NEXT(scr1, scr2, scr3) 3770Sstevel@tonic-gate 3780Sstevel@tonic-gate #else /* TRAPTRACE */ 3790Sstevel@tonic-gate 3800Sstevel@tonic-gate #define FAULT_WINTRACE(scr1, scr2, scr3, type) 3810Sstevel@tonic-gate #define SYSTRAP_TRACE(scr1, scr2, scr3) 3820Sstevel@tonic-gate 3830Sstevel@tonic-gate #endif /* TRAPTRACE */ 3840Sstevel@tonic-gate 3850Sstevel@tonic-gate #endif /* _ASM */ 3860Sstevel@tonic-gate 3870Sstevel@tonic-gate /* 3880Sstevel@tonic-gate * Trap trace codes used in place of a %tbr value when more than one 3890Sstevel@tonic-gate * entry is made by a trap. The general scheme is that the trap-type is 3900Sstevel@tonic-gate * in the same position as in the TT, and the low-order bits indicate 3910Sstevel@tonic-gate * which precise entry is being made. 3920Sstevel@tonic-gate */ 3930Sstevel@tonic-gate 3940Sstevel@tonic-gate #define TT_F32_SN0 0x1084 3950Sstevel@tonic-gate #define TT_F64_SN0 0x1088 3960Sstevel@tonic-gate #define TT_F32_NT0 0x1094 3970Sstevel@tonic-gate #define TT_F64_NT0 0x1098 3980Sstevel@tonic-gate #define TT_F32_SO0 0x10A4 3990Sstevel@tonic-gate #define TT_F64_SO0 0x10A8 4000Sstevel@tonic-gate #define TT_F32_FN0 0x10C4 4010Sstevel@tonic-gate #define TT_F64_FN0 0x10C8 4020Sstevel@tonic-gate #define TT_F32_SN1 0x1284 4030Sstevel@tonic-gate #define TT_F64_SN1 0x1288 4040Sstevel@tonic-gate #define TT_F32_NT1 0x1294 4050Sstevel@tonic-gate #define TT_F64_NT1 0x1298 4060Sstevel@tonic-gate #define TT_F32_SO1 0x12A4 4070Sstevel@tonic-gate #define TT_F64_SO1 0x12A8 4080Sstevel@tonic-gate #define TT_F32_FN1 0x12C4 4090Sstevel@tonic-gate #define TT_F64_FN1 0x12C8 4100Sstevel@tonic-gate 4110Sstevel@tonic-gate #define TT_SC_ENTR 0x880 /* enter system call */ 4120Sstevel@tonic-gate #define TT_SC_RET 0x881 /* system call normal return */ 4130Sstevel@tonic-gate 4140Sstevel@tonic-gate #define TT_SYS_RTT_PROM 0x5555 /* return from trap to prom */ 4150Sstevel@tonic-gate #define TT_SYS_RTT_PRIV 0x6666 /* return from trap to privilege */ 4160Sstevel@tonic-gate #define TT_SYS_RTT_USER 0x7777 /* return from trap to user */ 4170Sstevel@tonic-gate 4180Sstevel@tonic-gate #define TT_INTR_EXIT 0x8888 /* interrupt thread exit (no pinned thread) */ 4190Sstevel@tonic-gate #define TT_FSPILL_DEBUG 0x9999 /* fill/spill debugging */ 4200Sstevel@tonic-gate 4210Sstevel@tonic-gate #define TT_SERVE_INTR 0x6000 /* SERVE_INTR */ 4220Sstevel@tonic-gate #define TT_XCALL 0xd000 /* xcall/xtrap */ 4230Sstevel@tonic-gate #define TT_XCALL_CONT 0xdc00 /* continuation of an xcall/xtrap record */ 4240Sstevel@tonic-gate 4250Sstevel@tonic-gate #define TT_MMU_MISS 0x200 /* or'd into %tt to indicate a miss */ 4260Sstevel@tonic-gate #define TT_SPURIOUS_INT 0x400 /* or'd into %tt for spurious intr. */ 4270Sstevel@tonic-gate 4280Sstevel@tonic-gate 4290Sstevel@tonic-gate #ifdef __cplusplus 4300Sstevel@tonic-gate } 4310Sstevel@tonic-gate #endif 4320Sstevel@tonic-gate 4330Sstevel@tonic-gate #endif /* _SYS_TRAPTRACE_H */ 434