xref: /onnv-gate/usr/src/uts/sun4u/sys/todbq4802.h (revision 511:0beae2eaf6ee)
1*511Sminht /*
2*511Sminht  * CDDL HEADER START
3*511Sminht  *
4*511Sminht  * The contents of this file are subject to the terms of the
5*511Sminht  * Common Development and Distribution License, Version 1.0 only
6*511Sminht  * (the "License").  You may not use this file except in compliance
7*511Sminht  * with the License.
8*511Sminht  *
9*511Sminht  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*511Sminht  * or http://www.opensolaris.org/os/licensing.
11*511Sminht  * See the License for the specific language governing permissions
12*511Sminht  * and limitations under the License.
13*511Sminht  *
14*511Sminht  * When distributing Covered Code, include this CDDL HEADER in each
15*511Sminht  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*511Sminht  * If applicable, add the following below this CDDL HEADER, with the
17*511Sminht  * fields enclosed by brackets "[]" replaced with your own identifying
18*511Sminht  * information: Portions Copyright [yyyy] [name of copyright owner]
19*511Sminht  *
20*511Sminht  * CDDL HEADER END
21*511Sminht  */
22*511Sminht /*
23*511Sminht  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*511Sminht  * Use is subject to license terms.
25*511Sminht  */
26*511Sminht 
27*511Sminht #ifndef	_TODBQ4802_H
28*511Sminht #define	_TODBQ4802_H
29*511Sminht 
30*511Sminht #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*511Sminht 
32*511Sminht #ifdef	__cplusplus
33*511Sminht extern "C" {
34*511Sminht #endif
35*511Sminht 
36*511Sminht extern  char	*v_rtc_addr_reg;
37*511Sminht 
38*511Sminht #ifdef	DEBUG
39*511Sminht #include <sys/promif.h>
40*511Sminht #define	DPRINTF if (bq4802_debug_flags) prom_printf
41*511Sminht #else
42*511Sminht #define	DPRINTF
43*511Sminht #endif	/* DEBUG */
44*511Sminht 
45*511Sminht #define	BQ4802_DATA_REG(x)	(*(volatile uint8_t *)(v_rtc_addr_reg + x))
46*511Sminht 
47*511Sminht /*
48*511Sminht  * Definitions for Real Time Clock driver (TI BQ4802 chip).
49*511Sminht  */
50*511Sminht #define	RTC_SEC		0x0	/* Seconds */
51*511Sminht #define	RTC_ASEC	0x1	/* Seconds Alarm */
52*511Sminht #define	RTC_MIN		0x2	/* Minutes */
53*511Sminht #define	RTC_AMIN	0x3	/* Minutes Alarm */
54*511Sminht #define	RTC_HRS		0x4	/* Hours */
55*511Sminht #define	RTC_AHRS	0x5	/* Hours Alarm */
56*511Sminht #define	RTC_DOM		0x6	/* Day-of-Month */
57*511Sminht #define	RTC_ADOM	0x7	/* Day-of-Month Alarm */
58*511Sminht #define	RTC_DOW		0x8	/* Day-of-Week */
59*511Sminht #define	RTC_MON		0x9	/* Month */
60*511Sminht #define	RTC_YEAR	0xa	/* Year */
61*511Sminht #define	RTC_CENTURY	0xf	/* Century */
62*511Sminht 
63*511Sminht #define	RTC_RATES	0xb	/* Control Register B */
64*511Sminht #define	RTC_ENABLES	0xc	/* Control Register C */
65*511Sminht #define	RTC_FLAGS	0xd	/* Control Register D */
66*511Sminht #define	RTC_CNTRL	0xe	/* Control Register E */
67*511Sminht 
68*511Sminht /*
69*511Sminht  * Control register B definitions
70*511Sminht  */
71*511Sminht #define	RTC_RS		0x0f	/* Rate select for periodic interrupt */
72*511Sminht #define	RTC_WD		0x70	/* Watchdog time-out rate */
73*511Sminht 
74*511Sminht /*
75*511Sminht  * Control register C definitions
76*511Sminht  */
77*511Sminht #define	RTC_ABE		0x01	/* Alarm Int. Enable in Battery-backup Mode */
78*511Sminht #define	RTC_PWRIE	0x02	/* Power-fail Interrupt Enable */
79*511Sminht #define	RTC_PIE		0x04	/* Periodic Interrupt Enable */
80*511Sminht #define	RTC_AIE		0x08	/* Alarm Interrupt Enable */
81*511Sminht 
82*511Sminht /*
83*511Sminht  * Control Register D definitions
84*511Sminht  */
85*511Sminht #define	RTC_BVF		0x01	/* Battery-valid flag */
86*511Sminht #define	RTC_PWRF	0x02	/* Power-fail Interrupt flag */
87*511Sminht #define	RTC_PF		0x04	/* Periodic Interrupt flag */
88*511Sminht #define	RTC_AF		0x08	/* Alarm Interrupt flag */
89*511Sminht 
90*511Sminht /*
91*511Sminht  * Control Register E definitions
92*511Sminht  */
93*511Sminht #define	RTC_DSE		0x01	/* Daylight Savings Enable */
94*511Sminht #define	RTC_HM		0x02	/* Hour mode, 1 = 24 hour, 0 = 12 hour */
95*511Sminht #define	RTC_STOP_N	0x04	/* Oscillator Stop and Start */
96*511Sminht #define	RTC_UTI		0x08	/* Update Transfer Inhibit */
97*511Sminht 
98*511Sminht struct	rtc_t {
99*511Sminht 	uint8_t	rtc_sec;	/* seconds */
100*511Sminht 	uint8_t	rtc_asec;	/* alarm seconds */
101*511Sminht 	uint8_t	rtc_min;	/* mins */
102*511Sminht 	uint8_t	rtc_amin;	/* alarm mins */
103*511Sminht 	uint8_t	rtc_hrs;	/* hours */
104*511Sminht 	uint8_t	rtc_ahrs;	/* alarm hours */
105*511Sminht 	uint8_t	rtc_dom;	/* day of the month */
106*511Sminht 	uint8_t	rtc_adom;	/* alarm day of the month */
107*511Sminht 	uint8_t	rtc_dow;	/* day of the week */
108*511Sminht 	uint8_t	rtc_mon;	/* month */
109*511Sminht 	uint8_t	rtc_year;	/* year */
110*511Sminht 	uint8_t	rtc_rates;	/* rates */
111*511Sminht 	uint8_t	rtc_enables;	/* enables */
112*511Sminht 	uint8_t	rtc_flags;	/* flags */
113*511Sminht 	uint8_t	rtc_control;	/* control */
114*511Sminht 	uint8_t	rtc_century;	/* century */
115*511Sminht };
116*511Sminht 
117*511Sminht #ifdef	__cplusplus
118*511Sminht }
119*511Sminht #endif
120*511Sminht 
121*511Sminht #endif	/* _TODBQ4802_H */
122