10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51455Sandrei * Common Development and Distribution License (the "License"). 61455Sandrei * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 22*12908SPavel.Tatashin@Sun.COM * Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved. 230Sstevel@tonic-gate */ 240Sstevel@tonic-gate 250Sstevel@tonic-gate #ifndef _SYS_MACHSYSTM_H 260Sstevel@tonic-gate #define _SYS_MACHSYSTM_H 270Sstevel@tonic-gate 280Sstevel@tonic-gate /* 290Sstevel@tonic-gate * Numerous platform-dependent interfaces that don't seem to belong 300Sstevel@tonic-gate * in any other header file. 310Sstevel@tonic-gate * 320Sstevel@tonic-gate * This file should not be included by code that purports to be 330Sstevel@tonic-gate * platform-independent. 340Sstevel@tonic-gate */ 350Sstevel@tonic-gate 360Sstevel@tonic-gate #ifndef _ASM 370Sstevel@tonic-gate #include <sys/types.h> 380Sstevel@tonic-gate #include <sys/scb.h> 390Sstevel@tonic-gate #include <sys/varargs.h> 400Sstevel@tonic-gate #include <sys/machparam.h> 410Sstevel@tonic-gate #include <sys/thread.h> 420Sstevel@tonic-gate #include <vm/seg_enum.h> 430Sstevel@tonic-gate #include <sys/processor.h> 440Sstevel@tonic-gate #include <sys/sunddi.h> 450Sstevel@tonic-gate #include <sys/memlist.h> 460Sstevel@tonic-gate #include <sys/async.h> 470Sstevel@tonic-gate #include <sys/errorq.h> 480Sstevel@tonic-gate #endif /* _ASM */ 490Sstevel@tonic-gate 500Sstevel@tonic-gate #ifdef __cplusplus 510Sstevel@tonic-gate extern "C" { 520Sstevel@tonic-gate #endif 530Sstevel@tonic-gate 540Sstevel@tonic-gate #ifdef _KERNEL 550Sstevel@tonic-gate 560Sstevel@tonic-gate #ifndef _ASM 570Sstevel@tonic-gate /* 580Sstevel@tonic-gate * The following enum types determine how interrupts are distributed 590Sstevel@tonic-gate * on a sun4u system. 600Sstevel@tonic-gate */ 610Sstevel@tonic-gate enum intr_policies { 620Sstevel@tonic-gate /* 630Sstevel@tonic-gate * Target interrupt at the CPU running the add_intrspec 640Sstevel@tonic-gate * thread. Also used to target all interrupts at the panicing 650Sstevel@tonic-gate * CPU. 660Sstevel@tonic-gate */ 670Sstevel@tonic-gate INTR_CURRENT_CPU = 0, 680Sstevel@tonic-gate 690Sstevel@tonic-gate /* 700Sstevel@tonic-gate * Target all interrupts at the boot cpu 710Sstevel@tonic-gate */ 720Sstevel@tonic-gate INTR_BOOT_CPU, 730Sstevel@tonic-gate 740Sstevel@tonic-gate /* 750Sstevel@tonic-gate * Flat distribution of all interrupts 760Sstevel@tonic-gate */ 770Sstevel@tonic-gate INTR_FLAT_DIST, 780Sstevel@tonic-gate 790Sstevel@tonic-gate /* 800Sstevel@tonic-gate * Weighted distribution of all interrupts 810Sstevel@tonic-gate */ 820Sstevel@tonic-gate INTR_WEIGHTED_DIST 830Sstevel@tonic-gate }; 840Sstevel@tonic-gate 850Sstevel@tonic-gate 860Sstevel@tonic-gate /* 870Sstevel@tonic-gate * Structure that defines the interrupt distribution list. It contains 880Sstevel@tonic-gate * enough info about the interrupt so that it can callback the parent 890Sstevel@tonic-gate * nexus driver and retarget the interrupt to a different CPU. 900Sstevel@tonic-gate */ 910Sstevel@tonic-gate struct intr_dist { 920Sstevel@tonic-gate struct intr_dist *next; /* link to next in list */ 930Sstevel@tonic-gate void (*func)(void *); /* Callback function */ 940Sstevel@tonic-gate void *arg; /* Nexus parent callback arg 1 */ 950Sstevel@tonic-gate }; 960Sstevel@tonic-gate 970Sstevel@tonic-gate /* 980Sstevel@tonic-gate * Miscellaneous cpu_state changes 990Sstevel@tonic-gate */ 1000Sstevel@tonic-gate extern void power_down(const char *); 1010Sstevel@tonic-gate extern void do_shutdown(void); 1020Sstevel@tonic-gate 1030Sstevel@tonic-gate /* 1040Sstevel@tonic-gate * Number of seconds until power is shut off 1050Sstevel@tonic-gate */ 1060Sstevel@tonic-gate extern int thermal_powerdown_delay; 1070Sstevel@tonic-gate 1080Sstevel@tonic-gate 1090Sstevel@tonic-gate /* 1100Sstevel@tonic-gate * prom-related 1110Sstevel@tonic-gate */ 1120Sstevel@tonic-gate extern int obpdebug; 1130Sstevel@tonic-gate extern int forthdebug_supported; 1140Sstevel@tonic-gate extern uint_t tba_taken_over; 1150Sstevel@tonic-gate extern void forthdebug_init(void); 1160Sstevel@tonic-gate extern void init_vx_handler(void); 1170Sstevel@tonic-gate extern void kern_preprom(void); 1180Sstevel@tonic-gate extern void kern_postprom(void); 1190Sstevel@tonic-gate 1200Sstevel@tonic-gate /* 1210Sstevel@tonic-gate * externally (debugger or prom) initiated panic 1220Sstevel@tonic-gate */ 1230Sstevel@tonic-gate extern struct regs sync_reg_buf; 1240Sstevel@tonic-gate extern uint64_t sync_tt; 1250Sstevel@tonic-gate extern void sync_handler(void); 1260Sstevel@tonic-gate 1270Sstevel@tonic-gate /* 1280Sstevel@tonic-gate * Trap-related 1290Sstevel@tonic-gate */ 1300Sstevel@tonic-gate struct regs; 1310Sstevel@tonic-gate extern void trap(struct regs *rp, caddr_t addr, uint32_t type, 1320Sstevel@tonic-gate uint32_t mmu_fsr); 1330Sstevel@tonic-gate extern void *get_tba(void); 1340Sstevel@tonic-gate extern void *set_tba(void *); 1350Sstevel@tonic-gate extern caddr_t set_trap_table(void); 1360Sstevel@tonic-gate extern struct scb trap_table; 1370Sstevel@tonic-gate 1385084Sjohnlev struct panic_trap_info { 1390Sstevel@tonic-gate struct regs *trap_regs; 1400Sstevel@tonic-gate uint_t trap_type; 1410Sstevel@tonic-gate caddr_t trap_addr; 1420Sstevel@tonic-gate uint_t trap_mmu_fsr; 1430Sstevel@tonic-gate }; 1440Sstevel@tonic-gate 1450Sstevel@tonic-gate /* 1460Sstevel@tonic-gate * misc. primitives 1470Sstevel@tonic-gate */ 1480Sstevel@tonic-gate extern void debug_flush_windows(void); 1490Sstevel@tonic-gate extern void flush_windows(void); 1500Sstevel@tonic-gate extern int getprocessorid(void); 1510Sstevel@tonic-gate extern void reestablish_curthread(void); 1520Sstevel@tonic-gate 1530Sstevel@tonic-gate extern void stphys(uint64_t physaddr, int value); 1540Sstevel@tonic-gate extern int ldphys(uint64_t physaddr); 1550Sstevel@tonic-gate extern void stdphys(uint64_t physaddr, uint64_t value); 1560Sstevel@tonic-gate extern uint64_t lddphys(uint64_t physaddr); 1570Sstevel@tonic-gate 1580Sstevel@tonic-gate extern void stphysio(u_longlong_t physaddr, uint_t value); 1590Sstevel@tonic-gate extern uint_t ldphysio(u_longlong_t physaddr); 1600Sstevel@tonic-gate extern void sthphysio(u_longlong_t physaddr, ushort_t value); 1610Sstevel@tonic-gate extern ushort_t ldhphysio(u_longlong_t physaddr); 1620Sstevel@tonic-gate extern void stbphysio(u_longlong_t physaddr, uchar_t value); 1630Sstevel@tonic-gate extern uchar_t ldbphysio(u_longlong_t physaddr); 1640Sstevel@tonic-gate extern void stdphysio(u_longlong_t physaddr, u_longlong_t value); 1650Sstevel@tonic-gate extern u_longlong_t lddphysio(u_longlong_t physaddr); 1660Sstevel@tonic-gate 1670Sstevel@tonic-gate extern int pf_is_dmacapable(pfn_t); 1680Sstevel@tonic-gate 1690Sstevel@tonic-gate extern int dip_to_cpu_id(dev_info_t *dip, processorid_t *cpu_id); 1700Sstevel@tonic-gate 1710Sstevel@tonic-gate extern void set_cmp_error_steering(void); 1720Sstevel@tonic-gate 1730Sstevel@tonic-gate /* 1740Sstevel@tonic-gate * SPARCv9 %ver register and field definitions 1750Sstevel@tonic-gate */ 1760Sstevel@tonic-gate 1770Sstevel@tonic-gate #define ULTRA_VER_MANUF(x) ((x) >> 48) 1780Sstevel@tonic-gate #define ULTRA_VER_IMPL(x) (((x) >> 32) & 0xFFFF) 1790Sstevel@tonic-gate #define ULTRA_VER_MASK(x) (((x) >> 24) & 0xFF) 1800Sstevel@tonic-gate 1810Sstevel@tonic-gate extern uint64_t ultra_getver(void); 1820Sstevel@tonic-gate 1830Sstevel@tonic-gate /* 1840Sstevel@tonic-gate * bootup-time 1850Sstevel@tonic-gate */ 1860Sstevel@tonic-gate extern int ncpunode; 1870Sstevel@tonic-gate extern int niobus; 1880Sstevel@tonic-gate 1890Sstevel@tonic-gate extern void segnf_init(void); 1900Sstevel@tonic-gate extern void kern_setup1(void); 1910Sstevel@tonic-gate extern void startup(void); 1920Sstevel@tonic-gate extern void post_startup(void); 1930Sstevel@tonic-gate extern void install_va_to_tte(void); 1940Sstevel@tonic-gate extern void setwstate(uint_t); 1950Sstevel@tonic-gate extern void create_va_to_tte(void); 1960Sstevel@tonic-gate extern int memscrub_init(void); 1970Sstevel@tonic-gate 1980Sstevel@tonic-gate extern void kcpc_hw_init(void); 1990Sstevel@tonic-gate extern void kcpc_hw_startup_cpu(ushort_t); 2000Sstevel@tonic-gate extern int kcpc_hw_load_pcbe(void); 2010Sstevel@tonic-gate 2020Sstevel@tonic-gate /* 2030Sstevel@tonic-gate * Interrupts 2040Sstevel@tonic-gate */ 2050Sstevel@tonic-gate struct cpu; 2060Sstevel@tonic-gate extern struct cpu cpu0; 2070Sstevel@tonic-gate extern struct scb *set_tbr(struct scb *); 2080Sstevel@tonic-gate 2090Sstevel@tonic-gate extern uint_t disable_vec_intr(void); 2100Sstevel@tonic-gate extern void enable_vec_intr(uint_t); 2110Sstevel@tonic-gate extern void setintrenable(int); 2120Sstevel@tonic-gate 2130Sstevel@tonic-gate extern void intr_dist_add(void (*f)(void *), void *); 2140Sstevel@tonic-gate extern void intr_dist_rem(void (*f)(void *), void *); 2150Sstevel@tonic-gate extern void intr_dist_add_weighted(void (*f)(void *, int32_t, int32_t), void *); 2160Sstevel@tonic-gate extern void intr_dist_rem_weighted(void (*f)(void *, int32_t, int32_t), void *); 2170Sstevel@tonic-gate 2180Sstevel@tonic-gate extern uint32_t intr_dist_cpuid(void); 2190Sstevel@tonic-gate 2200Sstevel@tonic-gate void intr_dist_cpuid_add_device_weight(uint32_t cpuid, dev_info_t *dip, 2210Sstevel@tonic-gate int32_t weight); 2220Sstevel@tonic-gate void intr_dist_cpuid_rem_device_weight(uint32_t cpuid, dev_info_t *dip); 2230Sstevel@tonic-gate 2240Sstevel@tonic-gate extern void intr_redist_all_cpus(void); 2250Sstevel@tonic-gate extern void intr_redist_all_cpus_shutdown(void); 2260Sstevel@tonic-gate 2270Sstevel@tonic-gate extern void send_dirint(int, int); 2282973Sgovinda extern void setsoftint(uint64_t); 2290Sstevel@tonic-gate extern void setsoftint_tl1(uint64_t, uint64_t); 2300Sstevel@tonic-gate extern void siron(void); 2315107Seota extern void sir_on(int); 2320Sstevel@tonic-gate extern uint64_t getidsr(void); 2332973Sgovinda extern void intr_enqueue_req(uint_t pil, uint64_t inum); 2342973Sgovinda extern void intr_dequeue_req(uint_t pil, uint64_t inum); 2350Sstevel@tonic-gate extern void wr_clr_softint(uint_t); 2360Sstevel@tonic-gate 2370Sstevel@tonic-gate /* 2380Sstevel@tonic-gate * Time- and %tick-related 2390Sstevel@tonic-gate */ 2400Sstevel@tonic-gate extern hrtime_t rdtick(void); 2410Sstevel@tonic-gate extern void tick_write_delta(uint64_t); 2420Sstevel@tonic-gate extern void tickcmpr_set(uint64_t); 2430Sstevel@tonic-gate extern void tickcmpr_reset(void); 2440Sstevel@tonic-gate extern void tickcmpr_disable(void); 2450Sstevel@tonic-gate extern int tickcmpr_disabled(void); 2462973Sgovinda extern uint64_t cbe_level14_inum; 2470Sstevel@tonic-gate 2480Sstevel@tonic-gate /* 2490Sstevel@tonic-gate * Caches 2500Sstevel@tonic-gate */ 2510Sstevel@tonic-gate extern int vac; 2520Sstevel@tonic-gate extern int cache; 2530Sstevel@tonic-gate extern int use_mp; 2540Sstevel@tonic-gate extern uint_t vac_mask; 2550Sstevel@tonic-gate extern uint64_t ecache_flushaddr; 2560Sstevel@tonic-gate extern int dcache_size; /* Maximum dcache size */ 2570Sstevel@tonic-gate extern int dcache_linesize; /* Minimum dcache linesize */ 2580Sstevel@tonic-gate extern int icache_size; /* Maximum icache size */ 2590Sstevel@tonic-gate extern int icache_linesize; /* Minimum icache linesize */ 2600Sstevel@tonic-gate extern int ecache_alignsize; /* Maximum ecache linesize for struct align */ 2610Sstevel@tonic-gate extern int ecache_size; /* Maximum ecache size */ 2620Sstevel@tonic-gate extern int ecache_associativity; /* ecache associativity */ 2630Sstevel@tonic-gate extern int ecache_setsize; /* Maximum ecache setsize possible */ 2640Sstevel@tonic-gate extern int cpu_setsize; /* Maximum ecache setsize of configured cpus */ 2650Sstevel@tonic-gate 2660Sstevel@tonic-gate /* 2670Sstevel@tonic-gate * VM 2680Sstevel@tonic-gate */ 2690Sstevel@tonic-gate extern int do_pg_coloring; 2700Sstevel@tonic-gate extern int use_page_coloring; 2710Sstevel@tonic-gate extern uint_t vac_colors_mask; 2720Sstevel@tonic-gate 2730Sstevel@tonic-gate extern int ndata_alloc_page_freelists(struct memlist *, int); 2740Sstevel@tonic-gate extern int ndata_alloc_dmv(struct memlist *); 2750Sstevel@tonic-gate extern int ndata_alloc_tsbs(struct memlist *, pgcnt_t); 276*12908SPavel.Tatashin@Sun.COM extern int ndata_alloc_hat(struct memlist *); 2775648Ssetje extern int ndata_alloc_kpm(struct memlist *, pgcnt_t); 2785648Ssetje extern int ndata_alloc_page_mutexs(struct memlist *ndata); 2795648Ssetje 2805648Ssetje extern size_t calc_pp_sz(pgcnt_t); 2815648Ssetje extern size_t calc_kpmpp_sz(pgcnt_t); 2825648Ssetje extern size_t calc_hmehash_sz(pgcnt_t); 2835648Ssetje extern size_t calc_pagehash_sz(pgcnt_t); 2845648Ssetje extern size_t calc_free_pagelist_sz(void); 2855648Ssetje 2865648Ssetje extern caddr_t alloc_hmehash(caddr_t); 2875648Ssetje extern caddr_t alloc_page_freelists(caddr_t); 2885648Ssetje 2890Sstevel@tonic-gate extern size_t page_ctrs_sz(void); 2900Sstevel@tonic-gate extern caddr_t page_ctrs_alloc(caddr_t); 2910Sstevel@tonic-gate extern void page_freelist_coalesce_all(int); 2920Sstevel@tonic-gate extern void ppmapinit(void); 2930Sstevel@tonic-gate extern void hwblkpagecopy(const void *, void *); 2940Sstevel@tonic-gate extern void hw_pa_bcopy32(uint64_t, uint64_t); 2950Sstevel@tonic-gate 2960Sstevel@tonic-gate extern int pp_slots; 2970Sstevel@tonic-gate extern int pp_consistent_coloring; 2980Sstevel@tonic-gate 2990Sstevel@tonic-gate /* 3000Sstevel@tonic-gate * ppcopy/hwblkpagecopy interaction. See ppage.c. 3010Sstevel@tonic-gate */ 3020Sstevel@tonic-gate #define PPAGE_STORE_VCOLORING 0x1 /* use vcolors to maintain consistency */ 3030Sstevel@tonic-gate #define PPAGE_LOAD_VCOLORING 0x2 /* use vcolors to maintain consistency */ 3040Sstevel@tonic-gate #define PPAGE_STORES_POLLUTE 0x4 /* stores pollute VAC */ 3050Sstevel@tonic-gate #define PPAGE_LOADS_POLLUTE 0x8 /* loads pollute VAC */ 3060Sstevel@tonic-gate 3070Sstevel@tonic-gate /* 3080Sstevel@tonic-gate * VIS-accelerated copy/zero 3090Sstevel@tonic-gate */ 3100Sstevel@tonic-gate extern int use_hw_bcopy; 3110Sstevel@tonic-gate extern uint_t hw_copy_limit_1; 3120Sstevel@tonic-gate extern uint_t hw_copy_limit_2; 3130Sstevel@tonic-gate extern uint_t hw_copy_limit_4; 3140Sstevel@tonic-gate extern uint_t hw_copy_limit_8; 3150Sstevel@tonic-gate extern int use_hw_bzero; 3160Sstevel@tonic-gate 3170Sstevel@tonic-gate #ifdef CHEETAH 3180Sstevel@tonic-gate #define VIS_COPY_THRESHOLD 256 3190Sstevel@tonic-gate #else 3200Sstevel@tonic-gate #define VIS_COPY_THRESHOLD 900 3210Sstevel@tonic-gate #endif 3220Sstevel@tonic-gate 3230Sstevel@tonic-gate /* 3240Sstevel@tonic-gate * MP 3250Sstevel@tonic-gate */ 3260Sstevel@tonic-gate extern void idle_other_cpus(void); 3270Sstevel@tonic-gate extern void resume_other_cpus(void); 3280Sstevel@tonic-gate extern void stop_other_cpus(void); 3290Sstevel@tonic-gate extern void idle_stop_xcall(void); 3300Sstevel@tonic-gate extern void set_idle_cpu(int); 3310Sstevel@tonic-gate extern void unset_idle_cpu(int); 3320Sstevel@tonic-gate extern void mp_cpu_quiesce(struct cpu *); 3330Sstevel@tonic-gate 3340Sstevel@tonic-gate /* 3350Sstevel@tonic-gate * Error handling 3360Sstevel@tonic-gate */ 3370Sstevel@tonic-gate extern void set_error_enable(uint64_t neer); 3380Sstevel@tonic-gate extern void set_error_enable_tl1(uint64_t neer, uint64_t action); 3390Sstevel@tonic-gate extern uint64_t get_error_enable(void); 3400Sstevel@tonic-gate extern void get_asyncflt(uint64_t *afsr); 3410Sstevel@tonic-gate extern void set_asyncflt(uint64_t afsr); 3420Sstevel@tonic-gate extern void get_asyncaddr(uint64_t *afar); 3430Sstevel@tonic-gate extern void scrubphys(uint64_t paddr, int ecache_size); 3440Sstevel@tonic-gate extern void clearphys(uint64_t paddr, int ecache_size, int ecache_linesize); 3450Sstevel@tonic-gate extern void flushecacheline(uint64_t paddr, int ecache_size); 3460Sstevel@tonic-gate extern int ce_scrub_xdiag_recirc(struct async_flt *, errorq_t *, 3470Sstevel@tonic-gate errorq_elem_t *, size_t); 3480Sstevel@tonic-gate extern char *flt_to_error_type(struct async_flt *); 3490Sstevel@tonic-gate 3500Sstevel@tonic-gate /* 3510Sstevel@tonic-gate * Panic at TL > 0 3520Sstevel@tonic-gate */ 3530Sstevel@tonic-gate extern uint64_t cpu_pa[]; 3540Sstevel@tonic-gate extern void ptl1_init_cpu(struct cpu *); 3550Sstevel@tonic-gate 3560Sstevel@tonic-gate /* 3570Sstevel@tonic-gate * Constants which define the "hole" in the 64-bit sfmmu address space. 3580Sstevel@tonic-gate * These are set to specific values by the CPU module code. 3590Sstevel@tonic-gate */ 3600Sstevel@tonic-gate extern caddr_t hole_start, hole_end; 3610Sstevel@tonic-gate 3620Sstevel@tonic-gate /* kpm mapping window */ 3630Sstevel@tonic-gate extern size_t kpm_size; 3640Sstevel@tonic-gate extern uchar_t kpm_size_shift; 3650Sstevel@tonic-gate extern caddr_t kpm_vbase; 3660Sstevel@tonic-gate 3670Sstevel@tonic-gate #define INVALID_VADDR(a) (((a) >= hole_start && (a) < hole_end)) 3680Sstevel@tonic-gate 3690Sstevel@tonic-gate extern void adjust_hw_copy_limits(int); 3700Sstevel@tonic-gate 3710Sstevel@tonic-gate #endif /* _ASM */ 3720Sstevel@tonic-gate 3730Sstevel@tonic-gate /* 3740Sstevel@tonic-gate * Actions for set_error_enable_tl1 3750Sstevel@tonic-gate */ 3760Sstevel@tonic-gate #define EER_SET_ABSOLUTE 0x0 3770Sstevel@tonic-gate #define EER_SET_SETBITS 0x1 3780Sstevel@tonic-gate #define EER_SET_CLRBITS 0x2 3790Sstevel@tonic-gate 3800Sstevel@tonic-gate #endif /* _KERNEL */ 3810Sstevel@tonic-gate 3820Sstevel@tonic-gate #ifdef __cplusplus 3830Sstevel@tonic-gate } 3840Sstevel@tonic-gate #endif 3850Sstevel@tonic-gate 3860Sstevel@tonic-gate #endif /* _SYS_MACHSYSTM_H */ 387