1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate /*	Copyright (c) 1988 AT&T	*/
28*0Sstevel@tonic-gate /*	All Rights Reserved	*/
29*0Sstevel@tonic-gate 
30*0Sstevel@tonic-gate #ifndef _SYS_MACHPARAM_H
31*0Sstevel@tonic-gate #define	_SYS_MACHPARAM_H
32*0Sstevel@tonic-gate 
33*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
34*0Sstevel@tonic-gate 
35*0Sstevel@tonic-gate #ifdef	__cplusplus
36*0Sstevel@tonic-gate extern "C" {
37*0Sstevel@tonic-gate #endif
38*0Sstevel@tonic-gate 
39*0Sstevel@tonic-gate #ifndef _ASM
40*0Sstevel@tonic-gate #define	ADDRESS_C(c)    c ## ul
41*0Sstevel@tonic-gate #else   /* _ASM */
42*0Sstevel@tonic-gate #define	ADDRESS_C(c)    (c)
43*0Sstevel@tonic-gate #endif	/* _ASM */
44*0Sstevel@tonic-gate 
45*0Sstevel@tonic-gate /*
46*0Sstevel@tonic-gate  * Machine dependent parameters and limits - sun4u version.
47*0Sstevel@tonic-gate  */
48*0Sstevel@tonic-gate 
49*0Sstevel@tonic-gate /*
50*0Sstevel@tonic-gate  * Define the VAC symbol (etc.) if we could run on a machine
51*0Sstevel@tonic-gate  * which has a Virtual Address Cache
52*0Sstevel@tonic-gate  *
53*0Sstevel@tonic-gate  * This stuff gotta go.
54*0Sstevel@tonic-gate  */
55*0Sstevel@tonic-gate #define	VAC			/* support virtual addressed caches */
56*0Sstevel@tonic-gate 
57*0Sstevel@tonic-gate /*
58*0Sstevel@tonic-gate  * The maximum possible number of UPA devices in a system.
59*0Sstevel@tonic-gate  * MAX_UPA maybe defined in a platform's makefile.
60*0Sstevel@tonic-gate  */
61*0Sstevel@tonic-gate #ifdef	_STARFIRE
62*0Sstevel@tonic-gate /*
63*0Sstevel@tonic-gate  * We have a 7 bit id space for UPA devices in Xfire
64*0Sstevel@tonic-gate  */
65*0Sstevel@tonic-gate #define	MAX_UPA			128
66*0Sstevel@tonic-gate #else
67*0Sstevel@tonic-gate #ifndef MAX_UPA
68*0Sstevel@tonic-gate #define	MAX_UPA			32
69*0Sstevel@tonic-gate #endif
70*0Sstevel@tonic-gate #endif	/* _STARFIRE */
71*0Sstevel@tonic-gate 
72*0Sstevel@tonic-gate /*
73*0Sstevel@tonic-gate  * Maximum cpuid value that we support.  NCPU can be defined in a platform's
74*0Sstevel@tonic-gate  * makefile.
75*0Sstevel@tonic-gate  */
76*0Sstevel@tonic-gate #if	(defined(_STARFIRE) && !defined(lint))
77*0Sstevel@tonic-gate #define	NCPU	64
78*0Sstevel@tonic-gate #else
79*0Sstevel@tonic-gate #ifndef NCPU
80*0Sstevel@tonic-gate #define	NCPU	32
81*0Sstevel@tonic-gate #endif
82*0Sstevel@tonic-gate #endif	/* _STARFIRE && !lint */
83*0Sstevel@tonic-gate 
84*0Sstevel@tonic-gate /*
85*0Sstevel@tonic-gate  * Maximum number of processors that we support.  With CMP processors, the
86*0Sstevel@tonic-gate  * portid may not be equal to cpuid.  MAX_CPU_CHIPID can be defined in a
87*0Sstevel@tonic-gate  * platform's makefile.
88*0Sstevel@tonic-gate  */
89*0Sstevel@tonic-gate #ifndef	MAX_CPU_CHIPID
90*0Sstevel@tonic-gate #define	MAX_CPU_CHIPID	NCPU
91*0Sstevel@tonic-gate #endif
92*0Sstevel@tonic-gate 
93*0Sstevel@tonic-gate /*
94*0Sstevel@tonic-gate  * Define the FPU symbol if we could run on a machine with an external
95*0Sstevel@tonic-gate  * FPU (i.e. not integrated with the normal machine state like the vax).
96*0Sstevel@tonic-gate  *
97*0Sstevel@tonic-gate  * The fpu is defined in the architecture manual, and the kernel hides
98*0Sstevel@tonic-gate  * its absence if it is not present, that's pretty integrated, no?
99*0Sstevel@tonic-gate  */
100*0Sstevel@tonic-gate 
101*0Sstevel@tonic-gate /*
102*0Sstevel@tonic-gate  * MMU_PAGES* describes the physical page size used by the mapping hardware.
103*0Sstevel@tonic-gate  * PAGES* describes the logical page size used by the system.
104*0Sstevel@tonic-gate  */
105*0Sstevel@tonic-gate #define	MMU_PAGE_SIZES		6	/* max sun4u mmu-supported page sizes */
106*0Sstevel@tonic-gate #define	DEFAULT_MMU_PAGE_SIZES	4	/* default sun4u supported page sizes */
107*0Sstevel@tonic-gate 
108*0Sstevel@tonic-gate /*
109*0Sstevel@tonic-gate  * XXX make sure the MMU_PAGESHIFT definition here is
110*0Sstevel@tonic-gate  * consistent with the one in param.h
111*0Sstevel@tonic-gate  */
112*0Sstevel@tonic-gate #define	MMU_PAGESHIFT		13
113*0Sstevel@tonic-gate #define	MMU_PAGESIZE		(1<<MMU_PAGESHIFT)
114*0Sstevel@tonic-gate #define	MMU_PAGEOFFSET		(MMU_PAGESIZE - 1)
115*0Sstevel@tonic-gate #define	MMU_PAGEMASK		(~MMU_PAGEOFFSET)
116*0Sstevel@tonic-gate 
117*0Sstevel@tonic-gate #define	MMU_PAGESHIFT64K	16
118*0Sstevel@tonic-gate #define	MMU_PAGESIZE64K		(1 << MMU_PAGESHIFT64K)
119*0Sstevel@tonic-gate #define	MMU_PAGEOFFSET64K	(MMU_PAGESIZE64K - 1)
120*0Sstevel@tonic-gate #define	MMU_PAGEMASK64K		(~MMU_PAGEOFFSET64K)
121*0Sstevel@tonic-gate 
122*0Sstevel@tonic-gate #define	MMU_PAGESHIFT512K	19
123*0Sstevel@tonic-gate #define	MMU_PAGESIZE512K	(1 << MMU_PAGESHIFT512K)
124*0Sstevel@tonic-gate #define	MMU_PAGEOFFSET512K	(MMU_PAGESIZE512K - 1)
125*0Sstevel@tonic-gate #define	MMU_PAGEMASK512K	(~MMU_PAGEOFFSET512K)
126*0Sstevel@tonic-gate 
127*0Sstevel@tonic-gate #define	MMU_PAGESHIFT4M		22
128*0Sstevel@tonic-gate #define	MMU_PAGESIZE4M		(1 << MMU_PAGESHIFT4M)
129*0Sstevel@tonic-gate #define	MMU_PAGEOFFSET4M	(MMU_PAGESIZE4M - 1)
130*0Sstevel@tonic-gate #define	MMU_PAGEMASK4M		(~MMU_PAGEOFFSET4M)
131*0Sstevel@tonic-gate 
132*0Sstevel@tonic-gate #define	MMU_PAGESHIFT32M	25
133*0Sstevel@tonic-gate #define	MMU_PAGESIZE32M		(1 << MMU_PAGESHIFT32M)
134*0Sstevel@tonic-gate #define	MMU_PAGEOFFSET32M	(MMU_PAGESIZE32M - 1)
135*0Sstevel@tonic-gate #define	MMU_PAGEMASK32M		(~MMU_PAGEOFFSET32M)
136*0Sstevel@tonic-gate 
137*0Sstevel@tonic-gate #define	MMU_PAGESHIFT256M	28
138*0Sstevel@tonic-gate #define	MMU_PAGESIZE256M	(1 << MMU_PAGESHIFT256M)
139*0Sstevel@tonic-gate #define	MMU_PAGEOFFSET256M	(MMU_PAGESIZE256M - 1)
140*0Sstevel@tonic-gate #define	MMU_PAGEMASK256M	(~MMU_PAGEOFFSET256M)
141*0Sstevel@tonic-gate 
142*0Sstevel@tonic-gate #define	PAGESHIFT	13
143*0Sstevel@tonic-gate #define	PAGESIZE	(1<<PAGESHIFT)
144*0Sstevel@tonic-gate #define	PAGEOFFSET	(PAGESIZE - 1)
145*0Sstevel@tonic-gate #define	PAGEMASK	(~PAGEOFFSET)
146*0Sstevel@tonic-gate 
147*0Sstevel@tonic-gate /*
148*0Sstevel@tonic-gate  * DATA_ALIGN is used to define the alignment of the Unix data segment.
149*0Sstevel@tonic-gate  */
150*0Sstevel@tonic-gate #define	DATA_ALIGN	ADDRESS_C(0x2000)
151*0Sstevel@tonic-gate 
152*0Sstevel@tonic-gate /*
153*0Sstevel@tonic-gate  * DEFAULT KERNEL THREAD stack size.
154*0Sstevel@tonic-gate  */
155*0Sstevel@tonic-gate 
156*0Sstevel@tonic-gate #define	DEFAULTSTKSZ	(3*PAGESIZE)
157*0Sstevel@tonic-gate 
158*0Sstevel@tonic-gate /*
159*0Sstevel@tonic-gate  * DEFAULT initial thread stack size.
160*0Sstevel@tonic-gate  */
161*0Sstevel@tonic-gate #define	T0STKSZ		(2 * DEFAULTSTKSZ)
162*0Sstevel@tonic-gate 
163*0Sstevel@tonic-gate /*
164*0Sstevel@tonic-gate  * KERNELBASE is the virtual address which
165*0Sstevel@tonic-gate  * the kernel text/data mapping starts in all contexts.
166*0Sstevel@tonic-gate  */
167*0Sstevel@tonic-gate #define	KERNELBASE	ADDRESS_C(0x01000000)
168*0Sstevel@tonic-gate 
169*0Sstevel@tonic-gate /*
170*0Sstevel@tonic-gate  * Define the userlimits
171*0Sstevel@tonic-gate  */
172*0Sstevel@tonic-gate 
173*0Sstevel@tonic-gate #define	USERLIMIT	ADDRESS_C(0xFFFFFFFF80000000)
174*0Sstevel@tonic-gate #define	USERLIMIT32	ADDRESS_C(0xFFC00000)
175*0Sstevel@tonic-gate 
176*0Sstevel@tonic-gate /*
177*0Sstevel@tonic-gate  * Define SEGKPBASE, start of the segkp segment.
178*0Sstevel@tonic-gate  */
179*0Sstevel@tonic-gate 
180*0Sstevel@tonic-gate #define	SEGKPBASE	ADDRESS_C(0x2a100000000)
181*0Sstevel@tonic-gate 
182*0Sstevel@tonic-gate /*
183*0Sstevel@tonic-gate  * Define SEGMAPBASE, start of the segmap segment.
184*0Sstevel@tonic-gate  */
185*0Sstevel@tonic-gate 
186*0Sstevel@tonic-gate #define	SEGMAPBASE	ADDRESS_C(0x2a750000000)
187*0Sstevel@tonic-gate 
188*0Sstevel@tonic-gate /*
189*0Sstevel@tonic-gate  * SYSBASE is the virtual address which the kernel allocated memory
190*0Sstevel@tonic-gate  * mapping starts in all contexts.  SYSLIMIT is the end of the Sysbase segment.
191*0Sstevel@tonic-gate  */
192*0Sstevel@tonic-gate 
193*0Sstevel@tonic-gate #define	SYSBASE		ADDRESS_C(0x30000000000)
194*0Sstevel@tonic-gate #define	SYSLIMIT	ADDRESS_C(0x70000000000)
195*0Sstevel@tonic-gate #define	SYSBASE32	ADDRESS_C(0x70000000)
196*0Sstevel@tonic-gate #define	SYSLIMIT32	ADDRESS_C(0x80000000)
197*0Sstevel@tonic-gate 
198*0Sstevel@tonic-gate /*
199*0Sstevel@tonic-gate  * MEMSCRUBBASE is the base virtual address for the memory scrubber
200*0Sstevel@tonic-gate  * to read large pages.  It MUST be 4MB page aligned.
201*0Sstevel@tonic-gate  */
202*0Sstevel@tonic-gate 
203*0Sstevel@tonic-gate #define	MEMSCRUBBASE	0x2a000000000
204*0Sstevel@tonic-gate 
205*0Sstevel@tonic-gate /*
206*0Sstevel@tonic-gate  * Define the kernel address space range allocated to Open Firmware
207*0Sstevel@tonic-gate  */
208*0Sstevel@tonic-gate #define	OFW_START_ADDR	0xf0000000
209*0Sstevel@tonic-gate #define	OFW_END_ADDR	0xffffffff
210*0Sstevel@tonic-gate 
211*0Sstevel@tonic-gate /*
212*0Sstevel@tonic-gate  * ARGSBASE is the base virtual address of the range which
213*0Sstevel@tonic-gate  * the kernel uses to map the arguments for exec.
214*0Sstevel@tonic-gate  */
215*0Sstevel@tonic-gate #define	ARGSBASE	(MEMSCRUBBASE - NCARGS)
216*0Sstevel@tonic-gate 
217*0Sstevel@tonic-gate /*
218*0Sstevel@tonic-gate  * PPMAPBASE is the base virtual address of the range which
219*0Sstevel@tonic-gate  * the kernel uses to quickly map pages for operations such
220*0Sstevel@tonic-gate  * as ppcopy, pagecopy, pagezero, and pagesum.
221*0Sstevel@tonic-gate  */
222*0Sstevel@tonic-gate #define	PPMAPSIZE	(512 * 1024)
223*0Sstevel@tonic-gate #define	PPMAPBASE	(ARGSBASE - PPMAPSIZE)
224*0Sstevel@tonic-gate 
225*0Sstevel@tonic-gate #define	MAXPP_SLOTS	ADDRESS_C(16)
226*0Sstevel@tonic-gate #define	PPMAP_FAST_SIZE	(MAXPP_SLOTS * PAGESIZE * NCPU)
227*0Sstevel@tonic-gate #define	PPMAP_FAST_BASE	(PPMAPBASE - PPMAP_FAST_SIZE)
228*0Sstevel@tonic-gate 
229*0Sstevel@tonic-gate /*
230*0Sstevel@tonic-gate  * PIOMAPBASE is the base virtual address at which programmable I/O registers
231*0Sstevel@tonic-gate  * are mapped.  This allows such memory -- which may induce side effects when
232*0Sstevel@tonic-gate  * read -- to be cordoned off from the system at-large.
233*0Sstevel@tonic-gate  */
234*0Sstevel@tonic-gate #define	PIOMAPSIZE	(1024 * 1024 * 1024 * (uintptr_t)5)
235*0Sstevel@tonic-gate #define	PIOMAPBASE	(PPMAP_FAST_BASE - PIOMAPSIZE)
236*0Sstevel@tonic-gate 
237*0Sstevel@tonic-gate /*
238*0Sstevel@tonic-gate  * Allocate space for kernel modules on nucleus pages
239*0Sstevel@tonic-gate  */
240*0Sstevel@tonic-gate #define	MODDATA	1024 * 256
241*0Sstevel@tonic-gate 
242*0Sstevel@tonic-gate /*
243*0Sstevel@tonic-gate  * On systems with <MODTEXT_SM_SIZE MB available physical memory,
244*0Sstevel@tonic-gate  * cap the in-nucleus module text to MODTEXT_SM_CAP bytes.  The
245*0Sstevel@tonic-gate  * cap must be a multiple of the base page size.  Also see startup.c.
246*0Sstevel@tonic-gate  */
247*0Sstevel@tonic-gate #define	MODTEXT_SM_CAP		(0x200000)		/* bytes */
248*0Sstevel@tonic-gate #define	MODTEXT_SM_SIZE		(256)			/* MB */
249*0Sstevel@tonic-gate 
250*0Sstevel@tonic-gate /*
251*0Sstevel@tonic-gate  * The heap has a region allocated from it specifically for module text that
252*0Sstevel@tonic-gate  * cannot fit on the nucleus page.  This region -- which starts at address
253*0Sstevel@tonic-gate  * HEAPTEXT_BASE and runs for HEAPTEXT_SIZE bytes -- has virtual holes
254*0Sstevel@tonic-gate  * punched in it: for every HEAPTEXT_MAPPED bytes of available virtual, there
255*0Sstevel@tonic-gate  * is a virtual hole of size HEAPTEXT_UNMAPPED bytes sitting beneath it.  This
256*0Sstevel@tonic-gate  * assures that any text address is within HEAPTEXT_MAPPED of an unmapped
257*0Sstevel@tonic-gate  * region.  The unmapped regions themselves are managed with the routines
258*0Sstevel@tonic-gate  * kobj_texthole_alloc() and kobj_texthole_free().
259*0Sstevel@tonic-gate  */
260*0Sstevel@tonic-gate #define	HEAPTEXT_SIZE		(128 * 1024 * 1024)	/* bytes */
261*0Sstevel@tonic-gate #define	HEAPTEXT_OVERSIZE	(64 * 1024 * 1024)	/* bytes */
262*0Sstevel@tonic-gate #define	HEAPTEXT_BASE		(SYSLIMIT32 - HEAPTEXT_SIZE)
263*0Sstevel@tonic-gate #define	HEAPTEXT_MAPPED		(2 * 1024 * 1024)
264*0Sstevel@tonic-gate #define	HEAPTEXT_UNMAPPED	(2 * 1024 * 1024)
265*0Sstevel@tonic-gate 
266*0Sstevel@tonic-gate #define	HEAPTEXT_NARENAS	\
267*0Sstevel@tonic-gate 	(HEAPTEXT_SIZE / (HEAPTEXT_MAPPED + HEAPTEXT_UNMAPPED) + 2)
268*0Sstevel@tonic-gate 
269*0Sstevel@tonic-gate /*
270*0Sstevel@tonic-gate  * Preallocate an area for setting up the user stack during
271*0Sstevel@tonic-gate  * the exec(). This way we have a faster allocator and also
272*0Sstevel@tonic-gate  * make sure the stack is always VAC aligned correctly. see
273*0Sstevel@tonic-gate  * get_arg_base() in startup.c.
274*0Sstevel@tonic-gate  */
275*0Sstevel@tonic-gate #define	ARG_SLOT_SIZE	(0x8000)
276*0Sstevel@tonic-gate #define	ARG_SLOT_SHIFT	(15)
277*0Sstevel@tonic-gate #define	N_ARG_SLOT	(0x80)
278*0Sstevel@tonic-gate 
279*0Sstevel@tonic-gate #define	NARG_BASE	(PIOMAPBASE - (ARG_SLOT_SIZE * N_ARG_SLOT))
280*0Sstevel@tonic-gate 
281*0Sstevel@tonic-gate /*
282*0Sstevel@tonic-gate  * ktextseg+kvalloc should not use space beyond KERNEL_LIMIT32.
283*0Sstevel@tonic-gate  */
284*0Sstevel@tonic-gate 
285*0Sstevel@tonic-gate /*
286*0Sstevel@tonic-gate  * For 64-bit kernels, rename KERNEL_LIMIT to KERNEL_LIMIT32 to more accurately
287*0Sstevel@tonic-gate  * reflect the fact that it's actually the limit for 32-bit kernel virtual
288*0Sstevel@tonic-gate  * addresses.
289*0Sstevel@tonic-gate  */
290*0Sstevel@tonic-gate #define	KERNEL_LIMIT32	(SYSBASE32)
291*0Sstevel@tonic-gate 
292*0Sstevel@tonic-gate #define	PFN_TO_BUSTYPE(pfn)	(((pfn) >> 19) & 0x1FF)
293*0Sstevel@tonic-gate #define	BUSTYPE_TO_PFN(btype, pfn)			\
294*0Sstevel@tonic-gate 	(((btype) << 19) | ((pfn) & 0x7FFFF))
295*0Sstevel@tonic-gate #define	IO_BUSTYPE(pfn)	((PFN_TO_BUSTYPE(pfn) & 0x100) >> 8)
296*0Sstevel@tonic-gate 
297*0Sstevel@tonic-gate #ifdef	_STARFIRE
298*0Sstevel@tonic-gate #define	PFN_TO_UPAID(pfn)	BUSTYPE_TO_UPAID(PFN_TO_BUSTYPE(pfn))
299*0Sstevel@tonic-gate #else
300*0Sstevel@tonic-gate #define	PFN_TO_UPAID(pfn)	(((pfn) >> 20) & 0x1F)
301*0Sstevel@tonic-gate #endif	/* _STARFIRE */
302*0Sstevel@tonic-gate 
303*0Sstevel@tonic-gate /*
304*0Sstevel@tonic-gate  * Defines used for the ptl1_panic parameter, which is passed to the
305*0Sstevel@tonic-gate  * ptl1_panic assembly routine in %g1.  These #defines have string
306*0Sstevel@tonic-gate  * names defined in sun4u/os/mach_cpu_states.c which should be kept up to
307*0Sstevel@tonic-gate  * date if new #defines are added.
308*0Sstevel@tonic-gate  */
309*0Sstevel@tonic-gate #define	PTL1_BAD_DEBUG		0
310*0Sstevel@tonic-gate #define	PTL1_BAD_WTRAP		1
311*0Sstevel@tonic-gate #define	PTL1_BAD_KMISS		2
312*0Sstevel@tonic-gate #define	PTL1_BAD_KPROT_FAULT	3
313*0Sstevel@tonic-gate #define	PTL1_BAD_ISM		4
314*0Sstevel@tonic-gate #define	PTL1_BAD_MMUTRAP	5
315*0Sstevel@tonic-gate #define	PTL1_BAD_TRAP		6
316*0Sstevel@tonic-gate #define	PTL1_BAD_FPTRAP		7
317*0Sstevel@tonic-gate #define	PTL1_BAD_INTR_REQ	8
318*0Sstevel@tonic-gate #define	PTL1_BAD_TRACE_PTR	9
319*0Sstevel@tonic-gate #define	PTL1_BAD_STACK		10
320*0Sstevel@tonic-gate #define	PTL1_BAD_DTRACE_FLAGS	11
321*0Sstevel@tonic-gate #define	PTL1_BAD_CTX_STEAL	12
322*0Sstevel@tonic-gate #define	PTL1_BAD_ECC		13
323*0Sstevel@tonic-gate 
324*0Sstevel@tonic-gate /*
325*0Sstevel@tonic-gate  * Defines used for ptl1 related data structs.
326*0Sstevel@tonic-gate  */
327*0Sstevel@tonic-gate #define	PTL1_MAXTL		4
328*0Sstevel@tonic-gate #define	PTL1_DEBUG_TRAP		0x7C
329*0Sstevel@tonic-gate #define	PTL1_SSIZE		1024	/* minimum stack size */
330*0Sstevel@tonic-gate #define	CPU_ALLOC_SIZE		MMU_PAGESIZE
331*0Sstevel@tonic-gate 
332*0Sstevel@tonic-gate #ifdef	__cplusplus
333*0Sstevel@tonic-gate }
334*0Sstevel@tonic-gate #endif
335*0Sstevel@tonic-gate 
336*0Sstevel@tonic-gate #endif	/* _SYS_MACHPARAM_H */
337