xref: /onnv-gate/usr/src/uts/sun4u/sys/cpu_module.h (revision 8664:fa4744ba0999)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
51772Sjl139090  * Common Development and Distribution License (the "License").
61772Sjl139090  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
210Sstevel@tonic-gate /*
22*8664SJames.Anderson@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
230Sstevel@tonic-gate  * Use is subject to license terms.
240Sstevel@tonic-gate  */
250Sstevel@tonic-gate 
260Sstevel@tonic-gate #ifndef _SYS_CPU_MODULE_H
270Sstevel@tonic-gate #define	_SYS_CPU_MODULE_H
280Sstevel@tonic-gate 
290Sstevel@tonic-gate #include <sys/pte.h>
300Sstevel@tonic-gate #include <sys/async.h>
310Sstevel@tonic-gate #include <sys/x_call.h>
320Sstevel@tonic-gate #include <sys/conf.h>
330Sstevel@tonic-gate #include <sys/obpdefs.h>
340Sstevel@tonic-gate 
350Sstevel@tonic-gate #ifdef	__cplusplus
360Sstevel@tonic-gate extern "C" {
370Sstevel@tonic-gate #endif
380Sstevel@tonic-gate 
390Sstevel@tonic-gate 
400Sstevel@tonic-gate #ifdef _KERNEL
410Sstevel@tonic-gate 
420Sstevel@tonic-gate /*
430Sstevel@tonic-gate  * The are functions that are expected of the cpu modules.
440Sstevel@tonic-gate  */
450Sstevel@tonic-gate 
460Sstevel@tonic-gate extern struct module_ops *moduleops;
470Sstevel@tonic-gate 
480Sstevel@tonic-gate struct kdi;
490Sstevel@tonic-gate 
500Sstevel@tonic-gate /*
510Sstevel@tonic-gate  * module initialization
520Sstevel@tonic-gate  */
530Sstevel@tonic-gate void	cpu_setup(void);
540Sstevel@tonic-gate void	cpu_kdi_init(struct kdi *);
550Sstevel@tonic-gate 
560Sstevel@tonic-gate /*
570Sstevel@tonic-gate  * set CPU implementation details
580Sstevel@tonic-gate  *
59106Ssusans  * set Panther CPU implementation details
60106Ssusans  *
611772Sjl139090  * On Panther-only domains and Olympus-C, mmu_init_mmu_page_sizes
621772Sjl139090  * changes the mmu_page_sizes variable from the default 4 page sizes
631772Sjl139090  * to 6 page sizes and is called from fillsysinfo.c:check_cpus_set
641772Sjl139090  * at early bootup time.
650Sstevel@tonic-gate  */
66789Sahrens void	cpu_fiximp(pnode_t dnode);
67106Ssusans #pragma weak cpu_fix_allpanther
68106Ssusans void	cpu_fix_allpanther(void);
695037Sjl139090 #pragma weak cpu_fix_alljupiter
705037Sjl139090 void	cpu_fix_alljupiter(void);
710Sstevel@tonic-gate #pragma weak mmu_init_mmu_page_sizes
720Sstevel@tonic-gate int	mmu_init_mmu_page_sizes(int cinfo);
730Sstevel@tonic-gate 
740Sstevel@tonic-gate /*
750Sstevel@tonic-gate  * virtual demap flushes (tlbs & virtual tag caches)
760Sstevel@tonic-gate  */
772241Shuah void	vtag_flushpage(caddr_t addr, uint64_t sfmmup);
780Sstevel@tonic-gate void	vtag_flushall(void);
792241Shuah #pragma weak vtag_flushall_uctxs
802241Shuah void	vtag_flushall_uctxs(void);
812241Shuah void	vtag_flushpage_tl1(uint64_t addr, uint64_t sfmmup);
822241Shuah void	vtag_flush_pgcnt_tl1(uint64_t addr, uint64_t sfmmup_pgcnt);
830Sstevel@tonic-gate void	vtag_flushall_tl1(uint64_t dummy1, uint64_t dummy2);
840Sstevel@tonic-gate 
850Sstevel@tonic-gate /*
860Sstevel@tonic-gate  * virtual alias flushes (virtual address caches)
870Sstevel@tonic-gate  */
880Sstevel@tonic-gate void	vac_flushpage(pfn_t pf, int color);
890Sstevel@tonic-gate void	vac_flushpage_tl1(uint64_t pf, uint64_t color);
900Sstevel@tonic-gate void	vac_flushcolor(int color, pfn_t pf);
910Sstevel@tonic-gate void	vac_flushcolor_tl1(uint64_t color, uint64_t dummy);
920Sstevel@tonic-gate 
930Sstevel@tonic-gate /*
940Sstevel@tonic-gate  * sending x-calls
950Sstevel@tonic-gate  */
960Sstevel@tonic-gate void	init_mondo(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
970Sstevel@tonic-gate void	send_one_mondo(int cpuid);
980Sstevel@tonic-gate #ifdef _MACHDEP
990Sstevel@tonic-gate void	send_mondo_set(cpuset_t set);
1000Sstevel@tonic-gate #endif
1010Sstevel@tonic-gate 
1020Sstevel@tonic-gate /*
1032241Shuah  * flag to support optimal dtlb pagesize setting, for ISM and mpss, to support
1042241Shuah  * cpus with non-fully-associative dtlbs. Page size is stored in hat sfmmu_cext
1050Sstevel@tonic-gate  */
1062241Shuah extern uint_t cpu_impl_dual_pgsz;
1070Sstevel@tonic-gate 
1080Sstevel@tonic-gate /*
1090Sstevel@tonic-gate  * flush instruction cache if needed
1100Sstevel@tonic-gate  */
1110Sstevel@tonic-gate void	flush_instr_mem(caddr_t addr, size_t len);
1120Sstevel@tonic-gate 
1130Sstevel@tonic-gate /*
1140Sstevel@tonic-gate  * flush instruction and data caches
1150Sstevel@tonic-gate  */
1160Sstevel@tonic-gate void	kdi_flush_caches(void);
1170Sstevel@tonic-gate 
1180Sstevel@tonic-gate /*
1190Sstevel@tonic-gate  * take pending fp traps if fpq present
1200Sstevel@tonic-gate  * this function is also defined in fpusystm.h
1210Sstevel@tonic-gate  */
1220Sstevel@tonic-gate void	syncfpu(void);
1230Sstevel@tonic-gate 
1240Sstevel@tonic-gate /*
1250Sstevel@tonic-gate  * Cpu-specific error and ecache handling routines
1260Sstevel@tonic-gate  */
1270Sstevel@tonic-gate void	ce_err(void);
1280Sstevel@tonic-gate void	ce_err_tl1(void);
1290Sstevel@tonic-gate void	async_err(void);
1300Sstevel@tonic-gate void	cpu_flush_ecache(void);
1310Sstevel@tonic-gate void	cpu_disable_errors(void);
1320Sstevel@tonic-gate /* It could be removed later if prom enables errors */
1330Sstevel@tonic-gate void	cpu_enable_errors(void);
1340Sstevel@tonic-gate void	cpu_faulted_enter(struct cpu *);
1350Sstevel@tonic-gate void	cpu_faulted_exit(struct cpu *);
1360Sstevel@tonic-gate void	cpu_ce_count_unum(struct async_flt *ecc, int len, char *unum);
1370Sstevel@tonic-gate void	cpu_ce_scrub_mem_err(struct async_flt *, boolean_t);
1380Sstevel@tonic-gate void	cpu_ce_log_err(struct async_flt *, errorq_elem_t *);
1390Sstevel@tonic-gate void	cpu_ue_log_err(struct async_flt *);
1400Sstevel@tonic-gate int	cpu_aflt_size(void);
1410Sstevel@tonic-gate void	cpu_async_panic_callb(void);
1420Sstevel@tonic-gate void	cpu_check_allcpus(struct async_flt *aflt);
1430Sstevel@tonic-gate int	cpu_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp);
1441186Sayznaga 
1451186Sayznaga /* Interfaces for getting memory-related information */
1460Sstevel@tonic-gate int	cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
1470Sstevel@tonic-gate 	    char *buf, int buflen, int *lenp);
1480Sstevel@tonic-gate int	cpu_get_mem_info(uint64_t synd, uint64_t afar,
1490Sstevel@tonic-gate 	    uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
1500Sstevel@tonic-gate 	    int *segsp, int *banksp, int *mcidp);
1510Sstevel@tonic-gate size_t	cpu_get_name_bufsize();
1521186Sayznaga extern int cpu_get_mem_addr(char *unum, char *sid, uint64_t offset,
1531186Sayznaga 	    uint64_t *addrp);
1541186Sayznaga 
1551186Sayznaga /*
1561186Sayznaga  * FMA Event Memory Routines
1571186Sayznaga  *
1581186Sayznaga  * The following routines are used by FMA Event generators to retrieve data
1591186Sayznaga  * to store in memory ereports.  These routines may call through to platform-
1601186Sayznaga  * specific code and/or drivers, and can be called from passive context, low-
1611186Sayznaga  * level interrupt context, or panic context.  They may grab adaptive locks,
1621186Sayznaga  * but should not be allocating new data structures or calling cv_wait().
1631186Sayznaga  */
1641186Sayznaga int	cpu_get_mem_unum(int synd_status, ushort_t synd, uint64_t afsr,
1651186Sayznaga 	    uint64_t afar, int cpuid, int flt_in_memory,
1661186Sayznaga 	    ushort_t flt_status, char *buf, int buflen, int *lenp);
1671186Sayznaga int	cpu_get_mem_unum_aflt(int synd_status, struct async_flt *aflt,
1681186Sayznaga 	    char *buf, int buflen, int *lenp);
1691186Sayznaga extern int cpu_get_mem_sid(char *unum, char *buf, int buflen, int *lenp);
1701186Sayznaga extern int cpu_get_mem_offset(uint64_t flt_addr, uint64_t *offp);
1711186Sayznaga 
1720Sstevel@tonic-gate void	read_ecc_data(struct async_flt *ecc, short verbose, short ce_err);
1730Sstevel@tonic-gate /* add clr_datapath to aviod lint warning for ac_test.c temporarily */
1740Sstevel@tonic-gate void	clr_datapath(void);
1750Sstevel@tonic-gate 
1760Sstevel@tonic-gate #pragma weak itlb_parity_trap
1770Sstevel@tonic-gate void itlb_parity_trap(void);
1780Sstevel@tonic-gate 
1790Sstevel@tonic-gate #pragma weak dtlb_parity_trap
1800Sstevel@tonic-gate void dtlb_parity_trap(void);
1810Sstevel@tonic-gate 
1820Sstevel@tonic-gate /*
1830Sstevel@tonic-gate  * FMA Protocol and error handling support routines
1840Sstevel@tonic-gate  */
1850Sstevel@tonic-gate 
1860Sstevel@tonic-gate void cpu_ereport_post(struct async_flt *);
1870Sstevel@tonic-gate void cpu_run_bus_error_handlers(struct async_flt *, int);
1880Sstevel@tonic-gate void cpu_errorq_dispatch(char *, void *, size_t, errorq_t *, uint_t);
1890Sstevel@tonic-gate 
1900Sstevel@tonic-gate /*
1910Sstevel@tonic-gate  * retrieve information from the specified tlb entry. these functions are
1920Sstevel@tonic-gate  * called by "cpr" module
1930Sstevel@tonic-gate  */
1940Sstevel@tonic-gate void	itlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag);
1950Sstevel@tonic-gate void	dtlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag);
1960Sstevel@tonic-gate 
1970Sstevel@tonic-gate /*
1980Sstevel@tonic-gate  * this symbol appears as a second label for vtag_flushall
1990Sstevel@tonic-gate  * only for cpus that implement DEMAP_ALL_TYPE
2000Sstevel@tonic-gate  */
2010Sstevel@tonic-gate #pragma	weak demap_all
2020Sstevel@tonic-gate 
2030Sstevel@tonic-gate /*
2040Sstevel@tonic-gate  * change cpu speed
2050Sstevel@tonic-gate  */
2060Sstevel@tonic-gate void	cpu_change_speed(uint64_t divisor, uint64_t arg2);
2070Sstevel@tonic-gate 
2080Sstevel@tonic-gate /*
2090Sstevel@tonic-gate  * ecache scrub operations
2100Sstevel@tonic-gate  */
2110Sstevel@tonic-gate void cpu_init_cache_scrub(void);
2120Sstevel@tonic-gate void cpu_idle_ecache_scrub(struct cpu *);
2130Sstevel@tonic-gate void cpu_busy_ecache_scrub(struct cpu *);
2140Sstevel@tonic-gate 
2150Sstevel@tonic-gate /*
2160Sstevel@tonic-gate  * Cpu private initialize/uninitialize, including ecache scrubber.
2170Sstevel@tonic-gate  */
2180Sstevel@tonic-gate void	cpu_init_private(struct cpu *);
2190Sstevel@tonic-gate void	cpu_uninit_private(struct cpu *);
2200Sstevel@tonic-gate 
2210Sstevel@tonic-gate #pragma weak cpu_mp_init
2220Sstevel@tonic-gate void    cpu_mp_init(void);
2230Sstevel@tonic-gate 
2240Sstevel@tonic-gate #pragma weak cpu_feature_init
2250Sstevel@tonic-gate void    cpu_feature_init(void);
2260Sstevel@tonic-gate 
227*8664SJames.Anderson@Sun.COM #pragma weak cpu_early_feature_init
228*8664SJames.Anderson@Sun.COM void    cpu_early_feature_init(void);
229*8664SJames.Anderson@Sun.COM 
2300Sstevel@tonic-gate #pragma weak cpu_error_init
2310Sstevel@tonic-gate void	cpu_error_init(int);
2320Sstevel@tonic-gate 
2330Sstevel@tonic-gate /*
2340Sstevel@tonic-gate  * clock/tick register operations
2350Sstevel@tonic-gate  */
2360Sstevel@tonic-gate void	cpu_clearticknpt(void);
2370Sstevel@tonic-gate void	cpu_init_tick_freq(void);
2380Sstevel@tonic-gate 
2390Sstevel@tonic-gate /*
2400Sstevel@tonic-gate  * stick synchronization
2410Sstevel@tonic-gate  */
2420Sstevel@tonic-gate void	sticksync_slave(void);
2430Sstevel@tonic-gate void	sticksync_master(void);
2440Sstevel@tonic-gate 
2450Sstevel@tonic-gate /*
2460Sstevel@tonic-gate  * flags for calling cpu_check_ce
2470Sstevel@tonic-gate  */
2480Sstevel@tonic-gate #define	SCRUBBER_CEEN_CHECK		0
2490Sstevel@tonic-gate #define	TIMEOUT_CEEN_CHECK		1
2500Sstevel@tonic-gate 
2510Sstevel@tonic-gate /*
2520Sstevel@tonic-gate  * Check for Correctable Errors that may have occurred
2530Sstevel@tonic-gate  * while CEEN was disabled.
2540Sstevel@tonic-gate  */
2550Sstevel@tonic-gate void cpu_check_ce(int, uint64_t, caddr_t, uint_t);
2560Sstevel@tonic-gate 
2570Sstevel@tonic-gate /* initialize kernel context pgsz codes in DMMU primary context register */
2580Sstevel@tonic-gate void mmu_init_kernel_pgsz(struct hat *hat);
2590Sstevel@tonic-gate 
2600Sstevel@tonic-gate /* get large page size for kernel heap */
2610Sstevel@tonic-gate size_t mmu_get_kernel_lpsize(size_t value);
2620Sstevel@tonic-gate 
2630Sstevel@tonic-gate #endif /* _KERNEL */
2640Sstevel@tonic-gate 
2650Sstevel@tonic-gate #ifdef	__cplusplus
2660Sstevel@tonic-gate }
2670Sstevel@tonic-gate #endif
2680Sstevel@tonic-gate 
2690Sstevel@tonic-gate #endif /* _SYS_CPU_MODULE_H */
270