1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate * CDDL HEADER START
3*0Sstevel@tonic-gate *
4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance
7*0Sstevel@tonic-gate * with the License.
8*0Sstevel@tonic-gate *
9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate * and limitations under the License.
13*0Sstevel@tonic-gate *
14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate *
20*0Sstevel@tonic-gate * CDDL HEADER END
21*0Sstevel@tonic-gate */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
24*0Sstevel@tonic-gate * Use is subject to license terms.
25*0Sstevel@tonic-gate */
26*0Sstevel@tonic-gate
27*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI"
28*0Sstevel@tonic-gate
29*0Sstevel@tonic-gate /*
30*0Sstevel@tonic-gate * PCI nexus driver interface
31*0Sstevel@tonic-gate */
32*0Sstevel@tonic-gate #include <sys/types.h>
33*0Sstevel@tonic-gate #include <sys/conf.h> /* nulldev */
34*0Sstevel@tonic-gate #include <sys/stat.h> /* devctl */
35*0Sstevel@tonic-gate #include <sys/kmem.h>
36*0Sstevel@tonic-gate #include <sys/async.h> /* ecc_flt for pci_ecc.h */
37*0Sstevel@tonic-gate #include <sys/sunddi.h>
38*0Sstevel@tonic-gate #include <sys/sunndi.h>
39*0Sstevel@tonic-gate #include <sys/ontrap.h>
40*0Sstevel@tonic-gate #include <sys/ddi_impldefs.h>
41*0Sstevel@tonic-gate #include <sys/ddi_subrdefs.h>
42*0Sstevel@tonic-gate #include <sys/epm.h>
43*0Sstevel@tonic-gate #include <sys/membar.h>
44*0Sstevel@tonic-gate #include <sys/modctl.h>
45*0Sstevel@tonic-gate #include <sys/hotplug/pci/pcihp.h>
46*0Sstevel@tonic-gate #include <sys/pci/pci_obj.h>
47*0Sstevel@tonic-gate
48*0Sstevel@tonic-gate /*LINTLIBRARY*/
49*0Sstevel@tonic-gate
50*0Sstevel@tonic-gate static uint8_t pci_axq_hack_get8(ddi_acc_impl_t *handle, uint8_t *addr);
51*0Sstevel@tonic-gate static uint16_t pci_axq_hack_get16(ddi_acc_impl_t *handle, uint16_t *addr);
52*0Sstevel@tonic-gate static uint32_t pci_axq_hack_get32(ddi_acc_impl_t *handle, uint32_t *addr);
53*0Sstevel@tonic-gate static uint64_t pci_axq_hack_get64(ddi_acc_impl_t *handle, uint64_t *addr);
54*0Sstevel@tonic-gate static void pci_axq_hack_put8(ddi_acc_impl_t *handle, uint8_t *addr,
55*0Sstevel@tonic-gate uint8_t data);
56*0Sstevel@tonic-gate static void pci_axq_hack_put16(ddi_acc_impl_t *handle, uint16_t *addr,
57*0Sstevel@tonic-gate uint16_t data);
58*0Sstevel@tonic-gate static void pci_axq_hack_put32(ddi_acc_impl_t *handle, uint32_t *addr,
59*0Sstevel@tonic-gate uint32_t data);
60*0Sstevel@tonic-gate static void pci_axq_hack_put64(ddi_acc_impl_t *handle, uint64_t *addr,
61*0Sstevel@tonic-gate uint64_t data);
62*0Sstevel@tonic-gate static void pci_axq_hack_rep_get8(ddi_acc_impl_t *handle,
63*0Sstevel@tonic-gate uint8_t *host_addr, uint8_t *dev_addr,
64*0Sstevel@tonic-gate size_t repcount, uint_t flags);
65*0Sstevel@tonic-gate static void pci_axq_hack_rep_get16(ddi_acc_impl_t *handle,
66*0Sstevel@tonic-gate uint16_t *host_addr, uint16_t *dev_addr,
67*0Sstevel@tonic-gate size_t repcount, uint_t flags);
68*0Sstevel@tonic-gate static void pci_axq_hack_rep_get32(ddi_acc_impl_t *handle,
69*0Sstevel@tonic-gate uint32_t *host_addr, uint32_t *dev_addr,
70*0Sstevel@tonic-gate size_t repcount, uint_t flags);
71*0Sstevel@tonic-gate static void pci_axq_hack_rep_get64(ddi_acc_impl_t *handle,
72*0Sstevel@tonic-gate uint64_t *host_addr, uint64_t *dev_addr,
73*0Sstevel@tonic-gate size_t repcount, uint_t flags);
74*0Sstevel@tonic-gate static void pci_axq_hack_rep_put8(ddi_acc_impl_t *handle,
75*0Sstevel@tonic-gate uint8_t *host_addr, uint8_t *dev_addr,
76*0Sstevel@tonic-gate size_t repcount, uint_t flags);
77*0Sstevel@tonic-gate static void pci_axq_hack_rep_put16(ddi_acc_impl_t *handle,
78*0Sstevel@tonic-gate uint16_t *host_addr, uint16_t *dev_addr,
79*0Sstevel@tonic-gate size_t repcount, uint_t flags);
80*0Sstevel@tonic-gate static void pci_axq_hack_rep_put32(ddi_acc_impl_t *handle,
81*0Sstevel@tonic-gate uint32_t *host_addr, uint32_t *dev_addr,
82*0Sstevel@tonic-gate size_t repcount, uint_t flags);
83*0Sstevel@tonic-gate static void pci_axq_hack_rep_put64(ddi_acc_impl_t *handle,
84*0Sstevel@tonic-gate uint64_t *host_addr, uint64_t *dev_addr,
85*0Sstevel@tonic-gate size_t repcount, uint_t flags);
86*0Sstevel@tonic-gate
87*0Sstevel@tonic-gate /*
88*0Sstevel@tonic-gate * On Sunfire 15k systems with AXQs less than 6.1
89*0Sstevel@tonic-gate * we have to use special PIO routines that limit
90*0Sstevel@tonic-gate * the number of outstanding PIOs. We setup the
91*0Sstevel@tonic-gate * handle with pointers to our special functions
92*0Sstevel@tonic-gate * after it has been succesfully mapped by our
93*0Sstevel@tonic-gate * parent.
94*0Sstevel@tonic-gate */
95*0Sstevel@tonic-gate
96*0Sstevel@tonic-gate void
pci_axq_pio_limit(pbm_t * pbm_p)97*0Sstevel@tonic-gate pci_axq_pio_limit(pbm_t *pbm_p)
98*0Sstevel@tonic-gate {
99*0Sstevel@tonic-gate pci_t *pci_p = pbm_p->pbm_pci_p;
100*0Sstevel@tonic-gate dev_info_t *dip = pci_p->pci_dip;
101*0Sstevel@tonic-gate int (*axq_pio_workaround)(dev_info_t *) = NULL;
102*0Sstevel@tonic-gate
103*0Sstevel@tonic-gate axq_pio_workaround =
104*0Sstevel@tonic-gate (int (*)(dev_info_t *)) modgetsymvalue(
105*0Sstevel@tonic-gate "starcat_axq_pio_workaround", 0);
106*0Sstevel@tonic-gate
107*0Sstevel@tonic-gate if (axq_pio_workaround) {
108*0Sstevel@tonic-gate pbm_p->pbm_pio_limit = (axq_pio_workaround)(dip);
109*0Sstevel@tonic-gate pbm_p->pbm_pio_counter = pbm_p->pbm_pio_limit;
110*0Sstevel@tonic-gate } else
111*0Sstevel@tonic-gate pbm_p->pbm_pio_limit = 0;
112*0Sstevel@tonic-gate }
113*0Sstevel@tonic-gate
114*0Sstevel@tonic-gate void
pci_axq_setup(ddi_map_req_t * mp,pbm_t * pbm_p)115*0Sstevel@tonic-gate pci_axq_setup(ddi_map_req_t *mp, pbm_t *pbm_p)
116*0Sstevel@tonic-gate {
117*0Sstevel@tonic-gate ddi_acc_hdl_t *hp;
118*0Sstevel@tonic-gate ddi_acc_impl_t *ap;
119*0Sstevel@tonic-gate
120*0Sstevel@tonic-gate if (mp->map_op != DDI_MO_MAP_LOCKED)
121*0Sstevel@tonic-gate return;
122*0Sstevel@tonic-gate if (!pbm_p->pbm_pio_limit)
123*0Sstevel@tonic-gate return;
124*0Sstevel@tonic-gate
125*0Sstevel@tonic-gate hp = (ddi_acc_hdl_t *)mp->map_handlep;
126*0Sstevel@tonic-gate ap = (ddi_acc_impl_t *)hp->ah_platform_private;
127*0Sstevel@tonic-gate
128*0Sstevel@tonic-gate ap->ahi_get8 = pci_axq_hack_get8;
129*0Sstevel@tonic-gate ap->ahi_get16 = pci_axq_hack_get16;
130*0Sstevel@tonic-gate ap->ahi_get32 = pci_axq_hack_get32;
131*0Sstevel@tonic-gate ap->ahi_get64 = pci_axq_hack_get64;
132*0Sstevel@tonic-gate ap->ahi_put8 = pci_axq_hack_put8;
133*0Sstevel@tonic-gate ap->ahi_put16 = pci_axq_hack_put16;
134*0Sstevel@tonic-gate ap->ahi_put32 = pci_axq_hack_put32;
135*0Sstevel@tonic-gate ap->ahi_put64 = pci_axq_hack_put64;
136*0Sstevel@tonic-gate ap->ahi_rep_get8 = pci_axq_hack_rep_get8;
137*0Sstevel@tonic-gate ap->ahi_rep_get16 = pci_axq_hack_rep_get16;
138*0Sstevel@tonic-gate ap->ahi_rep_get32 = pci_axq_hack_rep_get32;
139*0Sstevel@tonic-gate ap->ahi_rep_get64 = pci_axq_hack_rep_get64;
140*0Sstevel@tonic-gate ap->ahi_rep_put8 = pci_axq_hack_rep_put8;
141*0Sstevel@tonic-gate ap->ahi_rep_put16 = pci_axq_hack_rep_put16;
142*0Sstevel@tonic-gate ap->ahi_rep_put32 = pci_axq_hack_rep_put32;
143*0Sstevel@tonic-gate ap->ahi_rep_put64 = pci_axq_hack_rep_put64;
144*0Sstevel@tonic-gate
145*0Sstevel@tonic-gate hp->ah_bus_private = (void *)pbm_p;
146*0Sstevel@tonic-gate }
147*0Sstevel@tonic-gate
148*0Sstevel@tonic-gate /*
149*0Sstevel@tonic-gate * get/put routines for SunFire 15K systems that have AXQ versions
150*0Sstevel@tonic-gate * less than 6.1. These routines limit the number of outsanding
151*0Sstevel@tonic-gate * PIOs issues across a PCI Bus.
152*0Sstevel@tonic-gate */
153*0Sstevel@tonic-gate static uint8_t
pci_axq_hack_get8(ddi_acc_impl_t * handle,uint8_t * addr)154*0Sstevel@tonic-gate pci_axq_hack_get8(ddi_acc_impl_t *handle, uint8_t *addr)
155*0Sstevel@tonic-gate {
156*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
157*0Sstevel@tonic-gate uint8_t data;
158*0Sstevel@tonic-gate uint32_t spl;
159*0Sstevel@tonic-gate
160*0Sstevel@tonic-gate spl = ddi_enter_critical();
161*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
162*0Sstevel@tonic-gate data = i_ddi_get8(handle, addr);
163*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
164*0Sstevel@tonic-gate ddi_exit_critical(spl);
165*0Sstevel@tonic-gate
166*0Sstevel@tonic-gate return (data);
167*0Sstevel@tonic-gate }
168*0Sstevel@tonic-gate
169*0Sstevel@tonic-gate static uint16_t
pci_axq_hack_get16(ddi_acc_impl_t * handle,uint16_t * addr)170*0Sstevel@tonic-gate pci_axq_hack_get16(ddi_acc_impl_t *handle, uint16_t *addr)
171*0Sstevel@tonic-gate {
172*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
173*0Sstevel@tonic-gate uint16_t data;
174*0Sstevel@tonic-gate uint32_t spl;
175*0Sstevel@tonic-gate
176*0Sstevel@tonic-gate spl = ddi_enter_critical();
177*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
178*0Sstevel@tonic-gate data = i_ddi_swap_get16(handle, addr);
179*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
180*0Sstevel@tonic-gate ddi_exit_critical(spl);
181*0Sstevel@tonic-gate
182*0Sstevel@tonic-gate return (data);
183*0Sstevel@tonic-gate }
184*0Sstevel@tonic-gate
185*0Sstevel@tonic-gate static uint32_t
pci_axq_hack_get32(ddi_acc_impl_t * handle,uint32_t * addr)186*0Sstevel@tonic-gate pci_axq_hack_get32(ddi_acc_impl_t *handle, uint32_t *addr)
187*0Sstevel@tonic-gate {
188*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
189*0Sstevel@tonic-gate uint32_t data;
190*0Sstevel@tonic-gate uint32_t spl;
191*0Sstevel@tonic-gate
192*0Sstevel@tonic-gate spl = ddi_enter_critical();
193*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
194*0Sstevel@tonic-gate data = i_ddi_swap_get32(handle, addr);
195*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
196*0Sstevel@tonic-gate ddi_exit_critical(spl);
197*0Sstevel@tonic-gate
198*0Sstevel@tonic-gate return (data);
199*0Sstevel@tonic-gate }
200*0Sstevel@tonic-gate
201*0Sstevel@tonic-gate static uint64_t
pci_axq_hack_get64(ddi_acc_impl_t * handle,uint64_t * addr)202*0Sstevel@tonic-gate pci_axq_hack_get64(ddi_acc_impl_t *handle, uint64_t *addr)
203*0Sstevel@tonic-gate {
204*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
205*0Sstevel@tonic-gate uint64_t data;
206*0Sstevel@tonic-gate uint32_t spl;
207*0Sstevel@tonic-gate
208*0Sstevel@tonic-gate spl = ddi_enter_critical();
209*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
210*0Sstevel@tonic-gate data = i_ddi_swap_get64(handle, addr);
211*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
212*0Sstevel@tonic-gate ddi_exit_critical(spl);
213*0Sstevel@tonic-gate
214*0Sstevel@tonic-gate return (data);
215*0Sstevel@tonic-gate }
216*0Sstevel@tonic-gate
217*0Sstevel@tonic-gate static void
pci_axq_hack_put8(ddi_acc_impl_t * handle,uint8_t * addr,uint8_t data)218*0Sstevel@tonic-gate pci_axq_hack_put8(ddi_acc_impl_t *handle, uint8_t *addr, uint8_t data)
219*0Sstevel@tonic-gate {
220*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
221*0Sstevel@tonic-gate uint32_t spl;
222*0Sstevel@tonic-gate
223*0Sstevel@tonic-gate spl = ddi_enter_critical();
224*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
225*0Sstevel@tonic-gate i_ddi_put8(handle, addr, data);
226*0Sstevel@tonic-gate membar_sync();
227*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
228*0Sstevel@tonic-gate ddi_exit_critical(spl);
229*0Sstevel@tonic-gate }
230*0Sstevel@tonic-gate
231*0Sstevel@tonic-gate static void
pci_axq_hack_put16(ddi_acc_impl_t * handle,uint16_t * addr,uint16_t data)232*0Sstevel@tonic-gate pci_axq_hack_put16(ddi_acc_impl_t *handle, uint16_t *addr, uint16_t data)
233*0Sstevel@tonic-gate {
234*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
235*0Sstevel@tonic-gate uint32_t spl;
236*0Sstevel@tonic-gate
237*0Sstevel@tonic-gate spl = ddi_enter_critical();
238*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
239*0Sstevel@tonic-gate i_ddi_swap_put16(handle, addr, data);
240*0Sstevel@tonic-gate membar_sync();
241*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
242*0Sstevel@tonic-gate ddi_exit_critical(spl);
243*0Sstevel@tonic-gate }
244*0Sstevel@tonic-gate
245*0Sstevel@tonic-gate static void
pci_axq_hack_put32(ddi_acc_impl_t * handle,uint32_t * addr,uint32_t data)246*0Sstevel@tonic-gate pci_axq_hack_put32(ddi_acc_impl_t *handle, uint32_t *addr, uint32_t data)
247*0Sstevel@tonic-gate {
248*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
249*0Sstevel@tonic-gate uint32_t spl;
250*0Sstevel@tonic-gate
251*0Sstevel@tonic-gate spl = ddi_enter_critical();
252*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
253*0Sstevel@tonic-gate i_ddi_swap_put32(handle, addr, data);
254*0Sstevel@tonic-gate membar_sync();
255*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
256*0Sstevel@tonic-gate ddi_exit_critical(spl);
257*0Sstevel@tonic-gate }
258*0Sstevel@tonic-gate
259*0Sstevel@tonic-gate static void
pci_axq_hack_put64(ddi_acc_impl_t * handle,uint64_t * addr,uint64_t data)260*0Sstevel@tonic-gate pci_axq_hack_put64(ddi_acc_impl_t *handle, uint64_t *addr, uint64_t data)
261*0Sstevel@tonic-gate {
262*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
263*0Sstevel@tonic-gate uint32_t spl;
264*0Sstevel@tonic-gate
265*0Sstevel@tonic-gate spl = ddi_enter_critical();
266*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
267*0Sstevel@tonic-gate i_ddi_swap_put64(handle, addr, data);
268*0Sstevel@tonic-gate membar_sync();
269*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
270*0Sstevel@tonic-gate ddi_exit_critical(spl);
271*0Sstevel@tonic-gate }
272*0Sstevel@tonic-gate
273*0Sstevel@tonic-gate static void
pci_axq_hack_rep_get8(ddi_acc_impl_t * handle,uint8_t * host_addr,uint8_t * dev_addr,size_t repcount,uint_t flags)274*0Sstevel@tonic-gate pci_axq_hack_rep_get8(ddi_acc_impl_t *handle, uint8_t *host_addr,
275*0Sstevel@tonic-gate uint8_t *dev_addr, size_t repcount, uint_t flags)
276*0Sstevel@tonic-gate {
277*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
278*0Sstevel@tonic-gate uint32_t spl;
279*0Sstevel@tonic-gate
280*0Sstevel@tonic-gate spl = ddi_enter_critical();
281*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
282*0Sstevel@tonic-gate i_ddi_rep_get8(handle, host_addr, dev_addr, repcount, flags);
283*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
284*0Sstevel@tonic-gate ddi_exit_critical(spl);
285*0Sstevel@tonic-gate }
286*0Sstevel@tonic-gate
287*0Sstevel@tonic-gate static void
pci_axq_hack_rep_get16(ddi_acc_impl_t * handle,uint16_t * host_addr,uint16_t * dev_addr,size_t repcount,uint_t flags)288*0Sstevel@tonic-gate pci_axq_hack_rep_get16(ddi_acc_impl_t *handle, uint16_t *host_addr,
289*0Sstevel@tonic-gate uint16_t *dev_addr, size_t repcount, uint_t flags)
290*0Sstevel@tonic-gate {
291*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
292*0Sstevel@tonic-gate uint32_t spl;
293*0Sstevel@tonic-gate
294*0Sstevel@tonic-gate spl = ddi_enter_critical();
295*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
296*0Sstevel@tonic-gate i_ddi_swap_rep_get16(handle, host_addr, dev_addr, repcount, flags);
297*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
298*0Sstevel@tonic-gate ddi_exit_critical(spl);
299*0Sstevel@tonic-gate }
300*0Sstevel@tonic-gate
301*0Sstevel@tonic-gate static void
pci_axq_hack_rep_get32(ddi_acc_impl_t * handle,uint32_t * host_addr,uint32_t * dev_addr,size_t repcount,uint_t flags)302*0Sstevel@tonic-gate pci_axq_hack_rep_get32(ddi_acc_impl_t *handle, uint32_t *host_addr,
303*0Sstevel@tonic-gate uint32_t *dev_addr, size_t repcount, uint_t flags)
304*0Sstevel@tonic-gate {
305*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
306*0Sstevel@tonic-gate uint32_t spl;
307*0Sstevel@tonic-gate
308*0Sstevel@tonic-gate spl = ddi_enter_critical();
309*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
310*0Sstevel@tonic-gate i_ddi_swap_rep_get32(handle, host_addr, dev_addr, repcount, flags);
311*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
312*0Sstevel@tonic-gate ddi_exit_critical(spl);
313*0Sstevel@tonic-gate }
314*0Sstevel@tonic-gate
315*0Sstevel@tonic-gate static void
pci_axq_hack_rep_get64(ddi_acc_impl_t * handle,uint64_t * host_addr,uint64_t * dev_addr,size_t repcount,uint_t flags)316*0Sstevel@tonic-gate pci_axq_hack_rep_get64(ddi_acc_impl_t *handle, uint64_t *host_addr,
317*0Sstevel@tonic-gate uint64_t *dev_addr, size_t repcount, uint_t flags)
318*0Sstevel@tonic-gate {
319*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
320*0Sstevel@tonic-gate uint32_t spl;
321*0Sstevel@tonic-gate
322*0Sstevel@tonic-gate spl = ddi_enter_critical();
323*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
324*0Sstevel@tonic-gate i_ddi_swap_rep_get64(handle, host_addr, dev_addr, repcount, flags);
325*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
326*0Sstevel@tonic-gate ddi_exit_critical(spl);
327*0Sstevel@tonic-gate }
328*0Sstevel@tonic-gate
329*0Sstevel@tonic-gate static void
pci_axq_hack_rep_put8(ddi_acc_impl_t * handle,uint8_t * host_addr,uint8_t * dev_addr,size_t repcount,uint_t flags)330*0Sstevel@tonic-gate pci_axq_hack_rep_put8(ddi_acc_impl_t *handle, uint8_t *host_addr,
331*0Sstevel@tonic-gate uint8_t *dev_addr, size_t repcount, uint_t flags)
332*0Sstevel@tonic-gate {
333*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
334*0Sstevel@tonic-gate uint32_t spl;
335*0Sstevel@tonic-gate
336*0Sstevel@tonic-gate spl = ddi_enter_critical();
337*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
338*0Sstevel@tonic-gate while (repcount--) {
339*0Sstevel@tonic-gate i_ddi_put8(handle, dev_addr, *host_addr);
340*0Sstevel@tonic-gate membar_sync();
341*0Sstevel@tonic-gate if (flags == DDI_DEV_AUTOINCR)
342*0Sstevel@tonic-gate dev_addr++;
343*0Sstevel@tonic-gate host_addr++;
344*0Sstevel@tonic-gate }
345*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
346*0Sstevel@tonic-gate ddi_exit_critical(spl);
347*0Sstevel@tonic-gate }
348*0Sstevel@tonic-gate
349*0Sstevel@tonic-gate static void
pci_axq_hack_rep_put16(ddi_acc_impl_t * handle,uint16_t * host_addr,uint16_t * dev_addr,size_t repcount,uint_t flags)350*0Sstevel@tonic-gate pci_axq_hack_rep_put16(ddi_acc_impl_t *handle, uint16_t *host_addr,
351*0Sstevel@tonic-gate uint16_t *dev_addr, size_t repcount, uint_t flags)
352*0Sstevel@tonic-gate {
353*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
354*0Sstevel@tonic-gate uint32_t spl;
355*0Sstevel@tonic-gate
356*0Sstevel@tonic-gate spl = ddi_enter_critical();
357*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
358*0Sstevel@tonic-gate while (repcount--) {
359*0Sstevel@tonic-gate i_ddi_put16(handle, dev_addr, *host_addr);
360*0Sstevel@tonic-gate membar_sync();
361*0Sstevel@tonic-gate if (flags == DDI_DEV_AUTOINCR)
362*0Sstevel@tonic-gate dev_addr++;
363*0Sstevel@tonic-gate host_addr++;
364*0Sstevel@tonic-gate }
365*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
366*0Sstevel@tonic-gate ddi_exit_critical(spl);
367*0Sstevel@tonic-gate }
368*0Sstevel@tonic-gate
369*0Sstevel@tonic-gate static void
pci_axq_hack_rep_put32(ddi_acc_impl_t * handle,uint32_t * host_addr,uint32_t * dev_addr,size_t repcount,uint_t flags)370*0Sstevel@tonic-gate pci_axq_hack_rep_put32(ddi_acc_impl_t *handle, uint32_t *host_addr,
371*0Sstevel@tonic-gate uint32_t *dev_addr, size_t repcount, uint_t flags)
372*0Sstevel@tonic-gate {
373*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
374*0Sstevel@tonic-gate uint32_t spl;
375*0Sstevel@tonic-gate
376*0Sstevel@tonic-gate spl = ddi_enter_critical();
377*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
378*0Sstevel@tonic-gate while (repcount--) {
379*0Sstevel@tonic-gate i_ddi_put32(handle, dev_addr, *host_addr);
380*0Sstevel@tonic-gate membar_sync();
381*0Sstevel@tonic-gate if (flags == DDI_DEV_AUTOINCR)
382*0Sstevel@tonic-gate dev_addr++;
383*0Sstevel@tonic-gate host_addr++;
384*0Sstevel@tonic-gate }
385*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
386*0Sstevel@tonic-gate ddi_exit_critical(spl);
387*0Sstevel@tonic-gate }
388*0Sstevel@tonic-gate static void
pci_axq_hack_rep_put64(ddi_acc_impl_t * handle,uint64_t * host_addr,uint64_t * dev_addr,size_t repcount,uint_t flags)389*0Sstevel@tonic-gate pci_axq_hack_rep_put64(ddi_acc_impl_t *handle, uint64_t *host_addr,
390*0Sstevel@tonic-gate uint64_t *dev_addr, size_t repcount, uint_t flags)
391*0Sstevel@tonic-gate {
392*0Sstevel@tonic-gate pbm_t *pbm_p = (pbm_t *)handle->ahi_common.ah_bus_private;
393*0Sstevel@tonic-gate uint32_t spl;
394*0Sstevel@tonic-gate
395*0Sstevel@tonic-gate spl = ddi_enter_critical();
396*0Sstevel@tonic-gate PIO_LIMIT_ENTER(pbm_p);
397*0Sstevel@tonic-gate while (repcount--) {
398*0Sstevel@tonic-gate i_ddi_put64(handle, dev_addr, *host_addr);
399*0Sstevel@tonic-gate membar_sync();
400*0Sstevel@tonic-gate if (flags == DDI_DEV_AUTOINCR)
401*0Sstevel@tonic-gate dev_addr++;
402*0Sstevel@tonic-gate host_addr++;
403*0Sstevel@tonic-gate }
404*0Sstevel@tonic-gate PIO_LIMIT_EXIT(pbm_p);
405*0Sstevel@tonic-gate ddi_exit_critical(spl);
406*0Sstevel@tonic-gate }
407