10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51455Sandrei * Common Development and Distribution License (the "License"). 61455Sandrei * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 221455Sandrei * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate #ifndef _SYS_INTR_H 270Sstevel@tonic-gate #define _SYS_INTR_H 280Sstevel@tonic-gate 290Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 300Sstevel@tonic-gate 310Sstevel@tonic-gate #ifdef __cplusplus 320Sstevel@tonic-gate extern "C" { 330Sstevel@tonic-gate #endif 340Sstevel@tonic-gate 350Sstevel@tonic-gate /* 36*2973Sgovinda * Each cpu allocates two arrays, intr_head[] and intr_tail[], with the 37*2973Sgovinda * size of PIL_LEVELS each. The entry 0 of these arrays are reserved. 380Sstevel@tonic-gate * 390Sstevel@tonic-gate * The entries 1-15 of the arrays are the head and the tail of interrupt 400Sstevel@tonic-gate * level 1-15 request queues. 410Sstevel@tonic-gate */ 42*2973Sgovinda #define PIL_LEVELS 16 /* 0 : reserved */ 430Sstevel@tonic-gate /* 1-15 : for the pil level 1-15 */ 440Sstevel@tonic-gate 450Sstevel@tonic-gate #define PIL_1 1 460Sstevel@tonic-gate #define PIL_2 2 470Sstevel@tonic-gate #define PIL_3 3 480Sstevel@tonic-gate #define PIL_4 4 490Sstevel@tonic-gate #define PIL_5 5 500Sstevel@tonic-gate #define PIL_6 6 510Sstevel@tonic-gate #define PIL_7 7 520Sstevel@tonic-gate #define PIL_8 8 530Sstevel@tonic-gate #define PIL_9 9 540Sstevel@tonic-gate #define PIL_10 10 550Sstevel@tonic-gate #define PIL_11 11 560Sstevel@tonic-gate #define PIL_12 12 570Sstevel@tonic-gate #define PIL_13 13 580Sstevel@tonic-gate #define PIL_14 14 590Sstevel@tonic-gate #define PIL_15 15 600Sstevel@tonic-gate 610Sstevel@tonic-gate #ifndef _ASM 62*2973Sgovinda extern uint64_t poke_cpu_inum; 630Sstevel@tonic-gate extern void intr_init(struct cpu *); 640Sstevel@tonic-gate #endif /* !_ASM */ 650Sstevel@tonic-gate 660Sstevel@tonic-gate #ifdef __cplusplus 670Sstevel@tonic-gate } 680Sstevel@tonic-gate #endif 690Sstevel@tonic-gate 700Sstevel@tonic-gate #endif /* _SYS_INTR_H */ 71