xref: /onnv-gate/usr/src/uts/intel/sys/pcb.h (revision 13134:8315ff49e22e)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
54503Ssudheer  * Common Development and Distribution License (the "License").
64503Ssudheer  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
2110230SRoger.Faulkner@Sun.COM 
220Sstevel@tonic-gate /*
23*13134Skuriakose.kuruvilla@oracle.com  * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
240Sstevel@tonic-gate  */
250Sstevel@tonic-gate 
260Sstevel@tonic-gate #ifndef _SYS_PCB_H
270Sstevel@tonic-gate #define	_SYS_PCB_H
280Sstevel@tonic-gate 
290Sstevel@tonic-gate #include <sys/regset.h>
300Sstevel@tonic-gate #include <sys/segments.h>
310Sstevel@tonic-gate 
320Sstevel@tonic-gate #ifdef	__cplusplus
330Sstevel@tonic-gate extern "C" {
340Sstevel@tonic-gate #endif
350Sstevel@tonic-gate 
360Sstevel@tonic-gate #ifndef _ASM
370Sstevel@tonic-gate typedef struct fpu_ctx {
380Sstevel@tonic-gate 	kfpu_t		fpu_regs;	/* kernel save area for FPU */
39*13134Skuriakose.kuruvilla@oracle.com 	uint64_t	fpu_xsave_mask;	/* xsave mask for FPU/SSE/AVX */
40*13134Skuriakose.kuruvilla@oracle.com #if defined(__i386)
41*13134Skuriakose.kuruvilla@oracle.com 	uint64_t	fpu_padding;	/* fix 32bit libmicro regression */
42*13134Skuriakose.kuruvilla@oracle.com #endif
430Sstevel@tonic-gate 	uint_t		fpu_flags;	/* FPU state flags */
440Sstevel@tonic-gate } fpu_ctx_t;
450Sstevel@tonic-gate 
460Sstevel@tonic-gate typedef struct pcb {
470Sstevel@tonic-gate 	fpu_ctx_t	pcb_fpu;	/* fpu state */
480Sstevel@tonic-gate 	uint_t		pcb_flags;	/* state flags; cleared on fork */
490Sstevel@tonic-gate 	greg_t		pcb_drstat;	/* status debug register (%dr6) */
500Sstevel@tonic-gate 	unsigned char	pcb_instr;	/* /proc: instruction at stop */
510Sstevel@tonic-gate #if defined(__amd64)
524503Ssudheer 	unsigned char	pcb_rupdate;	/* new register values in pcb -> regs */
530Sstevel@tonic-gate 	uintptr_t	pcb_fsbase;
540Sstevel@tonic-gate 	uintptr_t	pcb_gsbase;
550Sstevel@tonic-gate 	selector_t	pcb_ds;
560Sstevel@tonic-gate 	selector_t	pcb_es;
570Sstevel@tonic-gate 	selector_t	pcb_fs;
580Sstevel@tonic-gate 	selector_t	pcb_gs;
590Sstevel@tonic-gate #endif /* __amd64 */
600Sstevel@tonic-gate 	user_desc_t	pcb_fsdesc;	/* private per-lwp %fs descriptors */
610Sstevel@tonic-gate 	user_desc_t	pcb_gsdesc;	/* private per-lwp %gs descriptors */
620Sstevel@tonic-gate } pcb_t;
630Sstevel@tonic-gate 
640Sstevel@tonic-gate #endif /* ! _ASM */
650Sstevel@tonic-gate 
660Sstevel@tonic-gate /* pcb_flags */
670Sstevel@tonic-gate #define	DEBUG_PENDING	0x02	/* single-step of lcall for a sys call */
6810230SRoger.Faulkner@Sun.COM #define	PRSTOP_CALLED	0x04	/* prstop() has been called for this lwp */
690Sstevel@tonic-gate #define	INSTR_VALID	0x08	/* value in pcb_instr is valid (/proc) */
700Sstevel@tonic-gate #define	NORMAL_STEP	0x10	/* normal debugger-requested single-step */
710Sstevel@tonic-gate #define	WATCH_STEP	0x20	/* single-stepping in watchpoint emulation */
720Sstevel@tonic-gate #define	CPC_OVERFLOW	0x40	/* performance counters overflowed */
731468Smarx #define	REQUEST_STEP	0x100	/* request pending to single-step this lwp */
741468Smarx #define	REQUEST_NOSTEP	0x200	/* request pending to disable single-step */
755254Sgavinm #define	ASYNC_HWERR	0x400	/* hardware error has corrupted context  */
760Sstevel@tonic-gate 
770Sstevel@tonic-gate /* fpu_flags */
780Sstevel@tonic-gate #define	FPU_EN		0x1	/* flag signifying fpu in use */
790Sstevel@tonic-gate #define	FPU_VALID	0x2	/* fpu_regs has valid fpu state */
800Sstevel@tonic-gate #define	FPU_MODIFIED	0x4	/* fpu_regs is modified (/proc) */
810Sstevel@tonic-gate 
820Sstevel@tonic-gate #define	FPU_INVALID	0x0	/* fpu context is not in use */
830Sstevel@tonic-gate 
840Sstevel@tonic-gate /* fpu_flags */
850Sstevel@tonic-gate 
860Sstevel@tonic-gate #ifdef	__cplusplus
870Sstevel@tonic-gate }
880Sstevel@tonic-gate #endif
890Sstevel@tonic-gate 
900Sstevel@tonic-gate #endif	/* _SYS_PCB_H */
91