xref: /onnv-gate/usr/src/uts/intel/sys/mc_intel.h (revision 10831:e65585ea170c)
15254Sgavinm /*
25254Sgavinm  * CDDL HEADER START
35254Sgavinm  *
45254Sgavinm  * The contents of this file are subject to the terms of the
55254Sgavinm  * Common Development and Distribution License (the "License").
65254Sgavinm  * You may not use this file except in compliance with the License.
75254Sgavinm  *
85254Sgavinm  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
95254Sgavinm  * or http://www.opensolaris.org/os/licensing.
105254Sgavinm  * See the License for the specific language governing permissions
115254Sgavinm  * and limitations under the License.
125254Sgavinm  *
135254Sgavinm  * When distributing Covered Code, include this CDDL HEADER in each
145254Sgavinm  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
155254Sgavinm  * If applicable, add the following below this CDDL HEADER, with the
165254Sgavinm  * fields enclosed by brackets "[]" replaced with your own identifying
175254Sgavinm  * information: Portions Copyright [yyyy] [name of copyright owner]
185254Sgavinm  *
195254Sgavinm  * CDDL HEADER END
205254Sgavinm  */
215254Sgavinm 
225254Sgavinm /*
238977SAdrian.Frost@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
245254Sgavinm  * Use is subject to license terms.
255254Sgavinm  */
265254Sgavinm 
275254Sgavinm #ifndef _MC_INTEL_H
285254Sgavinm #define	_MC_INTEL_H
295254Sgavinm 
305254Sgavinm #ifdef __cplusplus
315254Sgavinm extern "C" {
325254Sgavinm #endif
335254Sgavinm 
345254Sgavinm #define	FM_EREPORT_CPU_INTEL	"intel"
355254Sgavinm 
365254Sgavinm #define	MCINTEL_NVLIST_VERSTR	"mcintel-nvlist-version"
375254Sgavinm #define	MCINTEL_NVLIST_VERS0	0
385254Sgavinm 
395254Sgavinm #define	MCINTEL_NVLIST_VERS	MCINTEL_NVLIST_VERS0
405254Sgavinm 
417349SAdrian.Frost@Sun.COM #define	MCINTEL_NVLIST_MEM	"memory-controller"
427349SAdrian.Frost@Sun.COM #define	MCINTEL_NVLIST_NMEM	"memory-controllers"
435254Sgavinm #define	MCINTEL_NVLIST_MC	"memory-channels"
445254Sgavinm #define	MCINTEL_NVLIST_DIMMS	"memory-dimms"
455254Sgavinm #define	MCINTEL_NVLIST_DIMMSZ	"memory-dimm-size"
467349SAdrian.Frost@Sun.COM #define	MCINTEL_NVLIST_NRANKS	"dimm-max-ranks"
47*10831SYanmin.Sun@Sun.COM #define	MCINTEL_NVLIST_NDIMMS	"dimm-max-dimms"
485254Sgavinm #define	MCINTEL_NVLIST_RANKS	"dimm-ranks"
4910049SVuong.Nguyen@Sun.COM #define	MCINTEL_NVLIST_1ST_RANK	"dimm-start-rank"
50*10831SYanmin.Sun@Sun.COM #define	MCINTEL_NVLIST_DIMM_NUM	"dimm-number"
515254Sgavinm #define	MCINTEL_NVLIST_ROWS	"dimm-rows"
525254Sgavinm #define	MCINTEL_NVLIST_COL	"dimm-column"
535254Sgavinm #define	MCINTEL_NVLIST_BANK	"dimm-banks"
545254Sgavinm #define	MCINTEL_NVLIST_WIDTH	"dimm-width"
555254Sgavinm #define	MCINTEL_NVLIST_MID	"dimm-manufacture-id"
565254Sgavinm #define	MCINTEL_NVLIST_MLOC	"dimm-manufacture-location"
575254Sgavinm #define	MCINTEL_NVLIST_MWEEK	"dimm-manufacture-week"
585254Sgavinm #define	MCINTEL_NVLIST_MYEAR	"dimm-manufacture-year"
595254Sgavinm #define	MCINTEL_NVLIST_SERIALNO	"dimm-serial-number"
605254Sgavinm #define	MCINTEL_NVLIST_PARTNO	"dimm-part-number"
615254Sgavinm #define	MCINTEL_NVLIST_REV	"dimm-part-rev"
625254Sgavinm 
635254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FERR_GLOBAL		"ferr_global"
645254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NERR_GLOBAL		"nerr_global"
655254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FSB			"fsb"
665254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_FSB		"ferr_fat_fsb"
675254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_FSB		"nerr_fat_fsb"
685254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_FSB		"ferr_nf_fsb"
695254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_FSB		"nerr_nf_fsb"
705254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFSB			"nrecfsb"
715254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFSB_ADDR		"nrecfsb_addr"
725254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECFSB			"recfsb"
735254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PEX			"pex"
745254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PEX_FAT_FERR		"pex_fat_ferr"
755254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PEX_FAT_NERR		"pex_fat_nerr"
765254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PEX_NF_CORR_FERR	"pex_nf_corr_ferr"
775254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PEX_NF_CORR_NERR	"pex_nf_corr_nerr"
785254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_UNCERRSEV		"uncerrsev"
795254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RPERRSTS		"rperrsts"
805254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RPERRSID		"rperrsid"
815254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_UNCERRSTS		"uncerrsts"
825254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_AERRCAPCTRL		"aerrcapctrl"
835254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_CORERRSTS		"corerrsts"
845254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PEXDEVSTS		"pexdevsts"
855254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_INT		"ferr_fat_int"
865254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_INT		"ferr_nf_int"
875254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_INT		"nerr_fat_int"
885254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_INT		"nerr_nf_int"
895254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECINT			"nrecint"
905254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECINT			"recint"
915254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECSF			"nrecsf"
925254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECSF			"recsf"
935254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RANK			"rank"
945254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BANK			"bank"
955254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_CAS			"cas"
965254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RAS			"ras"
975254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_FBD		"ferr_fat_fbd"
985254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_FBD		"nerr_fat_fbd"
9910049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_VALIDLOG		"validlog"
1005254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECMEMA		"nrecmema"
1015254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECMEMB		"nrecmemb"
1025254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFGLOG		"nrecfglog"
1035254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDA		"nrecfbda"
1045254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDB		"nrecfbdb"
1055254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDC		"nrecfbdc"
1065254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDD		"nrecfbdd"
1075254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDE		"nrecfbde"
1085761Saf #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDF		"nrecfbdf"
1095254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_SPCPC			"spcpc"
1105254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_SPCPS			"spcps"
1115254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_UERRCNT			"uerrcnt"
1125254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_UERRCNT_LAST		"uerrcnt_last"
11310049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_BADRAM			"badram"
1145254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BADRAMA			"badrama"
1155254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BADRAMB			"badramb"
1165254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BADCNT			"badcnt"
1175254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_MC			"mc"
1185254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_MCA			"mca"
1195254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_TOLM			"tolm"
1205254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_MIR			"mir"
1215254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_MTR			"mtr"
1225254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_DMIR			"dmir"
1235254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_FBD		"ferr_nf_fbd"
1245254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_FBD		"nerr_nf_fbd"
12510049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_MEM		"ferr_nf_mem"
12610049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_MEM		"nerr_nf_mem"
1275254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECMEMA			"recmema"
1285254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECMEMB			"recmemb"
12910049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_REDMEMA			"redmema"
13010049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_REDMEMB			"redmemb"
1315254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECFGLOG		"recfglog"
1325254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECFBDA			"recfbda"
1335254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECFBDB			"recfbdb"
1345254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECFBDC			"recfbdc"
1355254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECFBDD			"recfbdd"
1365254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_RECFBDE			"recfbde"
1375761Saf #define	FM_EREPORT_PAYLOAD_NAME_RECFBDF			"recfbdf"
1385254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_CERRCNT			"cerrcnt"
1395254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_CERRCNT_LAST		"cerrcnt_last"
14010049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_CERRCNT_EXT		"cerrcnt_ext"
14110049SVuong.Nguyen@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_CERRCNT_EXT_LAST	"cerrcnt_ext_last"
1426359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTA		"cerrcnta"
1436359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTB		"cerrcntb"
1446359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTC		"cerrcntc"
1456359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTD		"cerrcntd"
1466359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTA_LAST		"cerrcnta_last"
1476359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTB_LAST		"cerrcntb_last"
1486359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTC_LAST		"cerrcntc_last"
1496359Saf #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTD_LAST		"cerrcntd_last"
1505254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PCISTS			"pcists"
1515254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_PEXDEVSTS		"pexdevsts"
1525254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_ERROR_NO		"intel-error-list"
1535254Sgavinm 
1546359Saf #define	FM_EREPORT_PAYLOAD_NAME_CTSTS			"ctsts"
1556359Saf #define	FM_EREPORT_PAYLOAD_NAME_THRTSTS			"thrtsts"
1566359Saf #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_THR		"ferr_fat_thr"
1576359Saf #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_THR		"nerr_fat_thr"
1586359Saf #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_THR		"ferr_nf_thr"
1596359Saf #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_THR		"nerr_nf_thr"
1606359Saf 
1615254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_ADDR			"addr"
1625254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BANK_NUM		"bank-number"
1635254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BANK_MISC		"bank-misc"
1645254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BANK_STAT		"bank-status"
1655254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_BANK_OFFSET		"bank-offset"
1665254Sgavinm #define	FM_EREPORT_PAYLOAD_NAME_MC_TYPE			"mc-type"
1675254Sgavinm #define	FM_EREPORT_PAYLOAD_CPUID			"cpuid"
1685254Sgavinm 
1695254Sgavinm #define	FM_EREPORT_PAYLOAD_BQR				"Bus-queue-request"
1705254Sgavinm #define	FM_EREPORT_PAYLOAD_BQET				"Bus-queue-error-type"
1715254Sgavinm #define	FM_EREPORT_PAYLOAD_FRC				"FRC-error"
1725254Sgavinm #define	FM_EREPORT_PAYLOAD_BERR				"BERR"
1735254Sgavinm #define	FM_EREPORT_PAYLOAD_INT_BINT			"Internal-BINT"
1745254Sgavinm #define	FM_EREPORT_PAYLOAD_EXT_BINT			"External-BINT"
1755254Sgavinm #define	FM_EREPORT_PAYLOAD_BUS_BINT			"Bus-BINT"
1765254Sgavinm #define	FM_EREPORT_PAYLOAD_TO_BINT			"Timeout-BINT"
1775254Sgavinm #define	FM_EREPORT_PAYLOAD_HARD				"Hard-error"
1785254Sgavinm #define	FM_EREPORT_PAYLOAD_IERR				"IERR"
1795254Sgavinm #define	FM_EREPORT_PAYLOAD_AERR				"AERR"
1805254Sgavinm #define	FM_EREPORT_PAYLOAD_UERR				"UERR"
1815254Sgavinm #define	FM_EREPORT_PAYLOAD_CECC				"CECC"
1825254Sgavinm #define	FM_EREPORT_PAYLOAD_UECC				"UECC"
1835254Sgavinm #define	FM_EREPORT_PAYLOAD_ECC_SYND			"ECC-syndrome"
1845254Sgavinm 
1855254Sgavinm #define	FM_EREPORT_PAYLOAD_FSB_PARITY			"fsb-address-parity"
1865254Sgavinm #define	FM_EREPORT_PAYLOAD_RESP_HF			"response-hard-fail"
1875254Sgavinm #define	FM_EREPORT_PAYLOAD_RESP_PARITY			"response-parity"
1885254Sgavinm #define	FM_EREPORT_PAYLOAD_DATA_PARITY			"bus-data-parity"
1895254Sgavinm #define	FM_EREPORT_PAYLOAD_INV_PIC			"invalid-pic-request"
1905254Sgavinm #define	FM_EREPORT_PAYLOAD_PAD_SM			"pad-state-machine"
1915254Sgavinm #define	FM_EREPORT_PAYLOAD_PAD_SG			"pad-strobe-glitch"
1925254Sgavinm 
1935254Sgavinm #define	FM_EREPORT_PAYLOAD_TAG				"tag-error"
1945254Sgavinm #define	FM_EREPORT_PAYLOAD_TAG_CLEAN			"clean"
1955254Sgavinm #define	FM_EREPORT_PAYLOAD_TAG_HIT			"hit"
1965254Sgavinm #define	FM_EREPORT_PAYLOAD_TAG_MISS			"miss"
1975254Sgavinm #define	FM_EREPORT_PAYLOAD_DATA				"data-error"
1985254Sgavinm #define	FM_EREPORT_PAYLOAD_DATA_SINGLE			"single-bit"
1995254Sgavinm #define	FM_EREPORT_PAYLOAD_DATA_DBL_CLEAN		"double-bit-clean"
2005254Sgavinm #define	FM_EREPORT_PAYLOAD_DATA_DBL_MOD			"double-bit-modified"
2015254Sgavinm #define	FM_EREPORT_PAYLOAD_L3				"l3-cache"
2025254Sgavinm #define	FM_EREPORT_PAYLOAD_INV_PIC			"invalid-pic-request"
2035254Sgavinm #define	FM_EREPORT_PAYLOAD_CACHE_NERRORS		"cache-error-count"
2045254Sgavinm 
2057349SAdrian.Frost@Sun.COM #define	FM_EREPORT_PAYLOAD_NAME_RESOURCE		"resource"
2067349SAdrian.Frost@Sun.COM #define	FM_EREPORT_PAYLOAD_MEM_ECC_COUNTER_THIS	"mem_cor_ecc_counter"
2077349SAdrian.Frost@Sun.COM #define	FM_EREPORT_PAYLOAD_MEM_ECC_COUNTER_LAST	"mem_cor_ecc_counter_last"
2087349SAdrian.Frost@Sun.COM 
2095254Sgavinm #define	INTEL_NB_5000P	0x25d88086
2105254Sgavinm #define	INTEL_NB_5000V	0x25d48086
2115254Sgavinm #define	INTEL_NB_5000X	0x25c08086
2125254Sgavinm #define	INTEL_NB_5000Z	0x25d08086
21310049SVuong.Nguyen@Sun.COM #define	INTEL_NB_5100	0x65c08086
2146359Saf #define	INTEL_NB_5400	0x40008086
2156359Saf #define	INTEL_NB_5400A	0x40018086
2166359Saf #define	INTEL_NB_5400B	0x40038086
2175254Sgavinm #define	INTEL_NB_7300	0x36008086
2185254Sgavinm 
2197349SAdrian.Frost@Sun.COM #define	INTEL_NHM	0x2c408086
2207349SAdrian.Frost@Sun.COM #define	INTEL_QP_IO	0x34008086
2217349SAdrian.Frost@Sun.COM #define	INTEL_QP_36D	0x34068086
2227349SAdrian.Frost@Sun.COM #define	INTEL_QP_24D	0x34038086
2238977SAdrian.Frost@Sun.COM #define	INTEL_QP_WP	0x34058086
2248977SAdrian.Frost@Sun.COM #define	INTEL_QP_U1	0x34018086
2258977SAdrian.Frost@Sun.COM #define	INTEL_QP_U2	0x34028086
2268977SAdrian.Frost@Sun.COM #define	INTEL_QP_U3	0x34048086
2278977SAdrian.Frost@Sun.COM #define	INTEL_QP_U4	0x34078086
22810556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF	0x37208086
22910556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF0	0x37008086
23010556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF1	0x37018086
23110556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF2	0x37028086
23210556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF3	0x37038086
23310556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF4	0x37048086
23410556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF5	0x37058086
23510556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF6	0x37068086
23610556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF7	0x37078086
23710556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF8	0x37088086
23810556SAdrian.Frost@Sun.COM #define	INTEL_QP_JF9	0x37098086
23910556SAdrian.Frost@Sun.COM #define	INTEL_QP_JFa	0x370a8086
24010556SAdrian.Frost@Sun.COM #define	INTEL_QP_JFb	0x370b8086
24110556SAdrian.Frost@Sun.COM #define	INTEL_QP_JFc	0x370c8086
24210556SAdrian.Frost@Sun.COM #define	INTEL_QP_JFd	0x370d8086
24310556SAdrian.Frost@Sun.COM #define	INTEL_QP_JFe	0x370e8086
24410556SAdrian.Frost@Sun.COM #define	INTEL_QP_JFf	0x370f8086
2457349SAdrian.Frost@Sun.COM 
2467349SAdrian.Frost@Sun.COM /* Intel QuickPath Bus Interconnect Errors */
2477349SAdrian.Frost@Sun.COM 
2487349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_HEADER_PARITY		(1 << 16)
2497349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_DATA_PARITY		(1 << 17)
2507349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_RETRIES_EXCEEDED	(1 << 18)
2517349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_POISON		(1 << 19)
2527349SAdrian.Frost@Sun.COM 
2537349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_UNSUPPORTED_MSG	(1 << 22)
2547349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_UNSUPPORTED_CREDIT	(1 << 23)
2557349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_FLIT_BUF_OVER		(1 << 24)
2567349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_FAILED_RESPONSE	(1 << 25)
2577349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_QP_CLOCK_JITTER		(1 << 26)
2587349SAdrian.Frost@Sun.COM 
2597349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_QP_CLASS		0x000000ff
2607349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_QP_RTID		0x00003f00
2617349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_QP_RHNID		0x00070000
2627349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_QP_IIB		0x01000000
2637349SAdrian.Frost@Sun.COM 
2647349SAdrian.Frost@Sun.COM /* Intel QuickPath Memory Errors */
2657349SAdrian.Frost@Sun.COM 
2667349SAdrian.Frost@Sun.COM #define	MCAX86_COMPOUND_BUS_MEMORY		0x0080
2677349SAdrian.Frost@Sun.COM #define	MCAX86_COMPOUND_BUS_MEMORY_MASK		0xff80
2687349SAdrian.Frost@Sun.COM #define	MCAX86_COMPOUND_BUS_MEMORY_TRANSACTION	0x0070
2697349SAdrian.Frost@Sun.COM #define	MCAX86_COMPOUND_BUS_MEMORY_READ		0x0010
2707349SAdrian.Frost@Sun.COM #define	MCAX86_COMPOUND_BUS_MEMORY_WRITE	0x0020
2717349SAdrian.Frost@Sun.COM #define	MCAX86_COMPOUND_BUS_MEMORY_CMD		0x0030
2727349SAdrian.Frost@Sun.COM #define	MCAX86_COMPOUND_BUS_MEMORY_CHANNEL	0x000f
2737349SAdrian.Frost@Sun.COM 
2747349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_ECC_READ	(1 << 16)
2757349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_ECC_SCRUB	(1 << 17)
2767349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_PARITY	(1 << 18)
2777349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_REDUNDANT_MEM	(1 << 19)
2787349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_SPARE_MEM	(1 << 20)
2797349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_ILLEGAL_ADDR	(1 << 21)
2807349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_BAD_ID	(1 << 22)
2817349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_ADDR_PARITY	(1 << 23)
2827349SAdrian.Frost@Sun.COM #define	MSR_MC_STATUS_MEM_BYTE_PARITY	(1 << 24)
2837349SAdrian.Frost@Sun.COM 
2847349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_MEM_RTID		0x00000000000000ffULL
2857349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_MEM_DIMM		0x0000000000030000ULL
2867349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_MEM_DIMM_SHIFT	16
2877349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_MEM_CHANNEL		0x00000000000c0000ULL
2887349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_MEM_CHANNEL_SHIFT	18
2897349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_MEM_SYNDROME	0xffffffff00000000ULL
2907349SAdrian.Frost@Sun.COM #define	MSR_MC_MISC_MEM_SYNDROME_SHIFT	32
2917349SAdrian.Frost@Sun.COM 
29210650SVuong.Nguyen@Sun.COM #define	OFFSET_ROW_BANK_COL	0x8000000000000000ULL
29310650SVuong.Nguyen@Sun.COM #define	OFFSET_RANK_SHIFT	52
29410650SVuong.Nguyen@Sun.COM #define	OFFSET_RAS_SHIFT	32
29510650SVuong.Nguyen@Sun.COM #define	OFFSET_BANK_SHIFT	24
29610650SVuong.Nguyen@Sun.COM #define	TCODE_OFFSET(rank, bank, ras, cas) (OFFSET_ROW_BANK_COL | \
29710650SVuong.Nguyen@Sun.COM 	((uint64_t)(rank) << OFFSET_RANK_SHIFT) | \
29810650SVuong.Nguyen@Sun.COM 	((uint64_t)(ras) << OFFSET_RAS_SHIFT) | \
29910650SVuong.Nguyen@Sun.COM 	((uint64_t)(bank) << OFFSET_BANK_SHIFT) | (cas))
30010650SVuong.Nguyen@Sun.COM 
30110650SVuong.Nguyen@Sun.COM #define	MAX_CAS_MASK	0xFFFFFF
30210650SVuong.Nguyen@Sun.COM #define	MAX_BANK_MASK	0xFF
30310650SVuong.Nguyen@Sun.COM #define	MAX_RAS_MASK	0xFFFFF
30410650SVuong.Nguyen@Sun.COM #define	MAX_RANK_MASK	0x7FF
30510650SVuong.Nguyen@Sun.COM #define	TCODE_OFFSET_RANK(tcode) \
30610650SVuong.Nguyen@Sun.COM 	(((tcode) >> OFFSET_RANK_SHIFT) & MAX_RANK_MASK)
30710650SVuong.Nguyen@Sun.COM #define	TCODE_OFFSET_RAS(tcode) (((tcode) >> OFFSET_RAS_SHIFT) & MAX_RAS_MASK)
30810650SVuong.Nguyen@Sun.COM #define	TCODE_OFFSET_BANK(tcode) \
30910650SVuong.Nguyen@Sun.COM 	(((tcode) >> OFFSET_BANK_SHIFT) & MAX_BANK_MASK)
31010650SVuong.Nguyen@Sun.COM #define	TCODE_OFFSET_CAS(tcode) ((tcode) & MAX_CAS_MASK)
31110650SVuong.Nguyen@Sun.COM 
3125254Sgavinm #ifdef __cplusplus
3135254Sgavinm }
3145254Sgavinm #endif
3155254Sgavinm 
3165254Sgavinm #endif /* _MC_INTEL_H */
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