xref: /onnv-gate/usr/src/uts/common/sys/smbios.h (revision 11859:f06d538b0f01)
1437Smws /*
2437Smws  * CDDL HEADER START
3437Smws  *
4437Smws  * The contents of this file are subject to the terms of the
51717Swesolows  * Common Development and Distribution License (the "License").
61717Swesolows  * You may not use this file except in compliance with the License.
7437Smws  *
8437Smws  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9437Smws  * or http://www.opensolaris.org/os/licensing.
10437Smws  * See the License for the specific language governing permissions
11437Smws  * and limitations under the License.
12437Smws  *
13437Smws  * When distributing Covered Code, include this CDDL HEADER in each
14437Smws  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15437Smws  * If applicable, add the following below this CDDL HEADER, with the
16437Smws  * fields enclosed by brackets "[]" replaced with your own identifying
17437Smws  * information: Portions Copyright [yyyy] [name of copyright owner]
18437Smws  *
19437Smws  * CDDL HEADER END
20437Smws  */
21437Smws 
22437Smws /*
23*11859STom.Pothier@Sun.COM  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
24437Smws  * Use is subject to license terms.
25437Smws  */
26437Smws 
27437Smws /*
28437Smws  * This header file defines the interfaces available from the SMBIOS access
29437Smws  * library, libsmbios, and an equivalent kernel module.  This API can be used
30437Smws  * to access DMTF SMBIOS data from a device, file, or raw memory buffer.
31437Smws  * This is NOT yet a public interface, although it may eventually become one in
32437Smws  * the fullness of time after we gain more experience with the interfaces.
33437Smws  *
34437Smws  * In the meantime, be aware that any program linked with this API in this
35437Smws  * release of Solaris is almost guaranteed to break in the next release.
36437Smws  *
37437Smws  * In short, do not user this header file or these routines for any purpose.
38437Smws  */
39437Smws 
40437Smws #ifndef	_SYS_SMBIOS_H
41437Smws #define	_SYS_SMBIOS_H
42437Smws 
43437Smws #include <sys/types.h>
44437Smws 
45437Smws #ifdef	__cplusplus
46437Smws extern "C" {
47437Smws #endif
48437Smws 
49437Smws /*
50437Smws  * SMBIOS Structure Table Entry Point.  See DSP0134 2.1.1 for more information.
51437Smws  * The structure table entry point is located by searching for the anchor.
52437Smws  */
531222Smws #pragma pack(1)
541222Smws 
55437Smws typedef struct smbios_entry {
56437Smws 	char smbe_eanchor[4];		/* anchor tag (SMB_ENTRY_EANCHOR) */
57437Smws 	uint8_t smbe_ecksum;		/* checksum of entry point structure */
58437Smws 	uint8_t smbe_elen;		/* length in bytes of entry point */
59437Smws 	uint8_t smbe_major;		/* major version of the SMBIOS spec */
60437Smws 	uint8_t smbe_minor;		/* minor version of the SMBIOS spec */
61437Smws 	uint16_t smbe_maxssize;		/* maximum size in bytes of a struct */
62437Smws 	uint8_t smbe_revision;		/* entry point structure revision */
63437Smws 	uint8_t smbe_format[5];		/* entry point revision-specific data */
64437Smws 	char smbe_ianchor[5];		/* intermed. tag (SMB_ENTRY_IANCHOR) */
65437Smws 	uint8_t smbe_icksum;		/* intermed. checksum */
66437Smws 	uint16_t smbe_stlen;		/* length in bytes of structure table */
67437Smws 	uint32_t smbe_staddr;		/* physical addr of structure table */
68437Smws 	uint16_t smbe_stnum;		/* number of structure table entries */
69437Smws 	uint8_t smbe_bcdrev;		/* BCD value representing DMI version */
70437Smws } smbios_entry_t;
71437Smws 
721222Smws #pragma pack()
731222Smws 
74437Smws #define	SMB_ENTRY_EANCHOR	"_SM_"	/* structure table entry point anchor */
75437Smws #define	SMB_ENTRY_EANCHORLEN	4	/* length of entry point anchor */
76437Smws #define	SMB_ENTRY_IANCHOR	"_DMI_"	/* intermediate anchor string */
77437Smws #define	SMB_ENTRY_IANCHORLEN	5	/* length of intermediate anchor */
781717Swesolows #define	SMB_ENTRY_MAXLEN	255	/* maximum length of entry point */
79437Smws 
80437Smws /*
81437Smws  * Structure type codes.  The comments next to each type include an (R) note to
82437Smws  * indicate a structure that is required as of SMBIOS v2.3 and an (O) note to
83437Smws  * indicate a structure that is obsolete as of SMBIOS v2.3.
84437Smws  */
85437Smws #define	SMB_TYPE_BIOS		0	/* BIOS information (R) */
86437Smws #define	SMB_TYPE_SYSTEM		1	/* system information (R) */
87437Smws #define	SMB_TYPE_BASEBOARD	2	/* base board */
88437Smws #define	SMB_TYPE_CHASSIS	3	/* system enclosure or chassis (R) */
89437Smws #define	SMB_TYPE_PROCESSOR	4	/* processor (R) */
90437Smws #define	SMB_TYPE_MEMCTL		5	/* memory controller (O) */
91437Smws #define	SMB_TYPE_MEMMOD		6	/* memory module (O) */
92437Smws #define	SMB_TYPE_CACHE		7	/* processor cache (R) */
93437Smws #define	SMB_TYPE_PORT		8	/* port connector */
94437Smws #define	SMB_TYPE_SLOT		9	/* upgradeable system slot (R) */
95437Smws #define	SMB_TYPE_OBDEVS		10	/* on-board devices */
96437Smws #define	SMB_TYPE_OEMSTR		11	/* OEM string table */
97437Smws #define	SMB_TYPE_SYSCONFSTR	12	/* system configuration string table */
98437Smws #define	SMB_TYPE_LANG		13	/* BIOS language information */
99437Smws #define	SMB_TYPE_GROUP		14	/* group associations */
100437Smws #define	SMB_TYPE_EVENTLOG	15	/* system event log */
101437Smws #define	SMB_TYPE_MEMARRAY	16	/* physical memory array (R) */
102437Smws #define	SMB_TYPE_MEMDEVICE	17	/* memory device (R) */
103437Smws #define	SMB_TYPE_MEMERR32	18	/* 32-bit memory error information */
104437Smws #define	SMB_TYPE_MEMARRAYMAP	19	/* memory array mapped address (R) */
105437Smws #define	SMB_TYPE_MEMDEVICEMAP	20	/* memory device mapped address (R) */
106437Smws #define	SMB_TYPE_POINTDEV	21	/* built-in pointing device */
107437Smws #define	SMB_TYPE_BATTERY	22	/* portable battery */
108437Smws #define	SMB_TYPE_RESET		23	/* system reset settings */
109437Smws #define	SMB_TYPE_SECURITY	24	/* hardware security settings */
110437Smws #define	SMB_TYPE_POWERCTL	25	/* system power controls */
111437Smws #define	SMB_TYPE_VPROBE		26	/* voltage probe */
112437Smws #define	SMB_TYPE_COOLDEV	27	/* cooling device */
113437Smws #define	SMB_TYPE_TPROBE		28	/* temperature probe */
114437Smws #define	SMB_TYPE_IPROBE		29	/* current probe */
115437Smws #define	SMB_TYPE_OOBRA		30	/* out-of-band remote access facility */
116437Smws #define	SMB_TYPE_BIS		31	/* boot integrity services */
117437Smws #define	SMB_TYPE_BOOT		32	/* system boot status (R) */
118437Smws #define	SMB_TYPE_MEMERR64	33	/* 64-bit memory error information */
119437Smws #define	SMB_TYPE_MGMTDEV	34	/* management device */
120437Smws #define	SMB_TYPE_MGMTDEVCP	35	/* management device component */
121437Smws #define	SMB_TYPE_MGMTDEVDATA	36	/* management device threshold data */
122437Smws #define	SMB_TYPE_MEMCHAN	37	/* memory channel */
123437Smws #define	SMB_TYPE_IPMIDEV	38	/* IPMI device information */
124437Smws #define	SMB_TYPE_POWERSUP	39	/* system power supply */
125*11859STom.Pothier@Sun.COM #define	SMB_TYPE_OBDEVEXT	41	/* on-board device extended info */
126437Smws #define	SMB_TYPE_INACTIVE	126	/* inactive table entry */
127437Smws #define	SMB_TYPE_EOT		127	/* end of table */
128437Smws 
129437Smws #define	SMB_TYPE_OEM_LO		128	/* start of OEM-specific type range */
13010942STom.Pothier@Sun.COM #define	SUN_OEM_EXT_PROCESSOR	132	/* processor extended info */
131*11859STom.Pothier@Sun.COM #define	SUN_OEM_EXT_PORT	136	/* port exteded info */
13210942STom.Pothier@Sun.COM #define	SUN_OEM_PCIEXRC		138	/* PCIE RootComplex/RootPort info */
13310942STom.Pothier@Sun.COM #define	SUN_OEM_EXT_MEMARRAY	144	/* phys memory array extended info */
13410942STom.Pothier@Sun.COM #define	SUN_OEM_EXT_MEMDEVICE	145	/* memory device extended info */
135437Smws #define	SMB_TYPE_OEM_HI		256	/* end of OEM-specific type range */
136437Smws 
137437Smws /*
13810462SSean.Ye@Sun.COM  * OEM string indicating "Platform Resource Management Specification"
13910462SSean.Ye@Sun.COM  * compliance.
14010462SSean.Ye@Sun.COM  */
14110462SSean.Ye@Sun.COM #define	SMB_PRMS1	"SUNW-PRMS-1"
14210462SSean.Ye@Sun.COM 
14310462SSean.Ye@Sun.COM /*
14410462SSean.Ye@Sun.COM  * Some default values set by BIOS vendor
14510462SSean.Ye@Sun.COM  */
14610462SSean.Ye@Sun.COM #define	SMB_DEFAULT1	"To Be Filled By O.E.M."
14710462SSean.Ye@Sun.COM #define	SMB_DEFAULT2	"Not Available"
14810462SSean.Ye@Sun.COM 
14910462SSean.Ye@Sun.COM /*
150437Smws  * SMBIOS Common Information.  These structures do not correspond to anything
151437Smws  * in the SMBIOS specification, but allow library clients to more easily read
152437Smws  * information that is frequently encoded into the various SMBIOS structures.
153437Smws  */
154437Smws typedef struct smbios_info {
155437Smws 	const char *smbi_manufacturer;	/* manufacturer */
156437Smws 	const char *smbi_product;	/* product name */
157437Smws 	const char *smbi_version;	/* version */
158437Smws 	const char *smbi_serial;	/* serial number */
159437Smws 	const char *smbi_asset;		/* asset tag */
160437Smws 	const char *smbi_location;	/* location tag */
161437Smws 	const char *smbi_part;		/* part number */
162437Smws } smbios_info_t;
163437Smws 
164437Smws typedef struct smbios_version {
165437Smws 	uint8_t smbv_major;		/* version major number */
166437Smws 	uint8_t smbv_minor;		/* version minor number */
167437Smws } smbios_version_t;
168437Smws 
16910942STom.Pothier@Sun.COM #define	SMB_CONT_BYTE	1		/* contained elements are byte size */
17010942STom.Pothier@Sun.COM #define	SMB_CONT_WORD	2		/* contained elements are word size */
17110942STom.Pothier@Sun.COM #define	SMB_CONT_MAX	255		/* maximum contained objects */
17210942STom.Pothier@Sun.COM 
173437Smws /*
174437Smws  * SMBIOS Bios Information.  See DSP0134 Section 3.3.1 for more information.
175437Smws  * smbb_romsize is converted from the implementation format into bytes.
176437Smws  */
177437Smws typedef struct smbios_bios {
178437Smws 	const char *smbb_vendor;	/* bios vendor string */
179437Smws 	const char *smbb_version;	/* bios version string */
180437Smws 	const char *smbb_reldate;	/* bios release date */
181437Smws 	uint32_t smbb_segment;		/* bios address segment location */
182437Smws 	uint32_t smbb_romsize;		/* bios rom size in bytes */
183437Smws 	uint32_t smbb_runsize;		/* bios image size in bytes */
184437Smws 	uint64_t smbb_cflags;		/* bios characteristics */
185437Smws 	const uint8_t *smbb_xcflags;	/* bios characteristics extensions */
186437Smws 	size_t smbb_nxcflags;		/* number of smbb_xcflags[] bytes */
187437Smws 	smbios_version_t smbb_biosv;	/* bios version */
188437Smws 	smbios_version_t smbb_ecfwv;	/* bios embedded ctrl f/w version */
189437Smws } smbios_bios_t;
190437Smws 
191437Smws #define	SMB_BIOSFL_RSV0		0x00000001	/* reserved bit zero */
192437Smws #define	SMB_BIOSFL_RSV1		0x00000002	/* reserved bit one */
193437Smws #define	SMB_BIOSFL_UNKNOWN	0x00000004	/* unknown */
194437Smws #define	SMB_BIOSFL_BCNOTSUP	0x00000008	/* BIOS chars not supported */
195437Smws #define	SMB_BIOSFL_ISA		0x00000010	/* ISA is supported */
196437Smws #define	SMB_BIOSFL_MCA		0x00000020	/* MCA is supported */
197437Smws #define	SMB_BIOSFL_EISA		0x00000040	/* EISA is supported */
198437Smws #define	SMB_BIOSFL_PCI		0x00000080	/* PCI is supported */
199437Smws #define	SMB_BIOSFL_PCMCIA	0x00000100	/* PCMCIA is supported */
200437Smws #define	SMB_BIOSFL_PLUGNPLAY	0x00000200	/* Plug and Play is supported */
201437Smws #define	SMB_BIOSFL_APM		0x00000400	/* APM is supported */
202437Smws #define	SMB_BIOSFL_FLASH	0x00000800	/* BIOS is Flash Upgradeable */
203437Smws #define	SMB_BIOSFL_SHADOW	0x00001000	/* BIOS shadowing is allowed */
204437Smws #define	SMB_BIOSFL_VLVESA	0x00002000	/* VL-VESA is supported */
205437Smws #define	SMB_BIOSFL_ESCD		0x00004000	/* ESCD support is available */
206437Smws #define	SMB_BIOSFL_CDBOOT	0x00008000	/* Boot from CD is supported */
207437Smws #define	SMB_BIOSFL_SELBOOT	0x00010000	/* Selectable Boot supported */
208437Smws #define	SMB_BIOSFL_ROMSOCK	0x00020000	/* BIOS ROM is socketed */
209437Smws #define	SMB_BIOSFL_PCMBOOT	0x00040000	/* Boot from PCMCIA supported */
210437Smws #define	SMB_BIOSFL_EDD		0x00080000	/* EDD Spec is supported */
211437Smws #define	SMB_BIOSFL_NEC9800	0x00100000	/* int 0x13 NEC 9800 floppy */
212437Smws #define	SMB_BIOSFL_TOSHIBA	0x00200000	/* int 0x13 Toshiba floppy */
213437Smws #define	SMB_BIOSFL_525_360K	0x00400000	/* int 0x13 5.25" 360K floppy */
214437Smws #define	SMB_BIOSFL_525_12M	0x00800000	/* int 0x13 5.25" 1.2M floppy */
215437Smws #define	SMB_BIOSFL_35_720K	0x01000000	/* int 0x13 3.5" 720K floppy */
216437Smws #define	SMB_BIOSFL_35_288M	0x02000000	/* int 0x13 3.5" 2.88M floppy */
217437Smws #define	SMB_BIOSFL_I5_PRINT	0x04000000	/* int 0x5 print screen svcs */
218437Smws #define	SMB_BIOSFL_I9_KBD	0x08000000	/* int 0x9 8042 keyboard svcs */
219437Smws #define	SMB_BIOSFL_I14_SER	0x10000000	/* int 0x14 serial svcs */
220437Smws #define	SMB_BIOSFL_I17_PRINTER	0x20000000	/* int 0x17 printer svcs */
221437Smws #define	SMB_BIOSFL_I10_CGA	0x40000000	/* int 0x10 CGA svcs */
222437Smws #define	SMB_BIOSFL_NEC_PC98	0x80000000	/* NEC PC-98 */
223437Smws 
224437Smws #define	SMB_BIOSXB_1		0	/* bios extension byte 1 (3.3.1.2.1) */
225437Smws #define	SMB_BIOSXB_2		1	/* bios extension byte 2 (3.3.1.2.2) */
226437Smws #define	SMB_BIOSXB_BIOS_MAJ	2	/* bios major version */
227437Smws #define	SMB_BIOSXB_BIOS_MIN	3	/* bios minor version */
228437Smws #define	SMB_BIOSXB_ECFW_MAJ	4	/* extended ctlr f/w major version */
229437Smws #define	SMB_BIOSXB_ECFW_MIN	5	/* extended ctlr f/w minor version */
230437Smws 
231437Smws #define	SMB_BIOSXB1_ACPI	0x01	/* ACPI is supported */
232437Smws #define	SMB_BIOSXB1_USBL	0x02	/* USB legacy is supported */
233437Smws #define	SMB_BIOSXB1_AGP		0x04	/* AGP is supported */
234437Smws #define	SMB_BIOSXB1_I20		0x08	/* I2O boot is supported */
235437Smws #define	SMB_BIOSXB1_LS120	0x10	/* LS-120 boot is supported */
236437Smws #define	SMB_BIOSXB1_ATZIP	0x20	/* ATAPI ZIP drive boot is supported */
237437Smws #define	SMB_BIOSXB1_1394	0x40	/* 1394 boot is supported */
238437Smws #define	SMB_BIOSXB1_SMBAT	0x80	/* Smart Battery is supported */
239437Smws 
240437Smws #define	SMB_BIOSXB2_BBOOT	0x01	/* BIOS Boot Specification supported */
241437Smws #define	SMB_BIOSXB2_FKNETSVC	0x02	/* F-key Network Svc boot supported */
242437Smws #define	SMB_BIOSXB2_ETCDIST	0x04	/* Enable Targeted Content Distrib. */
243437Smws 
244437Smws /*
245437Smws  * SMBIOS Bios Information.  See DSP0134 Section 3.3.2 for more information.
246437Smws  * The current set of smbs_wakeup values is defined after the structure.
247437Smws  */
248437Smws typedef struct smbios_system {
249437Smws 	const uint8_t *smbs_uuid;	/* UUID byte array */
250437Smws 	uint8_t smbs_uuidlen;		/* UUID byte array length */
251437Smws 	uint8_t smbs_wakeup;		/* wake-up event */
252437Smws 	const char *smbs_sku;		/* SKU number */
253437Smws 	const char *smbs_family;	/* family */
254437Smws } smbios_system_t;
255437Smws 
256437Smws #define	SMB_WAKEUP_RSV0		0x00	/* reserved */
257437Smws #define	SMB_WAKEUP_OTHER	0x01	/* other */
258437Smws #define	SMB_WAKEUP_UNKNOWN	0x02	/* unknown */
259437Smws #define	SMB_WAKEUP_APM		0x03	/* APM timer */
260437Smws #define	SMB_WAKEUP_MODEM	0x04	/* modem ring */
261437Smws #define	SMB_WAKEUP_LAN		0x05	/* LAN remote */
262437Smws #define	SMB_WAKEUP_SWITCH	0x06	/* power switch */
263437Smws #define	SMB_WAKEUP_PCIPME	0x07	/* PCI PME# */
264437Smws #define	SMB_WAKEUP_AC		0x08	/* AC power restored */
265437Smws 
266437Smws /*
267437Smws  * SMBIOS Base Board description.  See DSP0134 Section 3.3.3 for more
268437Smws  * information.  smbb_flags and smbb_type definitions are below.
269437Smws  */
270437Smws typedef struct smbios_bboard {
271437Smws 	id_t smbb_chassis;		/* chassis containing this board */
272437Smws 	uint8_t smbb_flags;		/* flags (see below) */
273437Smws 	uint8_t smbb_type;		/* board type (see below) */
27410942STom.Pothier@Sun.COM 	uint8_t smbb_contn;		/* number of contained object hdls */
275437Smws } smbios_bboard_t;
276437Smws 
277437Smws #define	SMB_BBFL_MOTHERBOARD	0x01	/* board is a motherboard */
278437Smws #define	SMB_BBFL_NEEDAUX	0x02	/* auxiliary card or daughter req'd */
279437Smws #define	SMB_BBFL_REMOVABLE	0x04	/* board is removable */
280437Smws #define	SMB_BBFL_REPLACABLE	0x08	/* board is field-replacable */
281437Smws #define	SMB_BBFL_HOTSWAP	0x10	/* board is hot-swappable */
282437Smws 
283437Smws #define	SMB_BBT_UNKNOWN		0x1	/* unknown */
284437Smws #define	SMB_BBT_OTHER		0x2	/* other */
285437Smws #define	SMB_BBT_SBLADE		0x3	/* server blade */
286437Smws #define	SMB_BBT_CSWITCH		0x4	/* connectivity switch */
287437Smws #define	SMB_BBT_SMM		0x5	/* system management module */
288437Smws #define	SMB_BBT_PROC		0x6	/* processor module */
289437Smws #define	SMB_BBT_IO		0x7	/* i/o module */
290437Smws #define	SMB_BBT_MEM		0x8	/* memory module */
291437Smws #define	SMB_BBT_DAUGHTER	0x9	/* daughterboard */
292437Smws #define	SMB_BBT_MOTHER		0xA	/* motherboard */
293437Smws #define	SMB_BBT_PROCMEM		0xB	/* processor/memory module */
294437Smws #define	SMB_BBT_PROCIO		0xC	/* processor/i/o module */
295437Smws #define	SMB_BBT_INTER		0xD	/* interconnect board */
296437Smws 
297437Smws /*
298437Smws  * SMBIOS Chassis description.  See DSP0134 Section 3.3.4 for more information.
299437Smws  * We move the lock bit of the type field into smbc_lock for easier processing.
300437Smws  */
301437Smws typedef struct smbios_chassis {
302437Smws 	uint32_t smbc_oemdata;		/* OEM-specific data */
303437Smws 	uint8_t smbc_lock;		/* lock present? */
304437Smws 	uint8_t smbc_type;		/* type */
305437Smws 	uint8_t smbc_bustate;		/* boot-up state */
306437Smws 	uint8_t smbc_psstate;		/* power supply state */
307437Smws 	uint8_t smbc_thstate;		/* thermal state */
308437Smws 	uint8_t smbc_security;		/* security status */
309437Smws 	uint8_t smbc_uheight;		/* enclosure height in U's */
310437Smws 	uint8_t smbc_cords;		/* number of power cords */
31110942STom.Pothier@Sun.COM 	uint8_t smbc_elems;		/* number of element records (n) */
31210942STom.Pothier@Sun.COM 	uint8_t smbc_elemlen;		/* length of contained element (m) */
313437Smws } smbios_chassis_t;
314437Smws 
315437Smws #define	SMB_CHT_OTHER		0x01	/* other */
316437Smws #define	SMB_CHT_UNKNOWN		0x02	/* unknown */
317437Smws #define	SMB_CHT_DESKTOP		0x03	/* desktop */
318437Smws #define	SMB_CHT_LPDESKTOP	0x04	/* low-profile desktop */
319437Smws #define	SMB_CHT_PIZZA		0x05	/* pizza box */
320437Smws #define	SMB_CHT_MINITOWER	0x06	/* mini-tower */
321437Smws #define	SMB_CHT_TOWER		0x07	/* tower */
322437Smws #define	SMB_CHT_PORTABLE	0x08	/* portable */
323437Smws #define	SMB_CHT_LAPTOP		0x09	/* laptop */
324437Smws #define	SMB_CHT_NOTEBOOK	0x0A	/* notebook */
325437Smws #define	SMB_CHT_HANDHELD	0x0B	/* hand-held */
326437Smws #define	SMB_CHT_DOCK		0x0C	/* docking station */
327437Smws #define	SMB_CHT_ALLIN1		0x0D	/* all-in-one */
328437Smws #define	SMB_CHT_SUBNOTE		0x0E	/* sub-notebook */
329437Smws #define	SMB_CHT_SPACESAVE	0x0F	/* space-saving */
330437Smws #define	SMB_CHT_LUNCHBOX	0x10	/* lunchbox */
331437Smws #define	SMB_CHT_MAIN		0x11	/* main server chassis */
332437Smws #define	SMB_CHT_EXPANSION	0x12	/* expansion chassis */
333437Smws #define	SMB_CHT_SUB		0x13	/* sub-chassis */
334437Smws #define	SMB_CHT_BUS		0x14	/* bus expansion chassis */
335437Smws #define	SMB_CHT_PERIPHERAL	0x15	/* peripheral chassis */
336437Smws #define	SMB_CHT_RAID		0x16	/* raid chassis */
337437Smws #define	SMB_CHT_RACK		0x17	/* rack mount chassis */
338437Smws #define	SMB_CHT_SEALED		0x18	/* sealed case pc */
339437Smws #define	SMB_CHT_MULTI		0x19	/* multi-system chassis */
3407107Ssethg #define	SMB_CHT_CPCI		0x1A	/* compact PCI */
3417107Ssethg #define	SMB_CHT_ATCA		0x1B	/* advanced TCA */
3427107Ssethg #define	SMB_CHT_BLADE		0x1C	/* blade */
3437107Ssethg #define	SMB_CHT_BLADEENC	0x1D	/* blade enclosure */
344437Smws 
345437Smws #define	SMB_CHST_OTHER		0x01	/* other */
346437Smws #define	SMB_CHST_UNKNOWN	0x02	/* unknown */
347437Smws #define	SMB_CHST_SAFE		0x03	/* safe */
348437Smws #define	SMB_CHST_WARNING	0x04	/* warning */
349437Smws #define	SMB_CHST_CRITICAL	0x05	/* critical */
350437Smws #define	SMB_CHST_NONREC		0x06	/* non-recoverable */
351437Smws 
352437Smws #define	SMB_CHSC_OTHER		0x01	/* other */
353437Smws #define	SMB_CHSC_UNKNOWN	0x02	/* unknown */
354437Smws #define	SMB_CHSC_NONE		0x03	/* none */
355437Smws #define	SMB_CHSC_EILOCK		0x04	/* external interface locked out */
356437Smws #define	SMB_CHSC_EIENAB		0x05	/* external interface enabled */
357437Smws 
358437Smws /*
359437Smws  * SMBIOS Processor description.  See DSP0134 Section 3.3.5 for more details.
360437Smws  * If the L1, L2, or L3 cache handle is -1, the cache information is unknown.
361437Smws  * If the handle refers to something of size 0, that type of cache is absent.
362437Smws  *
363437Smws  * NOTE: Although SMBIOS exports a 64-bit CPUID result, this value should not
364437Smws  * be used for any purpose other than BIOS debugging.  Solaris itself computes
365437Smws  * its own CPUID value and applies knowledge of additional errata and processor
366437Smws  * specific CPUID variations, so this value should not be used for anything.
367437Smws  */
368437Smws typedef struct smbios_processor {
369437Smws 	uint64_t smbp_cpuid;		/* processor cpuid information */
370437Smws 	uint32_t smbp_family;		/* processor family */
371437Smws 	uint8_t smbp_type;		/* processor type (SMB_PRT_*) */
372437Smws 	uint8_t smbp_voltage;		/* voltage (SMB_PRV_*) */
373437Smws 	uint8_t smbp_status;		/* status (SMB_PRS_*) */
374437Smws 	uint8_t smbp_upgrade;		/* upgrade (SMB_PRU_*) */
375437Smws 	uint32_t smbp_clkspeed;		/* external clock speed in MHz */
376437Smws 	uint32_t smbp_maxspeed;		/* maximum speed in MHz */
377437Smws 	uint32_t smbp_curspeed;		/* current speed in MHz */
378437Smws 	id_t smbp_l1cache;		/* L1 cache handle */
379437Smws 	id_t smbp_l2cache;		/* L2 cache handle */
380437Smws 	id_t smbp_l3cache;		/* L3 cache handle */
381437Smws } smbios_processor_t;
382437Smws 
383437Smws #define	SMB_PRT_OTHER		0x01	/* other */
384437Smws #define	SMB_PRT_UNKNOWN		0x02	/* unknown */
385437Smws #define	SMB_PRT_CENTRAL		0x03	/* central processor */
386437Smws #define	SMB_PRT_MATH		0x04	/* math processor */
387437Smws #define	SMB_PRT_DSP		0x05	/* DSP processor */
388437Smws #define	SMB_PRT_VIDEO		0x06	/* video processor */
389437Smws 
390437Smws #define	SMB_PRV_LEGACY(v)	(!((v) & 0x80))	/* legacy voltage mode */
391437Smws #define	SMB_PRV_FIXED(v)	((v) & 0x80)	/* fixed voltage mode */
392437Smws 
393437Smws #define	SMB_PRV_5V		0x01	/* 5V is supported */
394437Smws #define	SMB_PRV_33V		0x02	/* 3.3V is supported */
395437Smws #define	SMB_PRV_29V		0x04	/* 2.9V is supported */
396437Smws 
397437Smws #define	SMB_PRV_VOLTAGE(v)	((v) & 0x7f)
398437Smws 
399437Smws #define	SMB_PRSTATUS_PRESENT(s)	((s) & 0x40)	/* socket is populated */
400437Smws #define	SMB_PRSTATUS_STATUS(s)	((s) & 0x07)	/* status (see below) */
401437Smws 
402437Smws #define	SMB_PRS_UNKNOWN		0x0	/* unknown */
403437Smws #define	SMB_PRS_ENABLED		0x1	/* enabled */
404437Smws #define	SMB_PRS_BDISABLED	0x2	/* disabled in bios user setup */
405437Smws #define	SMB_PRS_PDISABLED	0x3	/* disabled in bios from post error */
406437Smws #define	SMB_PRS_IDLE		0x4	/* waiting to be enabled */
407437Smws #define	SMB_PRS_OTHER		0x7	/* other */
408437Smws 
409437Smws #define	SMB_PRU_OTHER		0x01	/* other */
410437Smws #define	SMB_PRU_UNKNOWN		0x02	/* unknown */
411437Smws #define	SMB_PRU_DAUGHTER	0x03	/* daughter board */
412437Smws #define	SMB_PRU_ZIF		0x04	/* ZIF socket */
413437Smws #define	SMB_PRU_PIGGY		0x05	/* replaceable piggy back */
414437Smws #define	SMB_PRU_NONE		0x06	/* none */
415437Smws #define	SMB_PRU_LIF		0x07	/* LIF socket */
416437Smws #define	SMB_PRU_SLOT1		0x08	/* slot 1 */
417437Smws #define	SMB_PRU_SLOT2		0x09	/* slot 2 */
418437Smws #define	SMB_PRU_370PIN		0x0A	/* 370-pin socket */
419437Smws #define	SMB_PRU_SLOTA		0x0B	/* slot A */
420437Smws #define	SMB_PRU_SLOTM		0x0C	/* slot M */
421437Smws #define	SMB_PRU_423		0x0D	/* socket 423 */
422437Smws #define	SMB_PRU_A		0x0E	/* socket A (socket 462) */
423437Smws #define	SMB_PRU_478		0x0F	/* socket 478 */
424437Smws #define	SMB_PRU_754		0x10	/* socket 754 */
425437Smws #define	SMB_PRU_940		0x11	/* socket 940 */
4267107Ssethg #define	SMB_PRU_939		0x12	/* socket 939 */
4277107Ssethg #define	SMB_PRU_MPGA604		0x13	/* mPGA604 */
4287107Ssethg #define	SMB_PRU_LGA771		0x14	/* LGA771 */
4297107Ssethg #define	SMB_PRU_LGA775		0x15	/* LGA775 */
4307107Ssethg #define	SMB_PRU_S1		0x16	/* socket S1 */
4317107Ssethg #define	SMB_PRU_AM2		0x17	/* socket AM2 */
4327107Ssethg #define	SMB_PRU_F		0x18	/* socket F */
433437Smws 
434437Smws #define	SMB_PRF_OTHER		0x01	/* other */
435437Smws #define	SMB_PRF_UNKNOWN		0x02	/* unknown */
436437Smws #define	SMB_PRF_8086		0x03	/* 8086 */
437437Smws #define	SMB_PRF_80286		0x04	/* 80286 */
438437Smws #define	SMB_PRF_I386		0x05	/* Intel 386 */
439437Smws #define	SMB_PRF_I486		0x06	/* Intel 486 */
440437Smws #define	SMB_PRF_8087		0x07	/* 8087 */
441437Smws #define	SMB_PRF_80287		0x08	/* 80287 */
442437Smws #define	SMB_PRF_80387		0x09	/* 80387 */
443437Smws #define	SMB_PRF_80487		0x0A	/* 80487 */
444437Smws #define	SMB_PRF_PENTIUM		0x0B	/* Pentium Family */
445437Smws #define	SMB_PRF_PENTIUMPRO	0x0C	/* Pentium Pro */
446437Smws #define	SMB_PRF_PENTIUMII	0x0D	/* Pentium II */
447437Smws #define	SMB_PRF_PENTIUM_MMX	0x0E	/* Pentium w/ MMX */
448437Smws #define	SMB_PRF_CELERON		0x0F	/* Celeron */
449437Smws #define	SMB_PRF_PENTIUMII_XEON	0x10	/* Pentium II Xeon */
450437Smws #define	SMB_PRF_PENTIUMIII	0x11	/* Pentium III */
451437Smws #define	SMB_PRF_M1		0x12	/* M1 */
452437Smws #define	SMB_PRF_M2		0x13	/* M2 */
453437Smws #define	SMB_PRF_DURON		0x18	/* AMD Duron */
454437Smws #define	SMB_PRF_K5		0x19	/* K5 */
455437Smws #define	SMB_PRF_K6		0x1A	/* K6 */
456437Smws #define	SMB_PRF_K6_2		0x1B	/* K6-2 */
457437Smws #define	SMB_PRF_K6_3		0x1C	/* K6-3 */
458437Smws #define	SMB_PRF_ATHLON		0x1D	/* Athlon */
459437Smws #define	SMB_PRF_2900		0x1E	/* AMD 2900 */
460437Smws #define	SMB_PRF_K6_2PLUS	0x1F	/* K6-2+ */
461437Smws #define	SMB_PRF_PPC		0x20	/* PowerPC */
462437Smws #define	SMB_PRF_PPC_601		0x21	/* PowerPC 601 */
463437Smws #define	SMB_PRF_PPC_603		0x22	/* PowerPC 603 */
464437Smws #define	SMB_PRF_PPC_603PLUS	0x23	/* PowerPC 603+ */
465437Smws #define	SMB_PRF_PPC_604		0x24	/* PowerPC 604 */
466437Smws #define	SMB_PRF_PPC_620		0x25	/* PowerPC 620 */
467437Smws #define	SMB_PRF_PPC_704		0x26	/* PowerPC x704 */
468437Smws #define	SMB_PRF_PPC_750		0x27	/* PowerPC 750 */
469437Smws #define	SMB_PRF_ALPHA		0x30	/* Alpha */
470437Smws #define	SMB_PRF_ALPHA_21064	0x31	/* Alpha 21064 */
471437Smws #define	SMB_PRF_ALPHA_21066	0x32	/* Alpha 21066 */
472437Smws #define	SMB_PRF_ALPHA_21164	0x33	/* Alpha 21164 */
473437Smws #define	SMB_PRF_ALPHA_21164PC	0x34	/* Alpha 21164PC */
474437Smws #define	SMB_PRF_ALPHA_21164A	0x35	/* Alpha 21164a */
475437Smws #define	SMB_PRF_ALPHA_21264	0x36	/* Alpha 21264 */
476437Smws #define	SMB_PRF_ALPHA_21364	0x37	/* Alpha 21364 */
477437Smws #define	SMB_PRF_MIPS		0x40	/* MIPS */
478437Smws #define	SMB_PRF_MIPS_R4000	0x41	/* MIPS R4000 */
479437Smws #define	SMB_PRF_MIPS_R4200	0x42	/* MIPS R4200 */
480437Smws #define	SMB_PRF_MIPS_R4400	0x43	/* MIPS R4400 */
481437Smws #define	SMB_PRF_MIPS_R4600	0x44	/* MIPS R4600 */
482437Smws #define	SMB_PRF_MIPS_R10000	0x45	/* MIPS R10000 */
483437Smws #define	SMB_PRF_SPARC		0x50	/* SPARC */
484437Smws #define	SMB_PRF_SUPERSPARC	0x51	/* SuperSPARC */
485437Smws #define	SMB_PRF_MICROSPARCII	0x52	/* microSPARC II */
486437Smws #define	SMB_PRF_MICROSPARCIIep	0x53	/* microSPARC IIep */
487437Smws #define	SMB_PRF_ULTRASPARC	0x54	/* UltraSPARC */
488437Smws #define	SMB_PRF_USII		0x55	/* UltraSPARC II */
489437Smws #define	SMB_PRF_USIIi		0x56	/* UltraSPARC IIi */
490437Smws #define	SMB_PRF_USIII		0x57	/* UltraSPARC III */
491437Smws #define	SMB_PRF_USIIIi		0x58	/* UltraSPARC IIIi */
492437Smws #define	SMB_PRF_68040		0x60	/* 68040 */
493437Smws #define	SMB_PRF_68XXX		0x61	/* 68XXX */
494437Smws #define	SMB_PRF_68000		0x62	/* 68000 */
495437Smws #define	SMB_PRF_68010		0x63	/* 68010 */
496437Smws #define	SMB_PRF_68020		0x64	/* 68020 */
497437Smws #define	SMB_PRF_68030		0x65	/* 68030 */
498437Smws #define	SMB_PRF_HOBBIT		0x70	/* Hobbit */
499437Smws #define	SMB_PRF_TM5000		0x78	/* Crusoe TM5000 */
500437Smws #define	SMB_PRF_TM3000		0x79	/* Crusoe TM3000 */
501437Smws #define	SMB_PRF_TM8000		0x7A	/* Efficeon TM8000 */
502437Smws #define	SMB_PRF_WEITEK		0x80	/* Weitek */
503437Smws #define	SMB_PRF_ITANIC		0x82	/* Itanium */
504437Smws #define	SMB_PRF_ATHLON64	0x83	/* Athlon64 */
505437Smws #define	SMB_PRF_OPTERON		0x84	/* Opteron */
506437Smws #define	SMB_PRF_PA		0x90	/* PA-RISC */
507437Smws #define	SMB_PRF_PA8500		0x91	/* PA-RISC 8500 */
508437Smws #define	SMB_PRF_PA8000		0x92	/* PA-RISC 8000 */
509437Smws #define	SMB_PRF_PA7300LC	0x93	/* PA-RISC 7300LC */
510437Smws #define	SMB_PRF_PA7200		0x94	/* PA-RISC 7200 */
511437Smws #define	SMB_PRF_PA7100LC	0x95	/* PA-RISC 7100LC */
512437Smws #define	SMB_PRF_PA7100		0x96	/* PA-RISC 7100 */
513437Smws #define	SMB_PRF_V30		0xA0	/* V30 */
514437Smws #define	SMB_PRF_PENTIUMIII_XEON	0xB0	/* Pentium III Xeon */
515437Smws #define	SMB_PRF_PENTIUMIII_SS	0xB1	/* Pentium III with SpeedStep */
516437Smws #define	SMB_PRF_P4		0xB2	/* Pentium 4 */
517437Smws #define	SMB_PRF_XEON		0xB3	/* Intel Xeon */
518437Smws #define	SMB_PRF_AS400		0xB4	/* AS400 */
519437Smws #define	SMB_PRF_XEON_MP		0xB5	/* Intel Xeon MP */
520437Smws #define	SMB_PRF_ATHLON_XP	0xB6	/* AMD Athlon XP */
5217107Ssethg #define	SMB_PRF_ATHLON_MP	0xB7	/* AMD Athlon MP */
522437Smws #define	SMB_PRF_ITANIC2		0xB8	/* Itanium 2 */
523437Smws #define	SMB_PRF_PENTIUM_M	0xB9	/* Pentium M */
5247107Ssethg #define	SMB_PRF_CELERON_D	0xBA	/* Celeron D */
5257107Ssethg #define	SMB_PRF_PENTIUM_D	0xBB	/* Pentium D */
5267107Ssethg #define	SMB_PRF_PENTIUM_EE	0xBC	/* Pentium Extreme Edition */
5277107Ssethg #define	SMB_PRF_CORE		0xBD	/* Intel Core */
5287107Ssethg #define	SMB_PRF_CORE2		0xBF	/* Intel Core 2 */
529437Smws #define	SMB_PRF_IBM390		0xC8	/* IBM 390 */
530437Smws #define	SMB_PRF_G4		0xC9	/* G4 */
531437Smws #define	SMB_PRF_G5		0xCA	/* G5 */
5327107Ssethg #define	SMB_PRF_ESA390		0xCB	/* ESA390 */
5337107Ssethg #define	SMB_PRF_ZARCH		0xCC	/* z/Architecture */
5347107Ssethg #define	SMB_PRF_C7M		0xD2	/* VIA C7-M */
5357107Ssethg #define	SMB_PRF_C7D		0xD3	/* VIA C7-D */
5367107Ssethg #define	SMB_PRF_C7		0xD4	/* VIA C7 */
5377107Ssethg #define	SMB_PRF_EDEN		0xD5	/* VIA Eden */
538437Smws #define	SMB_PRF_I860		0xFA	/* i860 */
539437Smws #define	SMB_PRF_I960		0xFB	/* i960 */
5407107Ssethg #define	SMB_PRF_SH3		0x104	/* SH-3 */
5417107Ssethg #define	SMB_PRF_SH4		0x105	/* SH-4 */
5427107Ssethg #define	SMB_PRF_ARM		0x118	/* ARM */
5437107Ssethg #define	SMB_PRF_SARM		0x119	/* StrongARM */
5447107Ssethg #define	SMB_PRF_6X86		0x12C	/* 6x86 */
5457107Ssethg #define	SMB_PRF_MEDIAGX		0x12D	/* MediaGX */
5467107Ssethg #define	SMB_PRF_MII		0x12E	/* MII */
5477107Ssethg #define	SMB_PRF_WINCHIP		0x140	/* WinChip */
5487107Ssethg #define	SMB_PRF_DSP		0x15E	/* DSP */
5497107Ssethg #define	SMB_PRF_VIDEO		0x1F4	/* Video Processor */
550437Smws 
551437Smws /*
552437Smws  * SMBIOS Cache Information.  See DSP0134 Section 3.3.8 for more information.
553437Smws  * If smba_size is zero, this indicates the specified cache is not present.
554437Smws  */
555437Smws typedef struct smbios_cache {
556437Smws 	uint32_t smba_maxsize;		/* maximum installed size in bytes */
557437Smws 	uint32_t smba_size;		/* installed size in bytes */
558437Smws 	uint16_t smba_stype;		/* supported SRAM types (SMB_CAT_*) */
559437Smws 	uint16_t smba_ctype;		/* current SRAM type (SMB_CAT_*) */
560437Smws 	uint8_t smba_speed;		/* speed in nanoseconds */
561437Smws 	uint8_t smba_etype;		/* error correction type (SMB_CAE_*) */
562437Smws 	uint8_t smba_ltype;		/* logical cache type (SMB_CAG_*) */
563437Smws 	uint8_t smba_assoc;		/* associativity (SMB_CAA_*) */
564437Smws 	uint8_t smba_level;		/* cache level */
565437Smws 	uint8_t smba_mode;		/* cache mode (SMB_CAM_*) */
566437Smws 	uint8_t smba_location;		/* cache location (SMB_CAL_*) */
567437Smws 	uint8_t smba_flags;		/* cache flags (SMB_CAF_*) */
568437Smws } smbios_cache_t;
569437Smws 
570437Smws #define	SMB_CAT_OTHER		0x0001		/* other */
571437Smws #define	SMB_CAT_UNKNOWN		0x0002		/* unknown */
572437Smws #define	SMB_CAT_NONBURST	0x0004		/* non-burst */
573437Smws #define	SMB_CAT_BURST		0x0008		/* burst */
574437Smws #define	SMB_CAT_PBURST		0x0010		/* pipeline burst */
575437Smws #define	SMB_CAT_SYNC		0x0020		/* synchronous */
576437Smws #define	SMB_CAT_ASYNC		0x0040		/* asynchronous */
577437Smws 
578437Smws #define	SMB_CAE_OTHER		0x01		/* other */
579437Smws #define	SMB_CAE_UNKNOWN		0x02		/* unknown */
580437Smws #define	SMB_CAE_NONE		0x03		/* none */
581437Smws #define	SMB_CAE_PARITY		0x04		/* parity */
582437Smws #define	SMB_CAE_SBECC		0x05		/* single-bit ECC */
583437Smws #define	SMB_CAE_MBECC		0x06		/* multi-bit ECC */
584437Smws 
585437Smws #define	SMB_CAG_OTHER		0x01		/* other */
586437Smws #define	SMB_CAG_UNKNOWN		0x02		/* unknown */
587437Smws #define	SMB_CAG_INSTR		0x03		/* instruction */
588437Smws #define	SMB_CAG_DATA		0x04		/* data */
589437Smws #define	SMB_CAG_UNIFIED		0x05		/* unified */
590437Smws 
591437Smws #define	SMB_CAA_OTHER		0x01		/* other */
592437Smws #define	SMB_CAA_UNKNOWN		0x02		/* unknown */
593437Smws #define	SMB_CAA_DIRECT		0x03		/* direct mapped */
594437Smws #define	SMB_CAA_2WAY		0x04		/* 2-way set associative */
595437Smws #define	SMB_CAA_4WAY		0x05		/* 4-way set associative */
596437Smws #define	SMB_CAA_FULL		0x06		/* fully associative */
597437Smws #define	SMB_CAA_8WAY		0x07		/* 8-way set associative */
598437Smws #define	SMB_CAA_16WAY		0x08		/* 16-way set associative */
599437Smws 
600437Smws #define	SMB_CAM_WT		0x00		/* write-through */
601437Smws #define	SMB_CAM_WB		0x01		/* write-back */
602437Smws #define	SMB_CAM_VARY		0x02		/* varies by address */
603437Smws #define	SMB_CAM_UNKNOWN		0x03		/* unknown */
604437Smws 
605437Smws #define	SMB_CAL_INTERNAL	0x00		/* internal */
606437Smws #define	SMB_CAL_EXTERNAL	0x01		/* external */
607437Smws #define	SMB_CAL_RESERVED	0x02		/* reserved */
608437Smws #define	SMB_CAL_UNKNOWN		0x03		/* unknown */
609437Smws 
610437Smws #define	SMB_CAF_ENABLED		0x01		/* enabled at boot time */
611437Smws #define	SMB_CAF_SOCKETED	0x02		/* cache is socketed */
612437Smws 
613437Smws /*
614437Smws  * SMBIOS Port Information.  See DSP0134 Section 3.3.9 for more information.
615437Smws  * The internal reference designator string is also mapped to the location.
616437Smws  */
617437Smws typedef struct smbios_port {
618437Smws 	const char *smbo_iref;	/* internal reference designator */
619437Smws 	const char *smbo_eref;	/* external reference designator */
620437Smws 	uint8_t smbo_itype;	/* internal connector type (SMB_POC_*) */
621437Smws 	uint8_t smbo_etype;	/* external connector type (SMB_POC_*) */
622437Smws 	uint8_t smbo_ptype;	/* port type (SMB_POT_*) */
623437Smws 	uint8_t smbo_pad;	/* padding */
624437Smws } smbios_port_t;
625437Smws 
626437Smws #define	SMB_POC_NONE		0x00		/* none */
627437Smws #define	SMB_POC_CENT		0x01		/* Centronics */
628437Smws #define	SMB_POC_MINICENT	0x02		/* Mini-Centronics */
629437Smws #define	SMB_POC_PROPRIETARY	0x03		/* proprietary */
630437Smws #define	SMB_POC_DB25M		0x04		/* DB-25 pin male */
631437Smws #define	SMB_POC_DB25F		0x05		/* DB-25 pin female */
632437Smws #define	SMB_POC_DB15M		0x06		/* DB-15 pin male */
633437Smws #define	SMB_POC_DB15F		0x07		/* DB-15 pin female */
634437Smws #define	SMB_POC_DB9M		0x08		/* DB-9 pin male */
635437Smws #define	SMB_POC_DB9F		0x09		/* DB-9 pin female */
636437Smws #define	SMB_POC_RJ11		0x0A		/* RJ-11 */
637437Smws #define	SMB_POC_RJ45		0x0B		/* RJ-45 */
638437Smws #define	SMB_POC_MINISCSI	0x0C		/* 50-pin MiniSCSI */
639437Smws #define	SMB_POC_MINIDIN		0x0D		/* Mini-DIN */
640437Smws #define	SMB_POC_MICRODIN	0x0E		/* Micro-DIN */
641437Smws #define	SMB_POC_PS2		0x0F		/* PS/2 */
642437Smws #define	SMB_POC_IR		0x10		/* Infrared */
643437Smws #define	SMB_POC_HPHIL		0x11		/* HP-HIL */
644437Smws #define	SMB_POC_USB		0x12		/* USB */
645437Smws #define	SMB_POC_SSA		0x13		/* SSA SCSI */
646437Smws #define	SMB_POC_DIN8M		0x14		/* Circular DIN-8 male */
647437Smws #define	SMB_POC_DIN8F		0x15		/* Circular DIN-8 female */
648437Smws #define	SMB_POC_OBIDE		0x16		/* on-board IDE */
649437Smws #define	SMB_POC_OBFLOPPY	0x17		/* on-board floppy */
650437Smws #define	SMB_POC_DI9		0x18		/* 9p dual inline (p10 cut) */
651437Smws #define	SMB_POC_DI25		0x19		/* 25p dual inline (p26 cut) */
652437Smws #define	SMB_POC_DI50		0x1A		/* 50p dual inline */
653437Smws #define	SMB_POC_DI68		0x1B		/* 68p dual inline */
654437Smws #define	SMB_POC_CDROM		0x1C		/* on-board sound from CDROM */
655437Smws #define	SMB_POC_MINI14		0x1D		/* Mini-Centronics Type 14 */
656437Smws #define	SMB_POC_MINI26		0x1E		/* Mini-Centronics Type 26 */
657437Smws #define	SMB_POC_MINIJACK	0x1F		/* Mini-jack (headphones) */
658437Smws #define	SMB_POC_BNC		0x20		/* BNC */
659437Smws #define	SMB_POC_1394		0x21		/* 1394 */
660437Smws #define	SMB_POC_PC98		0xA0		/* PC-98 */
661437Smws #define	SMB_POC_PC98HR		0xA1		/* PC-98Hireso */
662437Smws #define	SMB_POC_PCH98		0xA2		/* PC-H98 */
663437Smws #define	SMB_POC_PC98NOTE	0xA3		/* PC-98Note */
664437Smws #define	SMB_POC_PC98FULL	0xA4		/* PC-98Full */
665437Smws #define	SMB_POC_OTHER		0xFF		/* other */
666437Smws 
667437Smws #define	SMB_POT_NONE		0x00		/* none */
668437Smws #define	SMB_POT_PP_XTAT		0x01		/* Parallel Port XT/AT compat */
669437Smws #define	SMB_POT_PP_PS2		0x02		/* Parallel Port PS/2 */
670437Smws #define	SMB_POT_PP_ECP		0x03		/* Parallel Port ECP */
671437Smws #define	SMB_POT_PP_EPP		0x04		/* Parallel Port EPP */
672437Smws #define	SMB_POT_PP_ECPEPP	0x05		/* Parallel Port ECP/EPP */
673437Smws #define	SMB_POT_SP_XTAT		0x06		/* Serial Port XT/AT compat */
674437Smws #define	SMB_POT_SP_16450	0x07		/* Serial Port 16450 compat */
675437Smws #define	SMB_POT_SP_16550	0x08		/* Serial Port 16550 compat */
676437Smws #define	SMB_POT_SP_16550A	0x09		/* Serial Port 16550A compat */
677437Smws #define	SMB_POT_SCSI		0x0A		/* SCSI port */
678437Smws #define	SMB_POT_MIDI		0x0B		/* MIDI port */
679437Smws #define	SMB_POT_JOYSTICK	0x0C		/* Joystick port */
680437Smws #define	SMB_POT_KEYBOARD	0x0D		/* Keyboard port */
681437Smws #define	SMB_POT_MOUSE		0x0E		/* Mouse port */
682437Smws #define	SMB_POT_SSA		0x0F		/* SSA SCSI */
683437Smws #define	SMB_POT_USB		0x10		/* USB */
684437Smws #define	SMB_POT_FIREWIRE	0x11		/* FireWrite (IEEE P1394) */
685437Smws #define	SMB_POT_PCMII		0x12		/* PCMCIA Type II */
686437Smws #define	SMB_POT_PCMIIa		0x13		/* PCMCIA Type II (alternate) */
687437Smws #define	SMB_POT_PCMIII		0x14		/* PCMCIA Type III */
688437Smws #define	SMB_POT_CARDBUS		0x15		/* Cardbus */
689437Smws #define	SMB_POT_ACCESS		0x16		/* Access Bus Port */
690437Smws #define	SMB_POT_SCSI2		0x17		/* SCSI II */
691437Smws #define	SMB_POT_SCSIW		0x18		/* SCSI Wide */
692437Smws #define	SMB_POT_PC98		0x19		/* PC-98 */
693437Smws #define	SMB_POT_PC98HR		0x1A		/* PC-98Hireso */
694437Smws #define	SMB_POT_PCH98		0x1B		/* PC-H98 */
695437Smws #define	SMB_POT_VIDEO		0x1C		/* Video port */
696437Smws #define	SMB_POT_AUDIO		0x1D		/* Audio port */
697437Smws #define	SMB_POT_MODEM		0x1E		/* Modem port */
698437Smws #define	SMB_POT_NETWORK		0x1F		/* Network port */
6997107Ssethg #define	SMB_POT_SATA		0x20		/* SATA */
7007107Ssethg #define	SMB_POT_SAS		0x21		/* SAS */
701437Smws #define	SMB_POT_8251		0xA0		/* 8251 compatible */
702437Smws #define	SMB_POT_8251F		0xA1		/* 8251 FIFO compatible */
703437Smws #define	SMB_POT_OTHER		0xFF		/* other */
704437Smws 
705437Smws /*
706437Smws  * SMBIOS Slot Information.  See DSP0134 Section 3.3.10 for more information.
707437Smws  * See DSP0134 3.3.10.5 for how to interpret the value of smbl_id.
708437Smws  */
709437Smws typedef struct smbios_slot {
710437Smws 	const char *smbl_name;		/* reference designation */
711437Smws 	uint8_t smbl_type;		/* slot type */
712437Smws 	uint8_t smbl_width;		/* slot data bus width */
713437Smws 	uint8_t smbl_usage;		/* current usage */
714437Smws 	uint8_t smbl_length;		/* slot length */
715437Smws 	uint16_t smbl_id;		/* slot ID */
716437Smws 	uint8_t smbl_ch1;		/* slot characteristics 1 */
717437Smws 	uint8_t smbl_ch2;		/* slot characteristics 2 */
718*11859STom.Pothier@Sun.COM 	uint16_t smbl_sg;		/* segment group number */
719*11859STom.Pothier@Sun.COM 	uint8_t smbl_bus;		/* bus number */
720*11859STom.Pothier@Sun.COM 	uint8_t smbl_df;		/* device/function number */
721437Smws } smbios_slot_t;
722437Smws 
723437Smws #define	SMB_SLT_OTHER		0x01	/* other */
724437Smws #define	SMB_SLT_UNKNOWN		0x02	/* unknown */
725437Smws #define	SMB_SLT_ISA		0x03	/* ISA */
726437Smws #define	SMB_SLT_MCA		0x04	/* MCA */
727437Smws #define	SMB_SLT_EISA		0x05	/* EISA */
728437Smws #define	SMB_SLT_PCI		0x06	/* PCI */
729437Smws #define	SMB_SLT_PCMCIA		0x07	/* PCMCIA */
730437Smws #define	SMB_SLT_VLVESA		0x08	/* VL-VESA */
731437Smws #define	SMB_SLT_PROPRIETARY	0x09	/* proprietary */
732437Smws #define	SMB_SLT_PROC		0x0A	/* processor card slot */
733437Smws #define	SMB_SLT_MEM		0x0B	/* proprietary memory card slot */
734437Smws #define	SMB_SLT_IOR		0x0C	/* I/O riser card slot */
735437Smws #define	SMB_SLT_NUBUS		0x0D	/* NuBus */
736437Smws #define	SMB_SLT_PCI66		0x0E	/* PCI (66MHz capable) */
737437Smws #define	SMB_SLT_AGP		0x0F	/* AGP */
738437Smws #define	SMB_SLT_AGP2X		0x10	/* AGP 2X */
739437Smws #define	SMB_SLT_AGP4X		0x11	/* AGP 4X */
740437Smws #define	SMB_SLT_PCIX		0x12	/* PCI-X */
741437Smws #define	SMB_SLT_AGP8X		0x13	/* AGP 8X */
742437Smws #define	SMB_SLT_PC98_C20	0xA0	/* PC-98/C20 */
743437Smws #define	SMB_SLT_PC98_C24	0xA1	/* PC-98/C24 */
744437Smws #define	SMB_SLT_PC98_E		0xA2	/* PC-98/E */
745437Smws #define	SMB_SLT_PC98_LB		0xA3	/* PC-98/Local Bus */
746437Smws #define	SMB_SLT_PC98_C		0xA4	/* PC-98/Card */
747437Smws #define	SMB_SLT_PCIE		0xA5	/* PCI Express */
7487107Ssethg #define	SMB_SLT_PCIE1		0xA6	/* PCI Express x1 */
7497107Ssethg #define	SMB_SLT_PCIE2		0xA7	/* PCI Express x2 */
7507107Ssethg #define	SMB_SLT_PCIE4		0xA8	/* PCI Express x4 */
7517107Ssethg #define	SMB_SLT_PCIE8		0xA9	/* PCI Express x8 */
7527107Ssethg #define	SMB_SLT_PCIE16		0xAA	/* PCI Express x16 */
753437Smws 
754437Smws #define	SMB_SLW_OTHER		0x01	/* other */
755437Smws #define	SMB_SLW_UNKNOWN		0x02	/* unknown */
756437Smws #define	SMB_SLW_8		0x03	/* 8 bit */
757437Smws #define	SMB_SLW_16		0x04	/* 16 bit */
758437Smws #define	SMB_SLW_32		0x05	/* 32 bit */
759437Smws #define	SMB_SLW_64		0x06	/* 64 bit */
760437Smws #define	SMB_SLW_128		0x07	/* 128 bit */
761437Smws #define	SMB_SLW_1X		0x08	/* 1x or x1 */
762437Smws #define	SMB_SLW_2X		0x09	/* 2x or x2 */
763437Smws #define	SMB_SLW_4X		0x0A	/* 4x or x4 */
764437Smws #define	SMB_SLW_8X		0x0B	/* 8x or x8 */
765437Smws #define	SMB_SLW_12X		0x0C	/* 12x or x12 */
766437Smws #define	SMB_SLW_16X		0x0D	/* 16x or x16 */
767437Smws #define	SMB_SLW_32X		0x0E	/* 32x or x32 */
768437Smws 
769437Smws #define	SMB_SLU_OTHER		0x01	/* other */
770437Smws #define	SMB_SLU_UNKNOWN		0x02	/* unknown */
771437Smws #define	SMB_SLU_AVAIL		0x03	/* available */
772437Smws #define	SMB_SLU_INUSE		0x04	/* in use */
773437Smws 
774437Smws #define	SMB_SLL_OTHER		0x01	/* other */
775437Smws #define	SMB_SLL_UNKNOWN		0x02	/* unknown */
776437Smws #define	SMB_SLL_SHORT		0x03	/* short length */
777437Smws #define	SMB_SLL_LONG		0x04	/* long length */
778437Smws 
779437Smws #define	SMB_SLCH1_UNKNOWN	0x01	/* characteristics unknown */
780437Smws #define	SMB_SLCH1_5V		0x02	/* provides 5.0V */
781437Smws #define	SMB_SLCH1_33V		0x04	/* provides 3.3V */
782437Smws #define	SMB_SLCH1_SHARED	0x08	/* opening shared with other slot */
783437Smws #define	SMB_SLCH1_PC16		0x10	/* slot supports PC Card-16 */
784437Smws #define	SMB_SLCH1_PCCB		0x20	/* slot supports CardBus */
785437Smws #define	SMB_SLCH1_PCZV		0x40	/* slot supports Zoom Video */
786437Smws #define	SMB_SLCH1_PCMRR		0x80	/* slot supports Modem Ring Resume */
787437Smws 
788437Smws #define	SMB_SLCH2_PME		0x01	/* slot supports PME# signal */
789437Smws #define	SMB_SLCH2_HOTPLUG	0x02	/* slot supports hot-plug devices */
790437Smws #define	SMB_SLCH2_SMBUS		0x04	/* slot supports SMBus signal */
791437Smws 
792437Smws /*
793437Smws  * SMBIOS On-Board Device Information.  See DSP0134 Section 3.3.11 for more
794437Smws  * information.  Any number of on-board device sections may be present, each
795437Smws  * containing one or more records.  The smbios_info_obdevs() function permits
796437Smws  * the caller to retrieve one or more of the records from a given section.
797437Smws  */
798437Smws typedef struct smbios_obdev {
799437Smws 	const char *smbd_name;		/* description string for this device */
800437Smws 	uint8_t smbd_type;		/* type code (SMB_OBT_*) */
801437Smws 	uint8_t smbd_enabled;		/* boolean (device is enabled) */
802437Smws } smbios_obdev_t;
803437Smws 
804437Smws #define	SMB_OBT_OTHER		0x01	/* other */
805437Smws #define	SMB_OBT_UNKNOWN		0x02	/* unknown */
806437Smws #define	SMB_OBT_VIDEO		0x03	/* video */
807437Smws #define	SMB_OBT_SCSI		0x04	/* scsi */
808437Smws #define	SMB_OBT_ETHERNET	0x05	/* ethernet */
809437Smws #define	SMB_OBT_TOKEN		0x06	/* token ring */
810437Smws #define	SMB_OBT_SOUND		0x07	/* sound */
8117107Ssethg #define	SMB_OBT_PATA		0x08	/* pata */
8127107Ssethg #define	SMB_OBT_SATA		0x09	/* sata */
8137107Ssethg #define	SMB_OBT_SAS		0x0A	/* sas */
814437Smws 
815437Smws /*
816437Smws  * SMBIOS BIOS Language Information.  See DSP0134 Section 3.3.14 for more
817437Smws  * information.  The smbios_info_strtab() function can be applied using a
818437Smws  * count of smbla_num to retrieve the other possible language settings.
819437Smws  */
820437Smws typedef struct smbios_lang {
821437Smws 	const char *smbla_cur;		/* current language setting */
822437Smws 	uint_t smbla_fmt;		/* language name format (see below) */
823437Smws 	uint_t smbla_num;		/* number of installed languages */
824437Smws } smbios_lang_t;
825437Smws 
826437Smws #define	SMB_LFMT_LONG	0		/* <ISO639>|<ISO3166>|Encoding Method */
827437Smws #define	SMB_LFMT_SHORT	1		/* <ISO930><ISO3166> */
828437Smws 
829437Smws /*
830437Smws  * SMBIOS System Event Log Information.  See DSP0134 Section 3.3.16 for more
831437Smws  * information.  Accessing the event log itself requires additional interfaces.
832437Smws  */
833437Smws typedef struct smbios_evtype {
834437Smws 	uint8_t smbevt_ltype;		/* log type */
835437Smws 	uint8_t smbevt_dtype;		/* variable data format type */
836437Smws } smbios_evtype_t;
837437Smws 
838437Smws typedef struct smbios_evlog {
839437Smws 	size_t smbev_size;		/* size in bytes of log area */
840437Smws 	size_t smbev_hdr;		/* offset or index of header */
841437Smws 	size_t smbev_data;		/* offset or index of data */
842437Smws 	uint8_t smbev_method;		/* data access method (see below) */
843437Smws 	uint8_t smbev_flags;		/* flags (see below) */
844437Smws 	uint8_t smbev_format;		/* log header format (see below) */
845437Smws 	uint8_t smbev_pad;		/* padding */
846437Smws 	uint32_t smbev_token;		/* data update change token */
847437Smws 	union {
848437Smws 		struct {
849437Smws 			uint16_t evi_iaddr; /* index address */
850437Smws 			uint16_t evi_daddr; /* data address */
851437Smws 		} eva_io;		/* i/o address for SMB_EVM_XxY */
852437Smws 		uint32_t eva_addr;	/* address for SMB_EVM_MEM32 */
853437Smws 		uint16_t eva_gpnv;	/* handle for SMB_EVM_GPNV */
854437Smws 	} smbev_addr;
855437Smws 	uint32_t smbev_typec;		/* number of type descriptors */
856437Smws 	const smbios_evtype_t *smbev_typev; /* type descriptor array */
857437Smws } smbios_evlog_t;
858437Smws 
859437Smws #define	SMB_EVM_1x1i_1x1d	0	/* I/O: 1 1b idx port, 1 1b data port */
860437Smws #define	SMB_EVM_2x1i_1x1d	1	/* I/O: 2 1b idx port, 1 1b data port */
861437Smws #define	SMB_EVM_1x2i_1x1d	2	/* I/O: 1 2b idx port, 1 1b data port */
862437Smws #define	SMB_EVM_MEM32		3	/* Memory-Mapped 32-bit Physical Addr */
863437Smws #define	SMB_EVM_GPNV		4	/* GP Non-Volatile API Access */
864437Smws 
865437Smws #define	SMB_EVFL_VALID		0x1	/* log area valid */
866437Smws #define	SMB_EVFL_FULL		0x2	/* log area full */
867437Smws 
868437Smws #define	SMB_EVHF_NONE		0	/* no log headers used */
869437Smws #define	SMB_EVHF_F1		1	/* DMTF log header type 1 */
870437Smws 
871437Smws /*
872437Smws  * SMBIOS Physical Memory Array Information.  See DSP0134 Section 3.3.17 for
873437Smws  * more information.  This describes a collection of physical memory devices.
874437Smws  */
875437Smws typedef struct smbios_memarray {
876437Smws 	uint8_t smbma_location;		/* physical device location */
877437Smws 	uint8_t smbma_use;		/* physical device functional purpose */
878437Smws 	uint8_t smbma_ecc;		/* error detect/correct mechanism */
879437Smws 	uint8_t smbma_pad0;		/* padding */
880437Smws 	uint32_t smbma_pad1;		/* padding */
881437Smws 	uint32_t smbma_ndevs;		/* number of slots or sockets */
882437Smws 	id_t smbma_err;			/* handle of error (if any) */
883437Smws 	uint64_t smbma_size;		/* maximum capacity in bytes */
884437Smws } smbios_memarray_t;
885437Smws 
886437Smws #define	SMB_MAL_OTHER		0x01	/* other */
887437Smws #define	SMB_MAL_UNKNOWN		0x02	/* unknown */
888437Smws #define	SMB_MAL_SYSMB		0x03	/* system board or motherboard */
889437Smws #define	SMB_MAL_ISA		0x04	/* ISA add-on card */
890437Smws #define	SMB_MAL_EISA		0x05	/* EISA add-on card */
891437Smws #define	SMB_MAL_PCI		0x06	/* PCI add-on card */
892437Smws #define	SMB_MAL_MCA		0x07	/* MCA add-on card */
893437Smws #define	SMB_MAL_PCMCIA		0x08	/* PCMCIA add-on card */
894437Smws #define	SMB_MAL_PROP		0x09	/* proprietary add-on card */
895437Smws #define	SMB_MAL_NUBUS		0x0A	/* NuBus */
896437Smws #define	SMB_MAL_PC98C20		0xA0	/* PC-98/C20 add-on card */
897437Smws #define	SMB_MAL_PC98C24		0xA1	/* PC-98/C24 add-on card */
898437Smws #define	SMB_MAL_PC98E		0xA2	/* PC-98/E add-on card */
899437Smws #define	SMB_MAL_PC98LB		0xA3	/* PC-98/Local bus add-on card */
900437Smws 
901437Smws #define	SMB_MAU_OTHER		0x01	/* other */
902437Smws #define	SMB_MAU_UNKNOWN		0x02	/* unknown */
903437Smws #define	SMB_MAU_SYSTEM		0x03	/* system memory */
904437Smws #define	SMB_MAU_VIDEO		0x04	/* video memory */
905437Smws #define	SMB_MAU_FLASH		0x05	/* flash memory */
906437Smws #define	SMB_MAU_NVRAM		0x06	/* non-volatile RAM */
907437Smws #define	SMB_MAU_CACHE		0x07	/* cache memory */
908437Smws 
909437Smws #define	SMB_MAE_OTHER		0x01	/* other */
910437Smws #define	SMB_MAE_UNKNOWN		0x02	/* unknown */
911437Smws #define	SMB_MAE_NONE		0x03	/* none */
912437Smws #define	SMB_MAE_PARITY		0x04	/* parity */
913437Smws #define	SMB_MAE_SECC		0x05	/* single-bit ECC */
914437Smws #define	SMB_MAE_MECC		0x06	/* multi-bit ECC */
915437Smws #define	SMB_MAE_CRC		0x07	/* CRC */
916437Smws 
917437Smws /*
918437Smws  * SMBIOS Memory Device Information.  See DSP0134 Section 3.3.18 for more
919437Smws  * information.  One or more of these structures are associated with each
920437Smws  * smbios_memarray_t.  A structure is present even for unpopulated sockets.
921437Smws  * Unknown values are set to -1.  A smbmd_size of 0 indicates unpopulated.
922437Smws  * WARNING: Some BIOSes appear to export the *maximum* size of the device
923437Smws  * that can appear in the corresponding socket as opposed to the current one.
924437Smws  */
925437Smws typedef struct smbios_memdevice {
926437Smws 	id_t smbmd_array;		/* handle of physical memory array */
927437Smws 	id_t smbmd_error;		/* handle of memory error data */
928437Smws 	uint32_t smbmd_twidth;		/* total width in bits including ecc */
929437Smws 	uint32_t smbmd_dwidth;		/* data width in bits */
930437Smws 	uint64_t smbmd_size;		/* size in bytes (see note above) */
931437Smws 	uint8_t smbmd_form;		/* form factor */
932437Smws 	uint8_t smbmd_set;		/* set (0x00=none, 0xFF=unknown) */
933437Smws 	uint8_t smbmd_type;		/* memory type */
934437Smws 	uint8_t smbmd_pad;		/* padding */
935437Smws 	uint32_t smbmd_flags;		/* flags (see below) */
936437Smws 	uint32_t smbmd_speed;		/* speed in nanoseconds */
937437Smws 	const char *smbmd_dloc;		/* physical device locator string */
938437Smws 	const char *smbmd_bloc;		/* physical bank locator string */
939437Smws } smbios_memdevice_t;
940437Smws 
941437Smws #define	SMB_MDFF_OTHER		0x01	/* other */
942437Smws #define	SMB_MDFF_UNKNOWN	0x02	/* unknown */
943437Smws #define	SMB_MDFF_SIMM		0x03	/* SIMM */
944437Smws #define	SMB_MDFF_SIP		0x04	/* SIP */
945437Smws #define	SMB_MDFF_CHIP		0x05	/* chip */
946437Smws #define	SMB_MDFF_DIP		0x06	/* DIP */
947437Smws #define	SMB_MDFF_ZIP		0x07	/* ZIP */
948437Smws #define	SMB_MDFF_PROP		0x08	/* proprietary card */
949437Smws #define	SMB_MDFF_DIMM		0x09	/* DIMM */
950437Smws #define	SMB_MDFF_TSOP		0x0A	/* TSOP */
951437Smws #define	SMB_MDFF_CHIPROW	0x0B	/* row of chips */
952437Smws #define	SMB_MDFF_RIMM		0x0C	/* RIMM */
953437Smws #define	SMB_MDFF_SODIMM		0x0D	/* SODIMM */
954437Smws #define	SMB_MDFF_SRIMM		0x0E	/* SRIMM */
9557107Ssethg #define	SMB_MDFF_FBDIMM		0x0F	/* FBDIMM */
956437Smws 
957437Smws #define	SMB_MDT_OTHER		0x01	/* other */
958437Smws #define	SMB_MDT_UNKNOWN		0x02	/* unknown */
959437Smws #define	SMB_MDT_DRAM		0x03	/* DRAM */
960437Smws #define	SMB_MDT_EDRAM		0x04	/* EDRAM */
961437Smws #define	SMB_MDT_VRAM		0x05	/* VRAM */
962437Smws #define	SMB_MDT_SRAM		0x06	/* SRAM */
963437Smws #define	SMB_MDT_RAM		0x07	/* RAM */
964437Smws #define	SMB_MDT_ROM		0x08	/* ROM */
965437Smws #define	SMB_MDT_FLASH		0x09	/* FLASH */
966437Smws #define	SMB_MDT_EEPROM		0x0A	/* EEPROM */
967437Smws #define	SMB_MDT_FEPROM		0x0B	/* FEPROM */
968437Smws #define	SMB_MDT_EPROM		0x0C	/* EPROM */
969437Smws #define	SMB_MDT_CDRAM		0x0D	/* CDRAM */
970437Smws #define	SMB_MDT_3DRAM		0x0E	/* 3DRAM */
971437Smws #define	SMB_MDT_SDRAM		0x0F	/* SDRAM */
972437Smws #define	SMB_MDT_SGRAM		0x10	/* SGRAM */
973437Smws #define	SMB_MDT_RDRAM		0x11	/* RDRAM */
974437Smws #define	SMB_MDT_DDR		0x12	/* DDR */
975437Smws #define	SMB_MDT_DDR2		0x13	/* DDR2 */
9767107Ssethg #define	SMB_MDT_DDR2FBDIMM	0x14	/* DDR2 FBDIMM */
977437Smws 
978437Smws #define	SMB_MDF_OTHER		0x0002	/* other */
979437Smws #define	SMB_MDF_UNKNOWN		0x0004	/* unknown */
980437Smws #define	SMB_MDF_FASTPG		0x0008	/* fast-paged */
981437Smws #define	SMB_MDF_STATIC		0x0010	/* static column */
982437Smws #define	SMB_MDF_PSTATIC		0x0020	/* pseudo-static */
983437Smws #define	SMB_MDF_RAMBUS		0x0040	/* RAMBUS */
984437Smws #define	SMB_MDF_SYNC		0x0080	/* synchronous */
985437Smws #define	SMB_MDF_CMOS		0x0100	/* CMOS */
986437Smws #define	SMB_MDF_EDO		0x0200	/* EDO */
987437Smws #define	SMB_MDF_WDRAM		0x0400	/* Window DRAM */
988437Smws #define	SMB_MDF_CDRAM		0x0800	/* Cache DRAM */
989437Smws #define	SMB_MDF_NV		0x1000	/* non-volatile */
990437Smws 
991437Smws /*
992437Smws  * SMBIOS Memory Array Mapped Address.  See DSP0134 Section 3.3.20 for more
993437Smws  * information.  We convert start/end addresses into addr/size for convenience.
994437Smws  */
995437Smws typedef struct smbios_memarrmap {
996437Smws 	id_t smbmam_array;		/* physical memory array handle */
997437Smws 	uint32_t smbmam_width;		/* number of devices that form a row */
998437Smws 	uint64_t smbmam_addr;		/* physical address of mapping */
999437Smws 	uint64_t smbmam_size;		/* size in bytes of address range */
1000437Smws } smbios_memarrmap_t;
1001437Smws 
1002437Smws /*
1003437Smws  * SMBIOS Memory Device Mapped Address.  See DSP0134 Section 3.3.21 for more
1004437Smws  * information.  We convert start/end addresses into addr/size for convenience.
1005437Smws  */
1006437Smws typedef struct smbios_memdevmap {
1007437Smws 	id_t smbmdm_device;		/* memory device handle */
1008437Smws 	id_t smbmdm_arrmap;		/* memory array mapped address handle */
1009437Smws 	uint64_t smbmdm_addr;		/* physical address of mapping */
1010437Smws 	uint64_t smbmdm_size;		/* size in bytes of address range */
1011437Smws 	uint8_t smbmdm_rpos;		/* partition row position */
1012437Smws 	uint8_t smbmdm_ipos;		/* interleave position */
1013437Smws 	uint8_t smbmdm_idepth;		/* interleave data depth */
1014437Smws } smbios_memdevmap_t;
1015437Smws 
1016437Smws /*
1017437Smws  * SMBIOS Hardware Security Settings.  See DSP0134 Section 3.3.25 for more
1018437Smws  * information.  Only one such record will be present in the SMBIOS.
1019437Smws  */
1020437Smws typedef struct smbios_hwsec {
1021437Smws 	uint8_t smbh_pwr_ps;		/* power-on password status */
1022437Smws 	uint8_t smbh_kbd_ps;		/* keyboard password status */
1023437Smws 	uint8_t smbh_adm_ps;		/* administrator password status */
1024437Smws 	uint8_t smbh_pan_ps;		/* front panel reset status */
1025437Smws } smbios_hwsec_t;
1026437Smws 
1027437Smws #define	SMB_HWSEC_PS_DISABLED	0x00	/* password disabled */
1028437Smws #define	SMB_HWSEC_PS_ENABLED	0x01	/* password enabled */
1029437Smws #define	SMB_HWSEC_PS_NOTIMPL	0x02	/* password not implemented */
1030437Smws #define	SMB_HWSEC_PS_UNKNOWN	0x03	/* password status unknown */
1031437Smws 
1032437Smws /*
1033437Smws  * SMBIOS System Boot Information.  See DSP0134 Section 3.3.33 for more
1034437Smws  * information.  The contents of the data varies by type and is undocumented
1035437Smws  * from the perspective of DSP0134 -- it seems to be left as vendor-specific.
1036437Smws  * The (D) annotation next to SMB_BOOT_* below indicates possible data payload.
1037437Smws  */
1038437Smws typedef struct smbios_boot {
1039437Smws 	uint8_t smbt_status;		/* boot status code (see below) */
1040437Smws 	const void *smbt_data;		/* data buffer specific to status */
1041437Smws 	size_t smbt_size;		/* size of smbt_data buffer in bytes */
1042437Smws } smbios_boot_t;
1043437Smws 
1044437Smws #define	SMB_BOOT_NORMAL		0	/* no errors detected */
1045437Smws #define	SMB_BOOT_NOMEDIA	1	/* no bootable media */
1046437Smws #define	SMB_BOOT_OSFAIL		2	/* normal o/s failed to load */
1047437Smws #define	SMB_BOOT_FWHWFAIL	3	/* firmware-detected hardware failure */
1048437Smws #define	SMB_BOOT_OSHWFAIL	4	/* o/s-detected hardware failure */
1049437Smws #define	SMB_BOOT_USERREQ	5	/* user-requested boot (keystroke) */
1050437Smws #define	SMB_BOOT_SECURITY	6	/* system security violation */
1051437Smws #define	SMB_BOOT_PREVREQ	7	/* previously requested image (D) */
1052437Smws #define	SMB_BOOT_WATCHDOG	8	/* watchdog initiated reboot */
1053437Smws #define	SMB_BOOT_RESV_LO	9	/* low end of reserved range */
1054437Smws #define	SMB_BOOT_RESV_HI	127	/* high end of reserved range */
1055437Smws #define	SMB_BOOT_OEM_LO		128	/* low end of OEM-specific range */
1056437Smws #define	SMB_BOOT_OEM_HI		191	/* high end of OEM-specific range */
1057437Smws #define	SMB_BOOT_PROD_LO	192	/* low end of product-specific range */
1058437Smws #define	SMB_BOOT_PROD_HI	255	/* high end of product-specific range */
1059437Smws 
1060437Smws /*
1061437Smws  * SMBIOS IPMI Device Information.  See DSP0134 Section 3.3.39 and also
1062437Smws  * Appendix C1 of the IPMI specification for more information on this record.
1063437Smws  */
1064437Smws typedef struct smbios_ipmi {
1065437Smws 	uint_t smbip_type;		/* BMC interface type */
1066437Smws 	smbios_version_t smbip_vers;	/* BMC's IPMI specification version */
1067437Smws 	uint32_t smbip_i2c;		/* BMC I2C bus slave address */
1068437Smws 	uint32_t smbip_bus;		/* bus ID of NV storage device, or -1 */
1069437Smws 	uint64_t smbip_addr;		/* BMC base address */
1070437Smws 	uint32_t smbip_flags;		/* flags (see below) */
1071437Smws 	uint16_t smbip_intr;		/* interrupt number (or zero if none) */
1072437Smws 	uint16_t smbip_regspacing;	/* i/o space register spacing (bytes) */
1073437Smws } smbios_ipmi_t;
1074437Smws 
1075437Smws #define	SMB_IPMI_T_UNKNOWN	0x00	/* unknown */
1076437Smws #define	SMB_IPMI_T_KCS		0x01	/* KCS: Keyboard Controller Style */
1077437Smws #define	SMB_IPMI_T_SMIC		0x02	/* SMIC: Server Mgmt Interface Chip */
1078437Smws #define	SMB_IPMI_T_BT		0x03	/* BT: Block Transfer */
1079437Smws #define	SMB_IPMI_T_SSIF		0x04	/* SSIF: SMBus System Interface */
1080437Smws 
1081437Smws #define	SMB_IPMI_F_IOADDR	0x01	/* base address is in i/o space */
1082437Smws #define	SMB_IPMI_F_INTRSPEC	0x02	/* intr information is specified */
1083437Smws #define	SMB_IPMI_F_INTRHIGH	0x04	/* intr active high (else low) */
1084437Smws #define	SMB_IPMI_F_INTREDGE	0x08	/* intr is edge triggered (else lvl) */
1085437Smws 
1086437Smws /*
1087*11859STom.Pothier@Sun.COM  * SMBIOS Onboard Devices Extended Information.  See DSP0134 Section 3.3.42
1088*11859STom.Pothier@Sun.COM  * for more information.
1089*11859STom.Pothier@Sun.COM  */
1090*11859STom.Pothier@Sun.COM typedef struct smbios_obdev_ext {
1091*11859STom.Pothier@Sun.COM 	const char *smboe_name;		/* reference designation */
1092*11859STom.Pothier@Sun.COM 	uint8_t smboe_dtype;		/* device type */
1093*11859STom.Pothier@Sun.COM 	uint8_t smboe_dti;		/* device type instance */
1094*11859STom.Pothier@Sun.COM 	uint16_t smboe_sg;		/* segment group number */
1095*11859STom.Pothier@Sun.COM 	uint8_t smboe_bus;		/* bus number */
1096*11859STom.Pothier@Sun.COM 	uint8_t smboe_df;		/* device/function number */
1097*11859STom.Pothier@Sun.COM } smbios_obdev_ext_t;
1098*11859STom.Pothier@Sun.COM 
1099*11859STom.Pothier@Sun.COM 
1100*11859STom.Pothier@Sun.COM /*
110110942STom.Pothier@Sun.COM  * SMBIOS OEM-specific (Type 132) Processor Extended Information.
110210942STom.Pothier@Sun.COM  */
110310942STom.Pothier@Sun.COM typedef struct smbios_processor_ext {
110410942STom.Pothier@Sun.COM 	uint16_t smbpe_processor;	/* extending processor handle */
110510942STom.Pothier@Sun.COM 	uint8_t smbpe_fru;		/* FRU indicaor */
110610942STom.Pothier@Sun.COM 	uint8_t smbpe_n;		/* number of APIC IDs */
110710942STom.Pothier@Sun.COM 	uint16_t *smbpe_apicid;		/* strand Inital APIC IDs */
110810942STom.Pothier@Sun.COM } smbios_processor_ext_t;
110910942STom.Pothier@Sun.COM 
111010942STom.Pothier@Sun.COM /*
1111*11859STom.Pothier@Sun.COM  * SMBIOS OEM-specific (Type 136) Port Extended Information.
1112*11859STom.Pothier@Sun.COM  */
1113*11859STom.Pothier@Sun.COM typedef struct smbios_port_ext {
1114*11859STom.Pothier@Sun.COM 	uint16_t smbporte_chassis;	/* chassis handle */
1115*11859STom.Pothier@Sun.COM 	uint16_t smbporte_port;		/* port connector handle */
1116*11859STom.Pothier@Sun.COM 	uint8_t smbporte_dtype;		/* device type */
1117*11859STom.Pothier@Sun.COM 	uint16_t smbporte_devhdl;	/* device handle */
1118*11859STom.Pothier@Sun.COM 	uint8_t smbporte_phy;		/* PHY number */
1119*11859STom.Pothier@Sun.COM } smbios_port_ext_t;
1120*11859STom.Pothier@Sun.COM 
1121*11859STom.Pothier@Sun.COM /*
112210942STom.Pothier@Sun.COM  * SMBIOS OEM-specific (Type 138) PCI-Express RC/RP Information.
112310942STom.Pothier@Sun.COM  */
112410942STom.Pothier@Sun.COM typedef struct smbios_pciexrc {
112510942STom.Pothier@Sun.COM 	uint16_t smbpcie_bb;		/* base board handle */
112610942STom.Pothier@Sun.COM 	uint16_t smbpcie_bdf;		/* Bus/Dev/Funct (PCI) */
112710942STom.Pothier@Sun.COM } smbios_pciexrc_t;
112810942STom.Pothier@Sun.COM 
112910942STom.Pothier@Sun.COM /*
113010942STom.Pothier@Sun.COM  * SMBIOS OEM-specific (Type 144) Memory Array Extended Information.
113110942STom.Pothier@Sun.COM  */
113210942STom.Pothier@Sun.COM typedef struct smbios_memarray_ext {
113310942STom.Pothier@Sun.COM 	uint16_t smbmae_ma;		/* memory array handle */
113410942STom.Pothier@Sun.COM 	uint16_t smbmae_comp;		/* component parent handle */
113510942STom.Pothier@Sun.COM 	uint16_t smbmae_bdf;		/* Bus/Dev/Funct (PCI) */
113610942STom.Pothier@Sun.COM } smbios_memarray_ext_t;
113710942STom.Pothier@Sun.COM 
113810942STom.Pothier@Sun.COM /*
113910942STom.Pothier@Sun.COM  * SMBIOS OEM-specific (Type 145) Memory Device Extended Information.
114010942STom.Pothier@Sun.COM  */
114110942STom.Pothier@Sun.COM typedef struct smbios_memdevice_ext {
114210942STom.Pothier@Sun.COM 	uint16_t smbmdeve_md;		/* memory device handle */
114310942STom.Pothier@Sun.COM 	uint8_t smbmdeve_drch;		/* DRAM channel */
114410942STom.Pothier@Sun.COM 	uint8_t smbmdeve_ncs;		/* number of chip selects */
114510942STom.Pothier@Sun.COM 	uint8_t *smbmdeve_cs;		/* array of chip select numbers */
114610942STom.Pothier@Sun.COM } smbios_memdevice_ext_t;
114710942STom.Pothier@Sun.COM 
114810942STom.Pothier@Sun.COM /*
1149437Smws  * SMBIOS Interfaces.  An SMBIOS image can be opened by either providing a file
1150437Smws  * pathname, device pathname, file descriptor, or raw memory buffer.  Once an
1151437Smws  * image is opened the functions below can be used to iterate over the various
1152437Smws  * structures and convert the underlying data representation into the simpler
1153437Smws  * data structures described earlier in this header file.  The SMB_VERSION
1154437Smws  * constant specified when opening an image indicates the version of the ABI
1155437Smws  * the caller expects and the DMTF SMBIOS version the client can understand.
1156437Smws  * The library will then map older or newer data structures to that as needed.
1157437Smws  */
1158437Smws 
1159437Smws #define	SMB_VERSION_23	0x0203		/* SMBIOS encoding for DMTF spec 2.3 */
1160437Smws #define	SMB_VERSION_24	0x0204		/* SMBIOS encoding for DMTF spec 2.4 */
1161437Smws #define	SMB_VERSION	SMB_VERSION_24	/* SMBIOS latest version definitions */
1162437Smws 
1163437Smws #define	SMB_O_NOCKSUM	0x1		/* do not verify header checksums */
1164437Smws #define	SMB_O_NOVERS	0x2		/* do not verify header versions */
1165437Smws #define	SMB_O_ZIDS	0x4		/* strip out identification numbers */
1166437Smws #define	SMB_O_MASK	0x7		/* mask of valid smbios_*open flags */
1167437Smws 
1168437Smws #define	SMB_ID_NOTSUP	0xFFFE		/* structure is not supported by BIOS */
1169437Smws #define	SMB_ID_NONE	0xFFFF		/* structure is a null reference */
1170437Smws 
1171437Smws #define	SMB_ERR		(-1)		/* id_t value indicating error */
1172437Smws 
1173437Smws typedef struct smbios_hdl smbios_hdl_t;
1174437Smws 
1175437Smws typedef struct smbios_struct {
1176437Smws 	id_t smbstr_id;			/* structure ID handle */
1177437Smws 	uint_t smbstr_type;		/* structure type */
1178437Smws 	const void *smbstr_data;	/* structure data */
1179437Smws 	size_t smbstr_size;		/* structure size */
1180437Smws } smbios_struct_t;
1181437Smws 
1182437Smws typedef int smbios_struct_f(smbios_hdl_t *,
1183437Smws     const smbios_struct_t *, void *);
1184437Smws 
1185437Smws extern smbios_hdl_t *smbios_open(const char *, int, int, int *);
1186437Smws extern smbios_hdl_t *smbios_fdopen(int, int, int, int *);
1187437Smws extern smbios_hdl_t *smbios_bufopen(const smbios_entry_t *,
1188437Smws     const void *, size_t, int, int, int *);
1189437Smws 
1190437Smws extern const void *smbios_buf(smbios_hdl_t *);
1191437Smws extern size_t smbios_buflen(smbios_hdl_t *);
1192437Smws 
1193437Smws extern void smbios_checksum(smbios_hdl_t *, smbios_entry_t *);
1194437Smws extern int smbios_write(smbios_hdl_t *, int);
1195437Smws extern void smbios_close(smbios_hdl_t *);
1196437Smws 
1197437Smws extern int smbios_errno(smbios_hdl_t *);
1198437Smws extern const char *smbios_errmsg(int);
1199437Smws 
1200437Smws extern int smbios_lookup_id(smbios_hdl_t *, id_t, smbios_struct_t *);
120110942STom.Pothier@Sun.COM extern int smbios_lookup_type(smbios_hdl_t *, uint_t, smbios_struct_t *);
1202437Smws extern int smbios_iter(smbios_hdl_t *, smbios_struct_f *, void *);
1203437Smws 
1204437Smws extern void smbios_info_smbios(smbios_hdl_t *, smbios_entry_t *);
1205437Smws extern int smbios_info_common(smbios_hdl_t *, id_t, smbios_info_t *);
120610942STom.Pothier@Sun.COM extern int smbios_info_contains(smbios_hdl_t *, id_t, uint_t, id_t *);
1207437Smws extern id_t smbios_info_bios(smbios_hdl_t *, smbios_bios_t *);
1208437Smws extern id_t smbios_info_system(smbios_hdl_t *, smbios_system_t *);
1209437Smws extern int smbios_info_bboard(smbios_hdl_t *, id_t, smbios_bboard_t *);
1210437Smws extern int smbios_info_chassis(smbios_hdl_t *, id_t, smbios_chassis_t *);
1211437Smws extern int smbios_info_processor(smbios_hdl_t *, id_t, smbios_processor_t *);
121210942STom.Pothier@Sun.COM extern int smbios_info_extprocessor(smbios_hdl_t *, id_t,
121310942STom.Pothier@Sun.COM     smbios_processor_ext_t *);
1214437Smws extern int smbios_info_cache(smbios_hdl_t *, id_t, smbios_cache_t *);
1215437Smws extern int smbios_info_port(smbios_hdl_t *, id_t, smbios_port_t *);
1216*11859STom.Pothier@Sun.COM extern int smbios_info_extport(smbios_hdl_t *, id_t, smbios_port_ext_t *);
1217437Smws extern int smbios_info_slot(smbios_hdl_t *, id_t, smbios_slot_t *);
1218437Smws extern int smbios_info_obdevs(smbios_hdl_t *, id_t, int, smbios_obdev_t *);
1219*11859STom.Pothier@Sun.COM extern int smbios_info_obdevs_ext(smbios_hdl_t *, id_t, smbios_obdev_ext_t *);
1220437Smws extern int smbios_info_strtab(smbios_hdl_t *, id_t, int, const char *[]);
1221437Smws extern id_t smbios_info_lang(smbios_hdl_t *, smbios_lang_t *);
1222437Smws extern id_t smbios_info_eventlog(smbios_hdl_t *, smbios_evlog_t *);
1223437Smws extern int smbios_info_memarray(smbios_hdl_t *, id_t, smbios_memarray_t *);
122410942STom.Pothier@Sun.COM extern int smbios_info_extmemarray(smbios_hdl_t *, id_t,
122510942STom.Pothier@Sun.COM     smbios_memarray_ext_t *);
1226437Smws extern int smbios_info_memarrmap(smbios_hdl_t *, id_t, smbios_memarrmap_t *);
1227437Smws extern int smbios_info_memdevice(smbios_hdl_t *, id_t, smbios_memdevice_t *);
122810942STom.Pothier@Sun.COM extern int smbios_info_extmemdevice(smbios_hdl_t *, id_t,
122910942STom.Pothier@Sun.COM     smbios_memdevice_ext_t *);
1230437Smws extern int smbios_info_memdevmap(smbios_hdl_t *, id_t, smbios_memdevmap_t *);
1231437Smws extern id_t smbios_info_hwsec(smbios_hdl_t *, smbios_hwsec_t *);
1232437Smws extern id_t smbios_info_boot(smbios_hdl_t *, smbios_boot_t *);
1233437Smws extern id_t smbios_info_ipmi(smbios_hdl_t *, smbios_ipmi_t *);
123410942STom.Pothier@Sun.COM extern int smbios_info_pciexrc(smbios_hdl_t *, id_t, smbios_pciexrc_t *);
1235437Smws 
123610462SSean.Ye@Sun.COM extern const char *smbios_psn(smbios_hdl_t *);
123710462SSean.Ye@Sun.COM extern const char *smbios_csn(smbios_hdl_t *);
123810462SSean.Ye@Sun.COM 
1239437Smws #ifndef _KERNEL
1240437Smws /*
1241437Smws  * The smbios_*_desc() and smbios_*_name() interfaces can be used for utilities
1242437Smws  * such as smbios(1M) that wish to decode SMBIOS fields for humans.  The _desc
1243437Smws  * functions return the comment string next to the #defines listed above, and
1244437Smws  * the _name functions return the appropriate #define identifier itself.
1245437Smws  */
1246437Smws extern const char *smbios_bboard_flag_desc(uint_t);
1247437Smws extern const char *smbios_bboard_flag_name(uint_t);
1248437Smws extern const char *smbios_bboard_type_desc(uint_t);
1249437Smws 
1250437Smws extern const char *smbios_bios_flag_desc(uint64_t);
1251437Smws extern const char *smbios_bios_flag_name(uint64_t);
1252437Smws 
1253437Smws extern const char *smbios_bios_xb1_desc(uint_t);
1254437Smws extern const char *smbios_bios_xb1_name(uint_t);
1255437Smws extern const char *smbios_bios_xb2_desc(uint_t);
1256437Smws extern const char *smbios_bios_xb2_name(uint_t);
1257437Smws 
1258437Smws extern const char *smbios_boot_desc(uint_t);
1259437Smws 
1260437Smws extern const char *smbios_cache_assoc_desc(uint_t);
1261437Smws extern const char *smbios_cache_ctype_desc(uint_t);
1262437Smws extern const char *smbios_cache_ctype_name(uint_t);
1263437Smws extern const char *smbios_cache_ecc_desc(uint_t);
1264437Smws extern const char *smbios_cache_flag_desc(uint_t);
1265437Smws extern const char *smbios_cache_flag_name(uint_t);
1266437Smws extern const char *smbios_cache_loc_desc(uint_t);
1267437Smws extern const char *smbios_cache_logical_desc(uint_t);
1268437Smws extern const char *smbios_cache_mode_desc(uint_t);
1269437Smws 
1270437Smws extern const char *smbios_chassis_state_desc(uint_t);
1271437Smws extern const char *smbios_chassis_type_desc(uint_t);
1272437Smws 
1273437Smws extern const char *smbios_evlog_flag_desc(uint_t);
1274437Smws extern const char *smbios_evlog_flag_name(uint_t);
1275437Smws extern const char *smbios_evlog_format_desc(uint_t);
1276437Smws extern const char *smbios_evlog_method_desc(uint_t);
1277437Smws 
1278437Smws extern const char *smbios_ipmi_flag_name(uint_t);
1279437Smws extern const char *smbios_ipmi_flag_desc(uint_t);
1280437Smws extern const char *smbios_ipmi_type_desc(uint_t);
1281437Smws 
1282437Smws extern const char *smbios_hwsec_desc(uint_t);
1283437Smws 
1284437Smws extern const char *smbios_memarray_loc_desc(uint_t);
1285437Smws extern const char *smbios_memarray_use_desc(uint_t);
1286437Smws extern const char *smbios_memarray_ecc_desc(uint_t);
1287437Smws 
1288437Smws extern const char *smbios_memdevice_form_desc(uint_t);
1289437Smws extern const char *smbios_memdevice_type_desc(uint_t);
1290437Smws extern const char *smbios_memdevice_flag_name(uint_t);
1291437Smws extern const char *smbios_memdevice_flag_desc(uint_t);
1292437Smws 
1293437Smws extern const char *smbios_port_conn_desc(uint_t);
1294437Smws extern const char *smbios_port_type_desc(uint_t);
1295437Smws 
1296437Smws extern const char *smbios_processor_family_desc(uint_t);
1297437Smws extern const char *smbios_processor_status_desc(uint_t);
1298437Smws extern const char *smbios_processor_type_desc(uint_t);
1299437Smws extern const char *smbios_processor_upgrade_desc(uint_t);
1300437Smws 
1301437Smws extern const char *smbios_slot_type_desc(uint_t);
1302437Smws extern const char *smbios_slot_width_desc(uint_t);
1303437Smws extern const char *smbios_slot_usage_desc(uint_t);
1304437Smws extern const char *smbios_slot_length_desc(uint_t);
1305437Smws extern const char *smbios_slot_ch1_desc(uint_t);
1306437Smws extern const char *smbios_slot_ch1_name(uint_t);
1307437Smws extern const char *smbios_slot_ch2_desc(uint_t);
1308437Smws extern const char *smbios_slot_ch2_name(uint_t);
1309437Smws 
1310437Smws extern const char *smbios_type_desc(uint_t);
1311437Smws extern const char *smbios_type_name(uint_t);
1312437Smws 
1313437Smws extern const char *smbios_system_wakeup_desc(uint_t);
1314437Smws #endif /* !_KERNEL */
1315437Smws 
1316437Smws #ifdef _KERNEL
1317437Smws /*
1318437Smws  * For SMBIOS clients within the kernel itself, ksmbios is used to refer to
1319437Smws  * the kernel's current snapshot of the SMBIOS, if one exists, and the
1320437Smws  * ksmbios_flags tunable is the set of flags for use with smbios_open().
1321437Smws  */
1322437Smws extern smbios_hdl_t *ksmbios;
1323437Smws extern int ksmbios_flags;
1324437Smws #endif /* _KERNEL */
1325437Smws 
1326437Smws #ifdef	__cplusplus
1327437Smws }
1328437Smws #endif
1329437Smws 
1330437Smws #endif	/* _SYS_SMBIOS_H */
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