1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 28*0Sstevel@tonic-gate 29*0Sstevel@tonic-gate #include <sys/types.h> 30*0Sstevel@tonic-gate #include <sys/param.h> 31*0Sstevel@tonic-gate #include <sys/var.h> 32*0Sstevel@tonic-gate #include <sys/thread.h> 33*0Sstevel@tonic-gate #include <sys/cpuvar.h> 34*0Sstevel@tonic-gate #include <sys/kstat.h> 35*0Sstevel@tonic-gate #include <sys/uadmin.h> 36*0Sstevel@tonic-gate #include <sys/systm.h> 37*0Sstevel@tonic-gate #include <sys/errno.h> 38*0Sstevel@tonic-gate #include <sys/cmn_err.h> 39*0Sstevel@tonic-gate #include <sys/procset.h> 40*0Sstevel@tonic-gate #include <sys/processor.h> 41*0Sstevel@tonic-gate #include <sys/debug.h> 42*0Sstevel@tonic-gate #include <sys/cyclic.h> 43*0Sstevel@tonic-gate #include <sys/pool_pset.h> 44*0Sstevel@tonic-gate 45*0Sstevel@tonic-gate /* 46*0Sstevel@tonic-gate * cpu_intr_on - determine whether the CPU is participating 47*0Sstevel@tonic-gate * in I/O interrupts. 48*0Sstevel@tonic-gate */ 49*0Sstevel@tonic-gate int cpu_intr_on(cpu_t * cp)50*0Sstevel@tonic-gatecpu_intr_on(cpu_t *cp) 51*0Sstevel@tonic-gate { 52*0Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 53*0Sstevel@tonic-gate return ((cp->cpu_flags & CPU_ENABLE) != 0); 54*0Sstevel@tonic-gate } 55*0Sstevel@tonic-gate 56*0Sstevel@tonic-gate /* 57*0Sstevel@tonic-gate * Return the next on-line CPU handling interrupts. 58*0Sstevel@tonic-gate */ 59*0Sstevel@tonic-gate cpu_t * cpu_intr_next(cpu_t * cp)60*0Sstevel@tonic-gatecpu_intr_next(cpu_t *cp) 61*0Sstevel@tonic-gate { 62*0Sstevel@tonic-gate cpu_t *c; 63*0Sstevel@tonic-gate 64*0Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 65*0Sstevel@tonic-gate 66*0Sstevel@tonic-gate c = cp->cpu_next_onln; 67*0Sstevel@tonic-gate while (c != cp) { 68*0Sstevel@tonic-gate if (cpu_intr_on(c)) { 69*0Sstevel@tonic-gate return (c); 70*0Sstevel@tonic-gate } 71*0Sstevel@tonic-gate c = c->cpu_next_onln; 72*0Sstevel@tonic-gate } 73*0Sstevel@tonic-gate return (NULL); 74*0Sstevel@tonic-gate } 75*0Sstevel@tonic-gate 76*0Sstevel@tonic-gate /* 77*0Sstevel@tonic-gate * cpu_intr_count - count how many CPUs are handling I/O interrupts. 78*0Sstevel@tonic-gate */ 79*0Sstevel@tonic-gate int cpu_intr_count(cpu_t * cp)80*0Sstevel@tonic-gatecpu_intr_count(cpu_t *cp) 81*0Sstevel@tonic-gate { 82*0Sstevel@tonic-gate cpu_t *c; 83*0Sstevel@tonic-gate int count = 0; 84*0Sstevel@tonic-gate 85*0Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 86*0Sstevel@tonic-gate c = cp; 87*0Sstevel@tonic-gate do { 88*0Sstevel@tonic-gate if (cpu_intr_on(c)) { 89*0Sstevel@tonic-gate ++count; 90*0Sstevel@tonic-gate } 91*0Sstevel@tonic-gate } while ((c = c->cpu_next) != cp); 92*0Sstevel@tonic-gate return (count); 93*0Sstevel@tonic-gate } 94*0Sstevel@tonic-gate 95*0Sstevel@tonic-gate /* 96*0Sstevel@tonic-gate * Enable I/O interrupts on this CPU, if they are disabled. 97*0Sstevel@tonic-gate */ 98*0Sstevel@tonic-gate void cpu_intr_enable(cpu_t * cp)99*0Sstevel@tonic-gatecpu_intr_enable(cpu_t *cp) 100*0Sstevel@tonic-gate { 101*0Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 102*0Sstevel@tonic-gate if (!cpu_intr_on(cp)) { 103*0Sstevel@tonic-gate cpu_enable_intr(cp); 104*0Sstevel@tonic-gate cpu_set_state(cp); 105*0Sstevel@tonic-gate } 106*0Sstevel@tonic-gate } 107*0Sstevel@tonic-gate 108*0Sstevel@tonic-gate /* 109*0Sstevel@tonic-gate * cpu_intr_disable - redirect I/O interrupts targetted at this CPU. 110*0Sstevel@tonic-gate * 111*0Sstevel@tonic-gate * semantics: We check the count of CPUs that are accepting 112*0Sstevel@tonic-gate * interrupts, because it's stupid to take the last CPU out 113*0Sstevel@tonic-gate * of I/O interrupt participation. This also permits the 114*0Sstevel@tonic-gate * p_online syscall to fail gracefully in uniprocessor configurations 115*0Sstevel@tonic-gate * without having to perform any special platform-specific operations. 116*0Sstevel@tonic-gate */ 117*0Sstevel@tonic-gate int cpu_intr_disable(cpu_t * cp)118*0Sstevel@tonic-gatecpu_intr_disable(cpu_t *cp) 119*0Sstevel@tonic-gate { 120*0Sstevel@tonic-gate int e = EBUSY; 121*0Sstevel@tonic-gate 122*0Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 123*0Sstevel@tonic-gate if ((cpu_intr_count(cp) > 1) && (cpu_intr_next(cp) != NULL)) { 124*0Sstevel@tonic-gate if (cpu_intr_on(cp)) { 125*0Sstevel@tonic-gate /* 126*0Sstevel@tonic-gate * Juggle away cyclics, but don't fail if we don't 127*0Sstevel@tonic-gate * manage to juggle all of them away; we want to allow 128*0Sstevel@tonic-gate * CPU-bound cyclics to continue to fire on the 129*0Sstevel@tonic-gate * sheltered CPU. 130*0Sstevel@tonic-gate */ 131*0Sstevel@tonic-gate (void) cyclic_juggle(cp); 132*0Sstevel@tonic-gate e = cpu_disable_intr(cp); 133*0Sstevel@tonic-gate } 134*0Sstevel@tonic-gate } 135*0Sstevel@tonic-gate if (e == 0) 136*0Sstevel@tonic-gate cpu_set_state(cp); 137*0Sstevel@tonic-gate return (e); 138*0Sstevel@tonic-gate } 139