10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 50Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 60Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 70Sstevel@tonic-gate * with the License. 80Sstevel@tonic-gate * 90Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 100Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 110Sstevel@tonic-gate * See the License for the specific language governing permissions 120Sstevel@tonic-gate * and limitations under the License. 130Sstevel@tonic-gate * 140Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 150Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 160Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 170Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 180Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 190Sstevel@tonic-gate * 200Sstevel@tonic-gate * CDDL HEADER END 210Sstevel@tonic-gate */ 220Sstevel@tonic-gate /* 230Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #ifndef _DT_PCB_H 280Sstevel@tonic-gate #define _DT_PCB_H 290Sstevel@tonic-gate 300Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 310Sstevel@tonic-gate 320Sstevel@tonic-gate #include <dtrace.h> 330Sstevel@tonic-gate #include <setjmp.h> 340Sstevel@tonic-gate #include <stdio.h> 350Sstevel@tonic-gate 360Sstevel@tonic-gate #ifdef __cplusplus 370Sstevel@tonic-gate extern "C" { 380Sstevel@tonic-gate #endif 390Sstevel@tonic-gate 400Sstevel@tonic-gate #include <dt_parser.h> 410Sstevel@tonic-gate #include <dt_regset.h> 420Sstevel@tonic-gate #include <dt_inttab.h> 430Sstevel@tonic-gate #include <dt_strtab.h> 440Sstevel@tonic-gate #include <dt_decl.h> 450Sstevel@tonic-gate #include <dt_as.h> 460Sstevel@tonic-gate 470Sstevel@tonic-gate typedef struct dt_pcb { 480Sstevel@tonic-gate dtrace_hdl_t *pcb_hdl; /* pointer to library handle */ 490Sstevel@tonic-gate struct dt_pcb *pcb_prev; /* pointer to previous pcb in stack */ 500Sstevel@tonic-gate FILE *pcb_fileptr; /* pointer to input file (or NULL) */ 510Sstevel@tonic-gate char *pcb_filetag; /* optional file name string (or NULL) */ 520Sstevel@tonic-gate const char *pcb_string; /* pointer to input string (or NULL) */ 530Sstevel@tonic-gate const char *pcb_strptr; /* pointer to input position */ 540Sstevel@tonic-gate size_t pcb_strlen; /* length of pcb_string */ 550Sstevel@tonic-gate int pcb_sargc; /* number of script arguments (if any) */ 560Sstevel@tonic-gate char *const *pcb_sargv; /* script argument strings (if any) */ 570Sstevel@tonic-gate ushort_t *pcb_sflagv; /* script argument flags (DT_IDFLG_* bits) */ 580Sstevel@tonic-gate dt_scope_t pcb_dstack; /* declaration processing stack */ 590Sstevel@tonic-gate dt_node_t *pcb_list; /* list of allocated parse tree nodes */ 600Sstevel@tonic-gate dt_node_t *pcb_hold; /* parse tree nodes on hold until end of defn */ 610Sstevel@tonic-gate dt_node_t *pcb_root; /* root of current parse tree */ 620Sstevel@tonic-gate dt_idstack_t pcb_globals; /* stack of global identifier hash tables */ 630Sstevel@tonic-gate dt_idhash_t *pcb_locals; /* current hash table of local identifiers */ 640Sstevel@tonic-gate dt_idhash_t *pcb_idents; /* current hash table of ambiguous idents */ 650Sstevel@tonic-gate dt_idhash_t *pcb_pragmas; /* current hash table of pending pragmas */ 660Sstevel@tonic-gate dt_inttab_t *pcb_inttab; /* integer table for constant references */ 670Sstevel@tonic-gate dt_strtab_t *pcb_strtab; /* string table for string references */ 680Sstevel@tonic-gate dt_regset_t *pcb_regs; /* register set for code generation */ 690Sstevel@tonic-gate dt_irlist_t pcb_ir; /* list of unrelocated IR instructions */ 70*265Smws uint_t pcb_asvidx; /* assembler vartab index (see dt_as.c) */ 71*265Smws ulong_t **pcb_asxrefs; /* assembler imported xlators (see dt_as.c) */ 72*265Smws uint_t pcb_asxreflen; /* assembler xlator map length (see dt_as.c) */ 730Sstevel@tonic-gate const dtrace_probedesc_t *pcb_pdesc; /* probedesc for current context */ 740Sstevel@tonic-gate struct dt_probe *pcb_probe; /* probe associated with current context */ 750Sstevel@tonic-gate dtrace_probeinfo_t pcb_pinfo; /* info associated with current context */ 760Sstevel@tonic-gate dtrace_attribute_t pcb_amin; /* stability minimum for compilation */ 770Sstevel@tonic-gate dt_node_t *pcb_dret; /* node containing return type for assembler */ 780Sstevel@tonic-gate dtrace_difo_t *pcb_difo; /* intermediate DIF object made by assembler */ 790Sstevel@tonic-gate dtrace_prog_t *pcb_prog; /* intermediate program made by compiler */ 800Sstevel@tonic-gate dtrace_stmtdesc_t *pcb_stmt; /* intermediate stmt made by compiler */ 810Sstevel@tonic-gate dtrace_ecbdesc_t *pcb_ecbdesc; /* intermediate ecbdesc made by cmplr */ 820Sstevel@tonic-gate jmp_buf pcb_jmpbuf; /* setjmp(3C) buffer for error return */ 830Sstevel@tonic-gate const char *pcb_region; /* optional region name for yyerror() suffix */ 840Sstevel@tonic-gate dtrace_probespec_t pcb_pspec; /* probe description evaluation context */ 850Sstevel@tonic-gate uint_t pcb_cflags; /* optional compilation flags (see dtrace.h) */ 860Sstevel@tonic-gate uint_t pcb_idepth; /* preprocessor #include nesting depth */ 870Sstevel@tonic-gate yystate_t pcb_yystate; /* lex/yacc parsing state (see yybegin()) */ 880Sstevel@tonic-gate int pcb_context; /* yyparse() rules context (DT_CTX_* value) */ 890Sstevel@tonic-gate int pcb_token; /* token to be returned by yylex() (if != 0) */ 900Sstevel@tonic-gate int pcb_cstate; /* state to be restored by lexer at state end */ 910Sstevel@tonic-gate int pcb_braces; /* number of open curly braces in lexer */ 920Sstevel@tonic-gate int pcb_brackets; /* number of open square brackets in lexer */ 930Sstevel@tonic-gate int pcb_parens; /* number of open parentheses in lexer */ 940Sstevel@tonic-gate } dt_pcb_t; 950Sstevel@tonic-gate 960Sstevel@tonic-gate extern void dt_pcb_push(dtrace_hdl_t *, dt_pcb_t *); 970Sstevel@tonic-gate extern void dt_pcb_pop(dtrace_hdl_t *, int); 980Sstevel@tonic-gate 990Sstevel@tonic-gate #ifdef __cplusplus 1000Sstevel@tonic-gate } 1010Sstevel@tonic-gate #endif 1020Sstevel@tonic-gate 1030Sstevel@tonic-gate #endif /* _DT_PCB_H */ 104