1*3bfaa971Sbrad.\" $NetBSD: umcpmioctl.8,v 1.1 2024/12/16 16:37:40 brad Exp $ 2*3bfaa971Sbrad.\" 3*3bfaa971Sbrad.\" Copyright (c) 2024 Brad Spencer <brad@anduin.eldar.org> 4*3bfaa971Sbrad.\" 5*3bfaa971Sbrad.\" Permission to use, copy, modify, and distribute this software for any 6*3bfaa971Sbrad.\" purpose with or without fee is hereby granted, provided that the above 7*3bfaa971Sbrad.\" copyright notice and this permission notice appear in all copies. 8*3bfaa971Sbrad.\" 9*3bfaa971Sbrad.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10*3bfaa971Sbrad.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11*3bfaa971Sbrad.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12*3bfaa971Sbrad.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13*3bfaa971Sbrad.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14*3bfaa971Sbrad.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15*3bfaa971Sbrad.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16*3bfaa971Sbrad.\" 17*3bfaa971Sbrad.Dd November 24, 2024 18*3bfaa971Sbrad.Dt UMCPMIOCTL 8 19*3bfaa971Sbrad.Os 20*3bfaa971Sbrad.Sh NAME 21*3bfaa971Sbrad.Nm umcpmioctl 22*3bfaa971Sbrad.Nd Command line utility to interact with a MCP2221 / MCP2221A multi-io chip 23*3bfaa971Sbrad.Sh SYNOPSIS 24*3bfaa971Sbrad.Nm umcpmioctl 25*3bfaa971Sbrad.Op Fl dh 26*3bfaa971Sbrad.Ar device 27*3bfaa971Sbrad.Ar status 28*3bfaa971Sbrad.Nm umcpmioctl 29*3bfaa971Sbrad.Op Fl dh 30*3bfaa971Sbrad.Ar device 31*3bfaa971Sbrad.Ar get sram 32*3bfaa971Sbrad.Nm umcpmioctl 33*3bfaa971Sbrad.Op Fl dh 34*3bfaa971Sbrad.Ar device 35*3bfaa971Sbrad.Ar get gp 36*3bfaa971Sbrad.Nm umcpmioctl 37*3bfaa971Sbrad.Op Fl dh 38*3bfaa971Sbrad.Ar device 39*3bfaa971Sbrad.Ar get flash cs 40*3bfaa971Sbrad.Nm umcpmioctl 41*3bfaa971Sbrad.Op Fl dh 42*3bfaa971Sbrad.Ar device 43*3bfaa971Sbrad.Ar get flash gp 44*3bfaa971Sbrad.Nm umcpmioctl 45*3bfaa971Sbrad.Op Fl dh 46*3bfaa971Sbrad.Ar device 47*3bfaa971Sbrad.Ar get flash usbman 48*3bfaa971Sbrad.Nm umcpmioctl 49*3bfaa971Sbrad.Op Fl dh 50*3bfaa971Sbrad.Ar device 51*3bfaa971Sbrad.Ar get flash usbprod 52*3bfaa971Sbrad.Nm umcpmioctl 53*3bfaa971Sbrad.Op Fl dh 54*3bfaa971Sbrad.Ar device 55*3bfaa971Sbrad.Ar get flash usbsn 56*3bfaa971Sbrad.Nm umcpmioctl 57*3bfaa971Sbrad.Op Fl dh 58*3bfaa971Sbrad.Ar device 59*3bfaa971Sbrad.Ar get flash chipsn 60*3bfaa971Sbrad.Nm umcpmioctl 61*3bfaa971Sbrad.Op Fl dh 62*3bfaa971Sbrad.Ar device 63*3bfaa971Sbrad.Ar put flash gp GPn PIN_FUNCTION ... 64*3bfaa971Sbrad.Pp 65*3bfaa971SbradGPn is one of GP0, GP1, GP2 or GP3 66*3bfaa971Sbrad.Pp 67*3bfaa971SbradPIN_FUNCTION is one of GPIO_PIN_INPUT, GPIO_PIN_OUTPUT, GPIO_PIN_ALT0, 68*3bfaa971SbradGPIO_PIN_ALT1, GPIO_PIN_ALT2, GPIO_PIN_ALT3, DEFAULT_OUTPUT_ZERO, or 69*3bfaa971SbradDEFAULT_OUTPUT_ONE 70*3bfaa971Sbrad.Pp 71*3bfaa971SbradFor a 72*3bfaa971Sbrad.Ar put flash 73*3bfaa971Sbradthe GPn and PIN_FUNCTION pairs may be repeated 74*3bfaa971Sbrad.Sh DESCRIPTION 75*3bfaa971SbradThe 76*3bfaa971Sbrad.Nm 77*3bfaa971Sbradutility interacts with a MCP2221 / MCP2221A and can be used to pull 78*3bfaa971Sbradthe status of the chip, get the SRAM values, get the values from the 79*3bfaa971Sbradonboard FLASH and can be used to set some of the FLASH values 80*3bfaa971Sbradassoicated with the gpio pins. The values from flash are copied into 81*3bfaa971Sbradthe SRAM when the chip enumerates or powers up. 82*3bfaa971Sbrad.Sh EXAMPLES 83*3bfaa971Sbrad.Pp 84*3bfaa971Sbrad.Dl "umcpmioctl /dev/umcpmio0ctl status" 85*3bfaa971Sbrad.Pp 86*3bfaa971SbradQuery the chip for its status. 87*3bfaa971Sbrad.Pp 88*3bfaa971Sbrad.Dl "umcpmioctl /dev/umcpmio0ctl get sram" 89*3bfaa971Sbrad.Pp 90*3bfaa971SbradReturn the values from the SRAM on the chip. 91*3bfaa971Sbrad.Pp 92*3bfaa971Sbrad.Dl "umcpmioctl /dev/umcpmio0ctl get flash cs" 93*3bfaa971Sbrad.Pp 94*3bfaa971SbradReturn the values for the chip settings from the FLASH. 95*3bfaa971Sbrad.Pp 96*3bfaa971Sbrad.Dl "umcpmioctl /dev/umcpmio0ctl put flash gp GP0 GPIO_PIN_INPUT" 97*3bfaa971Sbrad.Pp 98*3bfaa971SbradThis will set the GP0 pin to be an input pin on start up of the chip. 99*3bfaa971Sbrad.Pp 100*3bfaa971Sbrad.Dl "umcpmioctl /dev/umcpmio0ctl put flash gp GP2 GPIO_PIN_OUTPUT GP0 GPIO_PIN_ALT0" 101*3bfaa971Sbrad.Pp 102*3bfaa971SbradThis will set the GP2 pin to be an output pin and GP0 pin to have the 103*3bfaa971SbradALT0 function upon chip start up. 104*3bfaa971Sbrad.Sh SEE ALSO 105*3bfaa971Sbrad.Xr umcpmio 4 106*3bfaa971Sbrad.Xr gpio 4 107*3bfaa971Sbrad.Sh HISTORY 108*3bfaa971SbradThe 109*3bfaa971Sbrad.Nm 110*3bfaa971Sbradutility first appeared in 111*3bfaa971Sbrad.Nx 11.0 . 112*3bfaa971Sbrad.Sh AUTHORS 113*3bfaa971Sbrad.An -nosplit 114*3bfaa971SbradThe 115*3bfaa971Sbrad.Nm 116*3bfaa971Sbradutility was written by 117*3bfaa971Sbrad.An Brad Spencer Aq Mt brad@anduin.eldar.org . 118*3bfaa971Sbrad.Sh BUGS 119*3bfaa971SbradOnly the gpio settings can be changed in FLASH. 120*3bfaa971Sbrad.Pp 121*3bfaa971SbradThe output is not very pleasent to use and one will probably need to 122*3bfaa971Sbradhave the datasheet for the MCP2221 / MCP2221A on hand to make sense of 123*3bfaa971Sbradit. 124