1*bf53d441Sbrad /* $NetBSD: scmdctlconst.h,v 1.1 2021/12/07 17:39:55 brad Exp $ */ 2*bf53d441Sbrad 3*bf53d441Sbrad /* 4*bf53d441Sbrad * Copyright (c) 2021 Brad Spencer <brad@anduin.eldar.org> 5*bf53d441Sbrad * 6*bf53d441Sbrad * Permission to use, copy, modify, and distribute this software for any 7*bf53d441Sbrad * purpose with or without fee is hereby granted, provided that the above 8*bf53d441Sbrad * copyright notice and this permission notice appear in all copies. 9*bf53d441Sbrad * 10*bf53d441Sbrad * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11*bf53d441Sbrad * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12*bf53d441Sbrad * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13*bf53d441Sbrad * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14*bf53d441Sbrad * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15*bf53d441Sbrad * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16*bf53d441Sbrad * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17*bf53d441Sbrad */ 18*bf53d441Sbrad 19*bf53d441Sbrad #ifndef _SCMDCTLCONST_H_ 20*bf53d441Sbrad #define _SCMDCTLCONST_H_ 21*bf53d441Sbrad 22*bf53d441Sbrad static const struct scmdcmd scmdcmds[] = { 23*bf53d441Sbrad { 24*bf53d441Sbrad .cmd = "identify", 25*bf53d441Sbrad .id = SCMD_IDENTIFY, 26*bf53d441Sbrad .helpargs = "[module]" 27*bf53d441Sbrad }, 28*bf53d441Sbrad { 29*bf53d441Sbrad .cmd = "diagnostics", 30*bf53d441Sbrad .id = SCMD_DIAG, 31*bf53d441Sbrad .helpargs = "[module]" 32*bf53d441Sbrad }, 33*bf53d441Sbrad { 34*bf53d441Sbrad .cmd = "motor", 35*bf53d441Sbrad .id = SCMD_MOTOR, 36*bf53d441Sbrad .helpargs = "get|set|invert|bridge|enable|disable module([get]|set|invert|bridge) A|B(set|invert) value(set)" 37*bf53d441Sbrad }, 38*bf53d441Sbrad { 39*bf53d441Sbrad .cmd = "read_register", 40*bf53d441Sbrad .id = SCMD_READ, 41*bf53d441Sbrad .helpargs = "module register [register_end]" 42*bf53d441Sbrad }, 43*bf53d441Sbrad { 44*bf53d441Sbrad .cmd = "write_register", 45*bf53d441Sbrad .id = SCMD_WRITE, 46*bf53d441Sbrad .helpargs = "module register value" 47*bf53d441Sbrad }, 48*bf53d441Sbrad { 49*bf53d441Sbrad .cmd = "restart", 50*bf53d441Sbrad .id = SCMD_RESTART, 51*bf53d441Sbrad .helpargs = "" 52*bf53d441Sbrad }, 53*bf53d441Sbrad { 54*bf53d441Sbrad .cmd = "re-enumerate", 55*bf53d441Sbrad .id = SCMD_ENUMERATE, 56*bf53d441Sbrad .helpargs = "" 57*bf53d441Sbrad }, 58*bf53d441Sbrad { 59*bf53d441Sbrad .cmd = "update_rate", 60*bf53d441Sbrad .id = SCMD_UPDATERATE, 61*bf53d441Sbrad .helpargs = "get|set|force rate(set)" 62*bf53d441Sbrad }, 63*bf53d441Sbrad { 64*bf53d441Sbrad .cmd = "expansion_bus", 65*bf53d441Sbrad .id = SCMD_EBUS, 66*bf53d441Sbrad .helpargs = "get|set 50kHz|100kHz|400kHz(set)" 67*bf53d441Sbrad }, 68*bf53d441Sbrad { 69*bf53d441Sbrad .cmd = "lock", 70*bf53d441Sbrad .id = SCMD_LOCK, 71*bf53d441Sbrad .helpargs = "get|lock|unlock local_user|local_master|global_user|global_master" 72*bf53d441Sbrad }, 73*bf53d441Sbrad { 74*bf53d441Sbrad .cmd = "spi_read_one", 75*bf53d441Sbrad .id = SCMD_SPIREADONE, 76*bf53d441Sbrad .helpargs = "" 77*bf53d441Sbrad } 78*bf53d441Sbrad }; 79*bf53d441Sbrad 80*bf53d441Sbrad static const struct scmdcmd motorsubcmds[] = { 81*bf53d441Sbrad { 82*bf53d441Sbrad .cmd = "get", 83*bf53d441Sbrad .id = SCMD_SUBMOTORGET, 84*bf53d441Sbrad .helpargs = "" 85*bf53d441Sbrad }, 86*bf53d441Sbrad { 87*bf53d441Sbrad .cmd = "set", 88*bf53d441Sbrad .id = SCMD_SUBMOTORSET, 89*bf53d441Sbrad .helpargs = "" 90*bf53d441Sbrad }, 91*bf53d441Sbrad { 92*bf53d441Sbrad .cmd = "invert", 93*bf53d441Sbrad .id = SCMD_SUBMOTORINVERT, 94*bf53d441Sbrad .helpargs = "" 95*bf53d441Sbrad }, 96*bf53d441Sbrad { 97*bf53d441Sbrad .cmd = "bridge", 98*bf53d441Sbrad .id = SCMD_SUBMOTORBRIDGE, 99*bf53d441Sbrad .helpargs = "" 100*bf53d441Sbrad }, 101*bf53d441Sbrad { 102*bf53d441Sbrad .cmd = "disable", 103*bf53d441Sbrad .id = SCMD_SUBMOTORDISABLE, 104*bf53d441Sbrad .helpargs = "" 105*bf53d441Sbrad }, 106*bf53d441Sbrad { 107*bf53d441Sbrad .cmd = "enable", 108*bf53d441Sbrad .id = SCMD_SUBMOTORENABLE, 109*bf53d441Sbrad .helpargs = "" 110*bf53d441Sbrad } 111*bf53d441Sbrad }; 112*bf53d441Sbrad 113*bf53d441Sbrad static const struct scmdcmd updateratesubcmds[] = { 114*bf53d441Sbrad { 115*bf53d441Sbrad .cmd = "get", 116*bf53d441Sbrad .id = SCMD_SUBURGET, 117*bf53d441Sbrad .helpargs = "" 118*bf53d441Sbrad }, 119*bf53d441Sbrad { 120*bf53d441Sbrad .cmd = "set", 121*bf53d441Sbrad .id = SCMD_SUBURSET, 122*bf53d441Sbrad .helpargs = "" 123*bf53d441Sbrad }, 124*bf53d441Sbrad { 125*bf53d441Sbrad .cmd = "force", 126*bf53d441Sbrad .id = SCMD_SUBURFORCE, 127*bf53d441Sbrad .helpargs = "" 128*bf53d441Sbrad } 129*bf53d441Sbrad }; 130*bf53d441Sbrad 131*bf53d441Sbrad static const struct scmdcmd ebussubcmds[] = { 132*bf53d441Sbrad { 133*bf53d441Sbrad .cmd = "get", 134*bf53d441Sbrad .id = SCMD_SUBEBUSGET, 135*bf53d441Sbrad .helpargs = "" 136*bf53d441Sbrad }, 137*bf53d441Sbrad { 138*bf53d441Sbrad .cmd = "set", 139*bf53d441Sbrad .id = SCMD_SUBEBUSSET, 140*bf53d441Sbrad .helpargs = "" 141*bf53d441Sbrad } 142*bf53d441Sbrad }; 143*bf53d441Sbrad 144*bf53d441Sbrad static const struct scmdcmd locksubcmds[] = { 145*bf53d441Sbrad { 146*bf53d441Sbrad .cmd = "get", 147*bf53d441Sbrad .id = SCMD_SUBLOCKGET, 148*bf53d441Sbrad .helpargs = "" 149*bf53d441Sbrad }, 150*bf53d441Sbrad { 151*bf53d441Sbrad .cmd = "lock", 152*bf53d441Sbrad .id = SCMD_SUBLOCKLOCK, 153*bf53d441Sbrad .helpargs = "" 154*bf53d441Sbrad }, 155*bf53d441Sbrad { 156*bf53d441Sbrad .cmd = "unlock", 157*bf53d441Sbrad .id = SCMD_SUBLOCKUNLOCK, 158*bf53d441Sbrad .helpargs = "" 159*bf53d441Sbrad } 160*bf53d441Sbrad }; 161*bf53d441Sbrad 162*bf53d441Sbrad static const struct scmdcmd lockcmdtypes[] = { 163*bf53d441Sbrad { 164*bf53d441Sbrad .cmd = "local_user", 165*bf53d441Sbrad .id = SCMD_LOCAL_USER_LOCK, 166*bf53d441Sbrad .helpargs = "" 167*bf53d441Sbrad }, 168*bf53d441Sbrad { 169*bf53d441Sbrad .cmd = "local_master", 170*bf53d441Sbrad .id = SCMD_LOCAL_MASTER_LOCK, 171*bf53d441Sbrad .helpargs = "" 172*bf53d441Sbrad }, 173*bf53d441Sbrad { 174*bf53d441Sbrad .cmd = "global_user", 175*bf53d441Sbrad .id = SCMD_GLOBAL_USER_LOCK, 176*bf53d441Sbrad .helpargs = "" 177*bf53d441Sbrad }, 178*bf53d441Sbrad { 179*bf53d441Sbrad .cmd = "global_master", 180*bf53d441Sbrad .id = SCMD_GLOBAL_MASTER_LOCK, 181*bf53d441Sbrad .helpargs = "" 182*bf53d441Sbrad } 183*bf53d441Sbrad }; 184*bf53d441Sbrad 185*bf53d441Sbrad static const char *ebus_speeds[] = { 186*bf53d441Sbrad "50kHz","100kHz","400kHz" 187*bf53d441Sbrad }; 188*bf53d441Sbrad 189*bf53d441Sbrad static const char *scmdregisternames[] = { 190*bf53d441Sbrad "FID", 191*bf53d441Sbrad "ID", 192*bf53d441Sbrad "SLAVE_ADDR", 193*bf53d441Sbrad "CONFIG_BITS", 194*bf53d441Sbrad "U_I2C_RD_ERR", 195*bf53d441Sbrad "U_I2C_WR_ERR", 196*bf53d441Sbrad "U_BUF_DUMPED", 197*bf53d441Sbrad "E_I2C_RD_ERR", 198*bf53d441Sbrad "E_I2C_WR_ERR", 199*bf53d441Sbrad "LOOP_TIME", 200*bf53d441Sbrad "SLV_POLL_CNT", 201*bf53d441Sbrad "SLV_TOP_ADDR", 202*bf53d441Sbrad "MST_E_ERR", 203*bf53d441Sbrad "MST_E_STATUS", 204*bf53d441Sbrad "FSAFE_FAULTS", 205*bf53d441Sbrad "REG_OOR_CNT", 206*bf53d441Sbrad "REG_RO_WRITE_CNT", 207*bf53d441Sbrad "GEN_TEST_WORD", 208*bf53d441Sbrad "MOTOR_A_INVERT", 209*bf53d441Sbrad "MOTOR_B_INVERT", 210*bf53d441Sbrad "BRIDGE", 211*bf53d441Sbrad "LOCAL_MASTER_LOCK", 212*bf53d441Sbrad "LOCAL_USER_LOCK", 213*bf53d441Sbrad "MST_E_IN_FN", 214*bf53d441Sbrad "U_PORT_CLKDIV_U", 215*bf53d441Sbrad "U_PORT_CLKDIV_L", 216*bf53d441Sbrad "U_PORT_CLKDIV_CTRL", 217*bf53d441Sbrad "E_PORT_CLKDIV_U", 218*bf53d441Sbrad "E_PORT_CLKDIV_L", 219*bf53d441Sbrad "E_PORT_CLKDIV_CTRL", 220*bf53d441Sbrad "U_BUS_UART_BAUD", 221*bf53d441Sbrad "FSAFE_CTRL", 222*bf53d441Sbrad "MA_DRIVE", 223*bf53d441Sbrad "MB_DRIVE", 224*bf53d441Sbrad "S1A_DRIVE", 225*bf53d441Sbrad "S1B_DRIVE", 226*bf53d441Sbrad "S2A_DRIVE", 227*bf53d441Sbrad "S2B_DRIVE", 228*bf53d441Sbrad "S3A_DRIVE", 229*bf53d441Sbrad "S3B_DRIVE", 230*bf53d441Sbrad "S4A_DRIVE", 231*bf53d441Sbrad "S4B_DRIVE", 232*bf53d441Sbrad "S5A_DRIVE", 233*bf53d441Sbrad "S5B_DRIVE", 234*bf53d441Sbrad "S6A_DRIVE", 235*bf53d441Sbrad "S6B_DRIVE", 236*bf53d441Sbrad "S7A_DRIVE", 237*bf53d441Sbrad "S7B_DRIVE", 238*bf53d441Sbrad "S8A_DRIVE", 239*bf53d441Sbrad "S8B_DRIVE", 240*bf53d441Sbrad "S9A_DRIVE", 241*bf53d441Sbrad "S9B_DRIVE", 242*bf53d441Sbrad "S10A_DRIVE", 243*bf53d441Sbrad "S10B_DRIVE", 244*bf53d441Sbrad "S11A_DRIVE", 245*bf53d441Sbrad "S11B_DRIVE", 246*bf53d441Sbrad "S12A_DRIVE", 247*bf53d441Sbrad "S12B_DRIVE", 248*bf53d441Sbrad "S13A_DRIVE", 249*bf53d441Sbrad "S13B_DRIVE", 250*bf53d441Sbrad "S14A_DRIVE", 251*bf53d441Sbrad "S14B_DRIVE", 252*bf53d441Sbrad "S15A_DRIVE", 253*bf53d441Sbrad "S15B_DRIVE", 254*bf53d441Sbrad "S16A_DRIVE", 255*bf53d441Sbrad "S16B_DRIVE", 256*bf53d441Sbrad "HOLE_1_42", 257*bf53d441Sbrad "HOLE_1_43", 258*bf53d441Sbrad "HOLE_1_44", 259*bf53d441Sbrad "HOLE_1_45", 260*bf53d441Sbrad "HOLE_1_46", 261*bf53d441Sbrad "HOLE_1_47", 262*bf53d441Sbrad "HOLE_1_48", 263*bf53d441Sbrad "HOLE_1_49", 264*bf53d441Sbrad "HOLE_1_4A", 265*bf53d441Sbrad "HOLE_1_4B", 266*bf53d441Sbrad "HOLE_1_4C", 267*bf53d441Sbrad "HOLE_1_4D", 268*bf53d441Sbrad "HOLE_1_4E", 269*bf53d441Sbrad "HOLE_1_4F", 270*bf53d441Sbrad "INV_2_9", 271*bf53d441Sbrad "INV_10_17", 272*bf53d441Sbrad "INV_18_25", 273*bf53d441Sbrad "INV_26_33", 274*bf53d441Sbrad "BRIDGE_SLV_L", 275*bf53d441Sbrad "BRIDGE_SLV_H", 276*bf53d441Sbrad "HOLE_2_56", 277*bf53d441Sbrad "HOLE_2_57", 278*bf53d441Sbrad "HOLE_2_58", 279*bf53d441Sbrad "HOLE_2_59", 280*bf53d441Sbrad "HOLE_2_5A", 281*bf53d441Sbrad "HOLE_2_5B", 282*bf53d441Sbrad "HOLE_2_5C", 283*bf53d441Sbrad "HOLE_2_5D", 284*bf53d441Sbrad "HOLE_2_5E", 285*bf53d441Sbrad "HOLE_2_5F", 286*bf53d441Sbrad "HOLE_2_60", 287*bf53d441Sbrad "HOLE_2_61", 288*bf53d441Sbrad "HOLE_2_62", 289*bf53d441Sbrad "HOLE_2_63", 290*bf53d441Sbrad "HOLE_2_64", 291*bf53d441Sbrad "HOLE_2_65", 292*bf53d441Sbrad "HOLE_2_66", 293*bf53d441Sbrad "HOLE_2_67", 294*bf53d441Sbrad "HOLE_2_68", 295*bf53d441Sbrad "HOLE_2_69", 296*bf53d441Sbrad "HOLE_2_6A", 297*bf53d441Sbrad "HOLE_2_6B", 298*bf53d441Sbrad "HOLE_2_6C", 299*bf53d441Sbrad "HOLE_2_6D", 300*bf53d441Sbrad "HOLE_2_6E", 301*bf53d441Sbrad "PAGE_SELECT", 302*bf53d441Sbrad "DRIVER_ENABLE", 303*bf53d441Sbrad "UPDATE_RATE", 304*bf53d441Sbrad "FORCE_UPDATE", 305*bf53d441Sbrad "E_BUS_SPEED", 306*bf53d441Sbrad "MASTER_LOCK", 307*bf53d441Sbrad "USER_LOCK", 308*bf53d441Sbrad "FSAFE_TIME", 309*bf53d441Sbrad "STATUS_1", 310*bf53d441Sbrad "CONTROL_1", 311*bf53d441Sbrad "REM_ADDR", 312*bf53d441Sbrad "REM_OFFSET", 313*bf53d441Sbrad "REM_DATA_WR", 314*bf53d441Sbrad "REM_DATA_RD", 315*bf53d441Sbrad "REM_WRITE", 316*bf53d441Sbrad "REM_READ" 317*bf53d441Sbrad }; 318*bf53d441Sbrad 319*bf53d441Sbrad #endif 320