xref: /netbsd-src/tests/lib/libc/atomic/t_atomic_and.c (revision ecae8bc568195ba950f3f448ebe39e4842db91e9)
1*ecae8bc5Sisaki /*	$NetBSD: t_atomic_and.c,v 1.1 2019/02/17 12:24:17 isaki Exp $	*/
2*ecae8bc5Sisaki 
3*ecae8bc5Sisaki /*
4*ecae8bc5Sisaki  * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
5*ecae8bc5Sisaki  *
6*ecae8bc5Sisaki  * Redistribution and use in source and binary forms, with or without
7*ecae8bc5Sisaki  * modification, are permitted provided that the following conditions
8*ecae8bc5Sisaki  * are met:
9*ecae8bc5Sisaki  * 1. Redistributions of source code must retain the above copyright
10*ecae8bc5Sisaki  *    notice, this list of conditions and the following disclaimer.
11*ecae8bc5Sisaki  * 2. Redistributions in binary form must reproduce the above copyright
12*ecae8bc5Sisaki  *    notice, this list of conditions and the following disclaimer in the
13*ecae8bc5Sisaki  *    documentation and/or other materials provided with the distribution.
14*ecae8bc5Sisaki  *
15*ecae8bc5Sisaki  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16*ecae8bc5Sisaki  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17*ecae8bc5Sisaki  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18*ecae8bc5Sisaki  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19*ecae8bc5Sisaki  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20*ecae8bc5Sisaki  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21*ecae8bc5Sisaki  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22*ecae8bc5Sisaki  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23*ecae8bc5Sisaki  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24*ecae8bc5Sisaki  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25*ecae8bc5Sisaki  * SUCH DAMAGE.
26*ecae8bc5Sisaki  */
27*ecae8bc5Sisaki 
28*ecae8bc5Sisaki #include <sys/cdefs.h>
29*ecae8bc5Sisaki __RCSID("$NetBSD: t_atomic_and.c,v 1.1 2019/02/17 12:24:17 isaki Exp $");
30*ecae8bc5Sisaki 
31*ecae8bc5Sisaki #include <atf-c.h>
32*ecae8bc5Sisaki #include <inttypes.h>
33*ecae8bc5Sisaki #include <sys/atomic.h>
34*ecae8bc5Sisaki 
35*ecae8bc5Sisaki /*
36*ecae8bc5Sisaki  * These tests don't examine the atomicity.
37*ecae8bc5Sisaki  */
38*ecae8bc5Sisaki 
39*ecae8bc5Sisaki #define DST    (0x1122334455667788UL)
40*ecae8bc5Sisaki #define SRC    (0xf0f0f0f0f0f0f0f0UL)
41*ecae8bc5Sisaki #define EXPECT (0x1020304050607080UL)
42*ecae8bc5Sisaki 
43*ecae8bc5Sisaki /*
44*ecae8bc5Sisaki  * atomic_and_*()
45*ecae8bc5Sisaki  */
46*ecae8bc5Sisaki #define atf_and(NAME, TYPE, FMT) \
47*ecae8bc5Sisaki ATF_TC(NAME); \
48*ecae8bc5Sisaki ATF_TC_HEAD(NAME, tc) \
49*ecae8bc5Sisaki { \
50*ecae8bc5Sisaki 	atf_tc_set_md_var(tc, "descr", #NAME); \
51*ecae8bc5Sisaki } \
52*ecae8bc5Sisaki ATF_TC_BODY(NAME, tc) \
53*ecae8bc5Sisaki { \
54*ecae8bc5Sisaki 	volatile TYPE val; \
55*ecae8bc5Sisaki 	TYPE src; \
56*ecae8bc5Sisaki 	TYPE exp; \
57*ecae8bc5Sisaki 	val = (TYPE)DST; \
58*ecae8bc5Sisaki 	src = (TYPE)SRC; \
59*ecae8bc5Sisaki 	exp = (TYPE)EXPECT; \
60*ecae8bc5Sisaki 	NAME(&val, src); \
61*ecae8bc5Sisaki 	ATF_REQUIRE_MSG(val == exp, \
62*ecae8bc5Sisaki 	    "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
63*ecae8bc5Sisaki }
64*ecae8bc5Sisaki 
65*ecae8bc5Sisaki atf_and(atomic_and_32,    uint32_t,      PRIx32);
66*ecae8bc5Sisaki atf_and(atomic_and_uint,  unsigned int,  "x");
67*ecae8bc5Sisaki atf_and(atomic_and_ulong, unsigned long, "lx");
68*ecae8bc5Sisaki #if defined(__HAVE_ATOMIC64_OPS)
69*ecae8bc5Sisaki atf_and(atomic_and_64,    uint64_t,      PRIx64);
70*ecae8bc5Sisaki #endif
71*ecae8bc5Sisaki 
72*ecae8bc5Sisaki /*
73*ecae8bc5Sisaki  * atomic_and_*_nv()
74*ecae8bc5Sisaki  */
75*ecae8bc5Sisaki #define atf_and_nv(NAME, TYPE, FMT) \
76*ecae8bc5Sisaki ATF_TC(NAME); \
77*ecae8bc5Sisaki ATF_TC_HEAD(NAME, tc) \
78*ecae8bc5Sisaki { \
79*ecae8bc5Sisaki 	atf_tc_set_md_var(tc, "descr", #NAME); \
80*ecae8bc5Sisaki } \
81*ecae8bc5Sisaki ATF_TC_BODY(NAME, tc) \
82*ecae8bc5Sisaki { \
83*ecae8bc5Sisaki 	volatile TYPE val; \
84*ecae8bc5Sisaki 	TYPE src; \
85*ecae8bc5Sisaki 	TYPE res; \
86*ecae8bc5Sisaki 	TYPE exp; \
87*ecae8bc5Sisaki 	val = (TYPE)DST; \
88*ecae8bc5Sisaki 	src = (TYPE)SRC; \
89*ecae8bc5Sisaki 	exp = (TYPE)EXPECT; \
90*ecae8bc5Sisaki 	res = NAME(&val, src); \
91*ecae8bc5Sisaki 	ATF_REQUIRE_MSG(val == exp, \
92*ecae8bc5Sisaki 	    "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
93*ecae8bc5Sisaki 	ATF_REQUIRE_MSG(res == exp, \
94*ecae8bc5Sisaki 	    "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
95*ecae8bc5Sisaki }
96*ecae8bc5Sisaki 
97*ecae8bc5Sisaki atf_and_nv(atomic_and_32_nv,    uint32_t,      PRIx32);
98*ecae8bc5Sisaki atf_and_nv(atomic_and_uint_nv,  unsigned int,  "x");
99*ecae8bc5Sisaki atf_and_nv(atomic_and_ulong_nv, unsigned long, "lx");
100*ecae8bc5Sisaki #if defined(__HAVE_ATOMIC64_OPS)
101*ecae8bc5Sisaki atf_and_nv(atomic_and_64_nv,    uint64_t,      PRIx64);
102*ecae8bc5Sisaki #endif
103*ecae8bc5Sisaki 
ATF_TP_ADD_TCS(tp)104*ecae8bc5Sisaki ATF_TP_ADD_TCS(tp)
105*ecae8bc5Sisaki {
106*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_32);
107*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_uint);
108*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_ulong);
109*ecae8bc5Sisaki #if defined(__HAVE_ATOMIC64_OPS)
110*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_64);
111*ecae8bc5Sisaki #endif
112*ecae8bc5Sisaki 
113*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_32_nv);
114*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_uint_nv);
115*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_ulong_nv);
116*ecae8bc5Sisaki #if defined(__HAVE_ATOMIC64_OPS)
117*ecae8bc5Sisaki 	ATF_TP_ADD_TC(tp, atomic_and_64_nv);
118*ecae8bc5Sisaki #endif
119*ecae8bc5Sisaki 
120*ecae8bc5Sisaki 	return atf_no_error();
121*ecae8bc5Sisaki }
122